1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Driver for ST STV0367 DVB-T & DVB-C demodulator IC.
7 * Copyright (C) ST Microelectronics.
8 * Copyright (C) 2010,2011 NetUP Inc.
9 * Copyright (C) 2010,2011 Igor M. Liplianin <liplianin@netup.ru>
11 /* Common driver error constants */
13 #ifndef STV0367_PRIV_H
14 #define STV0367_PRIV_H
27 /* MACRO definitions */
29 #define MAX(X, Y) ((X) >= (Y) ? (X) : (Y))
30 #define MIN(X, Y) ((X) <= (Y) ? (X) : (Y))
33 #define INRANGE(X, Y, Z) \
34 ((((X) <= (Y)) && ((Y) <= (Z))) || \
35 (((Z) <= (Y)) && ((Y) <= (X))) ? 1 : 0)
38 #define MAKEWORD(X, Y) (((X) << 8) + (Y))
41 #define LSB(X) (((X) & 0xff))
42 #define MSB(Y) (((Y) >> 8) & 0xff)
43 #define MMSB(Y)(((Y) >> 16) & 0xff)
45 enum stv0367_ter_signal_type
{
52 FE_TER_PRFOUNDOK
= 10,
53 FE_TER_NOPRFOUND
= 11,
62 enum stv0367_ts_mode
{
63 STV0367_OUTPUTMODE_DEFAULT
,
64 STV0367_SERIAL_PUNCT_CLOCK
,
65 STV0367_SERIAL_CONT_CLOCK
,
66 STV0367_PARALLEL_PUNCT_CLOCK
,
70 enum stv0367_clk_pol
{
71 STV0367_CLOCKPOLARITY_DEFAULT
,
72 STV0367_RISINGEDGE_CLOCK
,
73 STV0367_FALLINGEDGE_CLOCK
77 FE_TER_CHAN_BW_6M
= 6,
78 FE_TER_CHAN_BW_7M
= 7,
83 enum FE_TER_Rate_TPS
{
92 enum stv0367_ter_mode
{
98 enum FE_TER_Hierarchy_Alpha
{
99 FE_TER_HIER_ALPHA_NONE
, /* Regular modulation */
100 FE_TER_HIER_ALPHA_1
, /* Hierarchical modulation a = 1*/
101 FE_TER_HIER_ALPHA_2
, /* Hierarchical modulation a = 2*/
102 FE_TER_HIER_ALPHA_4
/* Hierarchical modulation a = 4*/
105 enum stv0367_ter_hierarchy
{
106 FE_TER_HIER_NONE
, /*Hierarchy None*/
107 FE_TER_HIER_LOW_PRIO
, /*Hierarchy : Low Priority*/
108 FE_TER_HIER_HIGH_PRIO
, /*Hierarchy : High Priority*/
109 FE_TER_HIER_PRIO_ANY
/*Hierarchy :Any*/
113 enum fe_stv0367_ter_spec
{
114 FE_TER_INVERSION_NONE
= 0,
115 FE_TER_INVERSION
= 1,
116 FE_TER_INVERSION_AUTO
= 2,
117 FE_TER_INVERSION_UNK
= 4
121 enum stv0367_ter_if_iq_mode
{
122 FE_TER_NORMAL_IF_TUNER
= 0,
123 FE_TER_LONGPATH_IF_TUNER
= 1,
129 enum FE_TER_FECRate
{
130 FE_TER_FEC_NONE
= 0x00, /* no FEC rate specified */
131 FE_TER_FEC_ALL
= 0xFF, /* Logical OR of all FECs */
133 FE_TER_FEC_2_3
= (1 << 1),
134 FE_TER_FEC_3_4
= (1 << 2),
135 FE_TER_FEC_4_5
= (1 << 3),
136 FE_TER_FEC_5_6
= (1 << 4),
137 FE_TER_FEC_6_7
= (1 << 5),
138 FE_TER_FEC_7_8
= (1 << 6),
139 FE_TER_FEC_8_9
= (1 << 7)
152 enum stv0367_ter_force
{
153 FE_TER_FORCENONE
= 0,
157 enum stv0367cab_mod
{
169 FE_CAB_FEC_A
= 1, /* J83 Annex A */
170 FE_CAB_FEC_B
= (1 << 1),/* J83 Annex B */
171 FE_CAB_FEC_C
= (1 << 2) /* J83 Annex C */
174 struct stv0367_cab_signal_info
{
176 u32 frequency
; /* kHz */
177 u32 symbol_rate
; /* Mbds */
178 enum stv0367cab_mod modulation
;
179 enum fe_spectral_inversion spect_inv
;
180 s32 Power_dBmx10
; /* Power of the RF signal (dBm x 10) */
181 u32 CN_dBx10
; /* Carrier to noise ratio (dB x 10) */
182 u32 BER
; /* Bit error rate (x 10000000) */
185 enum stv0367_cab_signal_type
{