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Merge tag 'trace-printf-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/trace...
[drm/drm-misc.git] / drivers / media / i2c / imx296.c
blob83149fa729c4249d1c1fbad2dd9aa6e098ef6f80
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Driver for IMX296 CMOS Image Sensor from Sony
4 *
5 * Copyright 2019 Laurent Pinchart <laurent.pinchart@ideasonboard.com>
6 */
7
8 #include <linux/clk.h>
9 #include <linux/gpio/consumer.h>
10 #include <linux/i2c.h>
11 #include <linux/module.h>
12 #include <linux/of.h>
13 #include <linux/pm_runtime.h>
14 #include <linux/regmap.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/slab.h>
17 #include <linux/videodev2.h>
18
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-fwnode.h>
21 #include <media/v4l2-subdev.h>
22
23 #define IMX296_PIXEL_ARRAY_WIDTH 1456
24 #define IMX296_PIXEL_ARRAY_HEIGHT 1088
25
26 #define IMX296_REG_8BIT(n) ((1 << 16) | (n))
27 #define IMX296_REG_16BIT(n) ((2 << 16) | (n))
28 #define IMX296_REG_24BIT(n) ((3 << 16) | (n))
29 #define IMX296_REG_SIZE_SHIFT 16
30 #define IMX296_REG_ADDR_MASK 0xffff
31
32 #define IMX296_CTRL00 IMX296_REG_8BIT(0x3000)
33 #define IMX296_CTRL00_STANDBY BIT(0)
34 #define IMX296_CTRL08 IMX296_REG_8BIT(0x3008)
35 #define IMX296_CTRL08_REGHOLD BIT(0)
36 #define IMX296_CTRL0A IMX296_REG_8BIT(0x300a)
37 #define IMX296_CTRL0A_XMSTA BIT(0)
38 #define IMX296_CTRL0B IMX296_REG_8BIT(0x300b)
39 #define IMX296_CTRL0B_TRIGEN BIT(0)
40 #define IMX296_CTRL0D IMX296_REG_8BIT(0x300d)
41 #define IMX296_CTRL0D_WINMODE_ALL (0 << 0)
42 #define IMX296_CTRL0D_WINMODE_FD_BINNING (2 << 0)
43 #define IMX296_CTRL0D_HADD_ON_BINNING BIT(5)
44 #define IMX296_CTRL0D_SAT_CNT BIT(6)
45 #define IMX296_CTRL0E IMX296_REG_8BIT(0x300e)
46 #define IMX296_CTRL0E_VREVERSE BIT(0)
47 #define IMX296_CTRL0E_HREVERSE BIT(1)
48 #define IMX296_VMAX IMX296_REG_24BIT(0x3010)
49 #define IMX296_HMAX IMX296_REG_16BIT(0x3014)
50 #define IMX296_TMDCTRL IMX296_REG_8BIT(0x301d)
51 #define IMX296_TMDCTRL_LATCH BIT(0)
52 #define IMX296_TMDOUT IMX296_REG_16BIT(0x301e)
53 #define IMX296_TMDOUT_MASK 0x3ff
54 #define IMX296_WDSEL IMX296_REG_8BIT(0x3021)
55 #define IMX296_WDSEL_NORMAL (0 << 0)
56 #define IMX296_WDSEL_MULTI_2 (1 << 0)
57 #define IMX296_WDSEL_MULTI_4 (3 << 0)
58 #define IMX296_BLKLEVELAUTO IMX296_REG_8BIT(0x3022)
59 #define IMX296_BLKLEVELAUTO_ON 0x01
60 #define IMX296_BLKLEVELAUTO_OFF 0xf0
61 #define IMX296_SST IMX296_REG_8BIT(0x3024)
62 #define IMX296_SST_EN BIT(0)
63 #define IMX296_CTRLTOUT IMX296_REG_8BIT(0x3026)
64 #define IMX296_CTRLTOUT_TOUT1SEL_LOW (0 << 0)
65 #define IMX296_CTRLTOUT_TOUT1SEL_PULSE (3 << 0)
66 #define IMX296_CTRLTOUT_TOUT2SEL_LOW (0 << 2)
67 #define IMX296_CTRLTOUT_TOUT2SEL_PULSE (3 << 2)
68 #define IMX296_CTRLTRIG IMX296_REG_8BIT(0x3029)
69 #define IMX296_CTRLTRIG_TOUT1_SEL_LOW (0 << 0)
70 #define IMX296_CTRLTRIG_TOUT1_SEL_PULSE1 (1 << 0)
71 #define IMX296_CTRLTRIG_TOUT2_SEL_LOW (0 << 4)
72 #define IMX296_CTRLTRIG_TOUT2_SEL_PULSE2 (2 << 4)
73 #define IMX296_SYNCSEL IMX296_REG_8BIT(0x3036)
74 #define IMX296_SYNCSEL_NORMAL 0xc0
75 #define IMX296_SYNCSEL_HIZ 0xf0
76 #define IMX296_PULSE1 IMX296_REG_8BIT(0x306d)
77 #define IMX296_PULSE1_EN_NOR BIT(0)
78 #define IMX296_PULSE1_EN_TRIG BIT(1)
79 #define IMX296_PULSE1_POL_HIGH (0 << 2)
80 #define IMX296_PULSE1_POL_LOW (1 << 2)
81 #define IMX296_PULSE1_UP IMX296_REG_24BIT(0x3070)
82 #define IMX296_PULSE1_DN IMX296_REG_24BIT(0x3074)
83 #define IMX296_PULSE2 IMX296_REG_8BIT(0x3079)
84 #define IMX296_PULSE2_EN_NOR BIT(0)
85 #define IMX296_PULSE2_EN_TRIG BIT(1)
86 #define IMX296_PULSE2_POL_HIGH (0 << 2)
87 #define IMX296_PULSE2_POL_LOW (1 << 2)
88 #define IMX296_PULSE2_UP IMX296_REG_24BIT(0x307c)
89 #define IMX296_PULSE2_DN IMX296_REG_24BIT(0x3080)
90 #define IMX296_INCKSEL(n) IMX296_REG_8BIT(0x3089 + (n))
91 #define IMX296_SHS1 IMX296_REG_24BIT(0x308d)
92 #define IMX296_SHS2 IMX296_REG_24BIT(0x3090)
93 #define IMX296_SHS3 IMX296_REG_24BIT(0x3094)
94 #define IMX296_SHS4 IMX296_REG_24BIT(0x3098)
95 #define IMX296_VBLANKLP IMX296_REG_8BIT(0x309c)
96 #define IMX296_VBLANKLP_NORMAL 0x04
97 #define IMX296_VBLANKLP_LOW_POWER 0x2c
98 #define IMX296_EXP_CNT IMX296_REG_8BIT(0x30a3)
99 #define IMX296_EXP_CNT_RESET BIT(0)
100 #define IMX296_EXP_MAX IMX296_REG_16BIT(0x30a6)
101 #define IMX296_VINT IMX296_REG_8BIT(0x30aa)
102 #define IMX296_VINT_EN BIT(0)
103 #define IMX296_LOWLAGTRG IMX296_REG_8BIT(0x30ae)
104 #define IMX296_LOWLAGTRG_FAST BIT(0)
105 #define IMX296_I2CCTRL IMX296_REG_8BIT(0x30ef)
106 #define IMX296_I2CCTRL_I2CACKEN BIT(0)
107
108 #define IMX296_SENSOR_INFO IMX296_REG_16BIT(0x3148)
109 #define IMX296_SENSOR_INFO_MONO BIT(15)
110 #define IMX296_SENSOR_INFO_IMX296LQ 0x4a00
111 #define IMX296_SENSOR_INFO_IMX296LL 0xca00
112 #define IMX296_S_SHSA IMX296_REG_16BIT(0x31ca)
113 #define IMX296_S_SHSB IMX296_REG_16BIT(0x31d2)
114 /*
115 * Registers 0x31c8 to 0x31cd, 0x31d0 to 0x31d5, 0x31e2, 0x31e3, 0x31ea and
116 * 0x31eb are related to exposure mode but otherwise not documented.
117 */
118
119 #define IMX296_GAINCTRL IMX296_REG_8BIT(0x3200)
120 #define IMX296_GAINCTRL_WD_GAIN_MODE_NORMAL 0x01
121 #define IMX296_GAINCTRL_WD_GAIN_MODE_MULTI 0x41
122 #define IMX296_GAIN IMX296_REG_16BIT(0x3204)
123 #define IMX296_GAIN_MIN 0
124 #define IMX296_GAIN_MAX 480
125 #define IMX296_GAIN1 IMX296_REG_16BIT(0x3208)
126 #define IMX296_GAIN2 IMX296_REG_16BIT(0x320c)
127 #define IMX296_GAIN3 IMX296_REG_16BIT(0x3210)
128 #define IMX296_GAINDLY IMX296_REG_8BIT(0x3212)
129 #define IMX296_GAINDLY_NONE 0x08
130 #define IMX296_GAINDLY_1FRAME 0x09
131 #define IMX296_PGCTRL IMX296_REG_8BIT(0x3238)
132 #define IMX296_PGCTRL_REGEN BIT(0)
133 #define IMX296_PGCTRL_THRU BIT(1)
134 #define IMX296_PGCTRL_CLKEN BIT(2)
135 #define IMX296_PGCTRL_MODE(n) ((n) << 3)
136 #define IMX296_PGHPOS IMX296_REG_16BIT(0x3239)
137 #define IMX296_PGVPOS IMX296_REG_16BIT(0x323c)
138 #define IMX296_PGHPSTEP IMX296_REG_8BIT(0x323e)
139 #define IMX296_PGVPSTEP IMX296_REG_8BIT(0x323f)
140 #define IMX296_PGHPNUM IMX296_REG_8BIT(0x3240)
141 #define IMX296_PGVPNUM IMX296_REG_8BIT(0x3241)
142 #define IMX296_PGDATA1 IMX296_REG_16BIT(0x3244)
143 #define IMX296_PGDATA2 IMX296_REG_16BIT(0x3246)
144 #define IMX296_PGHGSTEP IMX296_REG_8BIT(0x3249)
145 #define IMX296_BLKLEVEL IMX296_REG_16BIT(0x3254)
146
147 #define IMX296_FID0_ROI IMX296_REG_8BIT(0x3300)
148 #define IMX296_FID0_ROIH1ON BIT(0)
149 #define IMX296_FID0_ROIV1ON BIT(1)
150 #define IMX296_FID0_ROIPH1 IMX296_REG_16BIT(0x3310)
151 #define IMX296_FID0_ROIPV1 IMX296_REG_16BIT(0x3312)
152 #define IMX296_FID0_ROIWH1 IMX296_REG_16BIT(0x3314)
153 #define IMX296_FID0_ROIWH1_MIN 80
154 #define IMX296_FID0_ROIWV1 IMX296_REG_16BIT(0x3316)
155 #define IMX296_FID0_ROIWV1_MIN 4
156
157 #define IMX296_CM_HSST_STARTTMG IMX296_REG_16BIT(0x4018)
158 #define IMX296_CM_HSST_ENDTMG IMX296_REG_16BIT(0x401a)
159 #define IMX296_DA_HSST_STARTTMG IMX296_REG_16BIT(0x404d)
160 #define IMX296_DA_HSST_ENDTMG IMX296_REG_16BIT(0x4050)
161 #define IMX296_LM_HSST_STARTTMG IMX296_REG_16BIT(0x4094)
162 #define IMX296_LM_HSST_ENDTMG IMX296_REG_16BIT(0x4096)
163 #define IMX296_SST_SIEASTA1_SET IMX296_REG_8BIT(0x40c9)
164 #define IMX296_SST_SIEASTA1PRE_1U IMX296_REG_16BIT(0x40cc)
165 #define IMX296_SST_SIEASTA1PRE_1D IMX296_REG_16BIT(0x40ce)
166 #define IMX296_SST_SIEASTA1PRE_2U IMX296_REG_16BIT(0x40d0)
167 #define IMX296_SST_SIEASTA1PRE_2D IMX296_REG_16BIT(0x40d2)
168 #define IMX296_HSST IMX296_REG_8BIT(0x40dc)
169 #define IMX296_HSST_EN BIT(2)
170
171 #define IMX296_CKREQSEL IMX296_REG_8BIT(0x4101)
172 #define IMX296_CKREQSEL_HS BIT(2)
173 #define IMX296_GTTABLENUM IMX296_REG_8BIT(0x4114)
174 #define IMX296_CTRL418C IMX296_REG_8BIT(0x418c)
175
176 struct imx296_clk_params {
177 unsigned int freq;
178 u8 incksel[4];
179 u8 ctrl418c;
180 };
181
182 static const struct imx296_clk_params imx296_clk_params[] = {
183 { 37125000, { 0x80, 0x0b, 0x80, 0x08 }, 116 },
184 { 54000000, { 0xb0, 0x0f, 0xb0, 0x0c }, 168 },
185 { 74250000, { 0x80, 0x0f, 0x80, 0x0c }, 232 },
186 };
187
188 static const char * const imx296_supply_names[] = {
189 "dvdd",
190 "ovdd",
191 "avdd",
192 };
193
194 struct imx296 {
195 struct device *dev;
196 struct clk *clk;
197 struct regulator_bulk_data supplies[ARRAY_SIZE(imx296_supply_names)];
198 struct gpio_desc *reset;
199 struct regmap *regmap;
200
201 const struct imx296_clk_params *clk_params;
202 bool mono;
203
204 struct v4l2_subdev subdev;
205 struct media_pad pad;
206
207 struct v4l2_ctrl_handler ctrls;
208 struct v4l2_ctrl *hblank;
209 struct v4l2_ctrl *vblank;
210 };
211
212 static inline struct imx296 *to_imx296(struct v4l2_subdev *sd)
213 {
214 return container_of(sd, struct imx296, subdev);
215 }
216
217 static int imx296_read(struct imx296 *sensor, u32 addr)
218 {
219 u8 data[3] = { 0, 0, 0 };
220 int ret;
221
222 ret = regmap_raw_read(sensor->regmap, addr & IMX296_REG_ADDR_MASK, data,
223 (addr >> IMX296_REG_SIZE_SHIFT) & 3);
224 if (ret < 0)
225 return ret;
226
227 return (data[2] << 16) | (data[1] << 8) | data[0];
228 }
229
230 static int imx296_write(struct imx296 *sensor, u32 addr, u32 value, int *err)
231 {
232 u8 data[3] = { value & 0xff, (value >> 8) & 0xff, value >> 16 };
233 int ret;
234
235 if (err && *err)
236 return *err;
237
238 ret = regmap_raw_write(sensor->regmap, addr & IMX296_REG_ADDR_MASK,
239 data, (addr >> IMX296_REG_SIZE_SHIFT) & 3);
240 if (ret < 0) {
241 dev_err(sensor->dev, "%u-bit write to 0x%04x failed: %d\n",
242 ((addr >> IMX296_REG_SIZE_SHIFT) & 3) * 8,
243 addr & IMX296_REG_ADDR_MASK, ret);
244 if (err)
245 *err = ret;
246 }
247
248 return ret;
249 }
250
251 static int imx296_power_on(struct imx296 *sensor)
252 {
253 int ret;
254
255 ret = regulator_bulk_enable(ARRAY_SIZE(sensor->supplies),
256 sensor->supplies);
257 if (ret < 0)
258 return ret;
259
260 udelay(1);
261
262 ret = gpiod_direction_output(sensor->reset, 0);
263 if (ret < 0)
264 goto err_supply;
265
266 udelay(1);
267
268 ret = clk_prepare_enable(sensor->clk);
269 if (ret < 0)
270 goto err_reset;
271
272 /*
273 * The documentation doesn't explicitly say how much time is required
274 * after providing a clock and before starting I2C communication. It
275 * mentions a delay of 20µs in 4-wire mode, but tests showed that a
276 * delay of 100µs resulted in I2C communication failures, while 500µs
277 * seems to be enough. Be conservative.
278 */
279 usleep_range(1000, 2000);
280
281 return 0;
282
283 err_reset:
284 gpiod_direction_output(sensor->reset, 1);
285 err_supply:
286 regulator_bulk_disable(ARRAY_SIZE(sensor->supplies), sensor->supplies);
287 return ret;
288 }
289
290 static void imx296_power_off(struct imx296 *sensor)
291 {
292 clk_disable_unprepare(sensor->clk);
293 gpiod_direction_output(sensor->reset, 1);
294 regulator_bulk_disable(ARRAY_SIZE(sensor->supplies), sensor->supplies);
295 }
296
297 /* -----------------------------------------------------------------------------
298 * Controls
299 */
300
301 static const char * const imx296_test_pattern_menu[] = {
302 "Disabled",
303 "Multiple Pixels",
304 "Sequence 1",
305 "Sequence 2",
306 "Gradient",
307 "Row",
308 "Column",
309 "Cross",
310 "Stripe",
311 "Checks",
312 };
313
314 static int imx296_s_ctrl(struct v4l2_ctrl *ctrl)
315 {
316 struct imx296 *sensor = container_of(ctrl->handler, struct imx296, ctrls);
317 const struct v4l2_mbus_framefmt *format;
318 struct v4l2_subdev_state *state;
319 unsigned int vmax;
320 int ret = 0;
321
322 if (!pm_runtime_get_if_in_use(sensor->dev))
323 return 0;
324
325 state = v4l2_subdev_get_locked_active_state(&sensor->subdev);
326 format = v4l2_subdev_state_get_format(state, 0);
327
328 switch (ctrl->id) {
329 case V4L2_CID_EXPOSURE:
330 /* Clamp the exposure value to VMAX. */
331 vmax = format->height + sensor->vblank->cur.val;
332 ctrl->val = min_t(int, ctrl->val, vmax);
333 imx296_write(sensor, IMX296_SHS1, vmax - ctrl->val, &ret);
334 break;
335
336 case V4L2_CID_ANALOGUE_GAIN:
337 imx296_write(sensor, IMX296_GAIN, ctrl->val, &ret);
338 break;
339
340 case V4L2_CID_VBLANK:
341 imx296_write(sensor, IMX296_VMAX, format->height + ctrl->val,
342 &ret);
343 break;
344
345 case V4L2_CID_TEST_PATTERN:
346 if (ctrl->val) {
347 imx296_write(sensor, IMX296_PGHPOS, 8, &ret);
348 imx296_write(sensor, IMX296_PGVPOS, 8, &ret);
349 imx296_write(sensor, IMX296_PGHPSTEP, 8, &ret);
350 imx296_write(sensor, IMX296_PGVPSTEP, 8, &ret);
351 imx296_write(sensor, IMX296_PGHPNUM, 100, &ret);
352 imx296_write(sensor, IMX296_PGVPNUM, 100, &ret);
353 imx296_write(sensor, IMX296_PGDATA1, 0x300, &ret);
354 imx296_write(sensor, IMX296_PGDATA2, 0x100, &ret);
355 imx296_write(sensor, IMX296_PGHGSTEP, 0, &ret);
356 imx296_write(sensor, IMX296_BLKLEVEL, 0, &ret);
357 imx296_write(sensor, IMX296_BLKLEVELAUTO,
358 IMX296_BLKLEVELAUTO_OFF, &ret);
359 imx296_write(sensor, IMX296_PGCTRL,
360 IMX296_PGCTRL_REGEN |
361 IMX296_PGCTRL_CLKEN |
362 IMX296_PGCTRL_MODE(ctrl->val - 1), &ret);
363 } else {
364 imx296_write(sensor, IMX296_PGCTRL,
365 IMX296_PGCTRL_CLKEN, &ret);
366 imx296_write(sensor, IMX296_BLKLEVEL, 0x3c, &ret);
367 imx296_write(sensor, IMX296_BLKLEVELAUTO,
368 IMX296_BLKLEVELAUTO_ON, &ret);
369 }
370 break;
371
372 default:
373 ret = -EINVAL;
374 break;
375 }
376
377 pm_runtime_put(sensor->dev);
378
379 return ret;
380 }
381
382 static const struct v4l2_ctrl_ops imx296_ctrl_ops = {
383 .s_ctrl = imx296_s_ctrl,
384 };
385
386 static int imx296_ctrls_init(struct imx296 *sensor)
387 {
388 struct v4l2_fwnode_device_properties props;
389 unsigned int hblank;
390 int ret;
391
392 ret = v4l2_fwnode_device_parse(sensor->dev, &props);
393 if (ret < 0)
394 return ret;
395
396 v4l2_ctrl_handler_init(&sensor->ctrls, 9);
397
398 v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
399 V4L2_CID_EXPOSURE, 1, 1048575, 1, 1104);
400 v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
401 V4L2_CID_ANALOGUE_GAIN, IMX296_GAIN_MIN,
402 IMX296_GAIN_MAX, 1, IMX296_GAIN_MIN);
403
404 /*
405 * Horizontal blanking is controlled through the HMAX register, which
406 * contains a line length in INCK clock units. The INCK frequency is
407 * fixed to 74.25 MHz. The HMAX value is currently fixed to 1100,
408 * convert it to a number of pixels based on the nominal pixel rate.
409 */
410 hblank = 1100 * 1188000000ULL / 10 / 74250000
411 - IMX296_PIXEL_ARRAY_WIDTH;
412 sensor->hblank = v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
413 V4L2_CID_HBLANK, hblank, hblank, 1,
414 hblank);
415 if (sensor->hblank)
416 sensor->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
417
418 sensor->vblank = v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
419 V4L2_CID_VBLANK, 30,
420 1048575 - IMX296_PIXEL_ARRAY_HEIGHT,
421 1, 30);
422 /*
423 * The sensor calculates the MIPI timings internally to achieve a bit
424 * rate between 1122 and 1198 Mbps. The exact value is unfortunately not
425 * reported, at least according to the documentation. Report a nominal
426 * rate of 1188 Mbps as that is used by the datasheet in multiple
427 * examples.
428 */
429 v4l2_ctrl_new_std(&sensor->ctrls, NULL, V4L2_CID_PIXEL_RATE,
430 1122000000 / 10, 1198000000 / 10, 1, 1188000000 / 10);
431 v4l2_ctrl_new_std_menu_items(&sensor->ctrls, &imx296_ctrl_ops,
432 V4L2_CID_TEST_PATTERN,
433 ARRAY_SIZE(imx296_test_pattern_menu) - 1,
434 0, 0, imx296_test_pattern_menu);
435
436 v4l2_ctrl_new_fwnode_properties(&sensor->ctrls, &imx296_ctrl_ops,
437 &props);
438
439 if (sensor->ctrls.error) {
440 dev_err(sensor->dev, "failed to add controls (%d)\n",
441 sensor->ctrls.error);
442 v4l2_ctrl_handler_free(&sensor->ctrls);
443 return sensor->ctrls.error;
444 }
445
446 sensor->subdev.ctrl_handler = &sensor->ctrls;
447
448 return 0;
449 }
450
451 /* -----------------------------------------------------------------------------
452 * V4L2 Subdev Operations
453 */
454
455 /*
456 * This table is extracted from vendor data that is entirely undocumented. The
457 * first register write is required to activate the CSI-2 output. The other
458 * entries may or may not be optional?
459 */
460 static const struct {
461 unsigned int reg;
462 unsigned int value;
463 } imx296_init_table[] = {
464 { IMX296_REG_8BIT(0x3005), 0xf0 },
465 { IMX296_REG_8BIT(0x309e), 0x04 },
466 { IMX296_REG_8BIT(0x30a0), 0x04 },
467 { IMX296_REG_8BIT(0x30a1), 0x3c },
468 { IMX296_REG_8BIT(0x30a4), 0x5f },
469 { IMX296_REG_8BIT(0x30a8), 0x91 },
470 { IMX296_REG_8BIT(0x30ac), 0x28 },
471 { IMX296_REG_8BIT(0x30af), 0x09 },
472 { IMX296_REG_8BIT(0x30df), 0x00 },
473 { IMX296_REG_8BIT(0x3165), 0x00 },
474 { IMX296_REG_8BIT(0x3169), 0x10 },
475 { IMX296_REG_8BIT(0x316a), 0x02 },
476 { IMX296_REG_8BIT(0x31c8), 0xf3 }, /* Exposure-related */
477 { IMX296_REG_8BIT(0x31d0), 0xf4 }, /* Exposure-related */
478 { IMX296_REG_8BIT(0x321a), 0x00 },
479 { IMX296_REG_8BIT(0x3226), 0x02 },
480 { IMX296_REG_8BIT(0x3256), 0x01 },
481 { IMX296_REG_8BIT(0x3541), 0x72 },
482 { IMX296_REG_8BIT(0x3516), 0x77 },
483 { IMX296_REG_8BIT(0x350b), 0x7f },
484 { IMX296_REG_8BIT(0x3758), 0xa3 },
485 { IMX296_REG_8BIT(0x3759), 0x00 },
486 { IMX296_REG_8BIT(0x375a), 0x85 },
487 { IMX296_REG_8BIT(0x375b), 0x00 },
488 { IMX296_REG_8BIT(0x3832), 0xf5 },
489 { IMX296_REG_8BIT(0x3833), 0x00 },
490 { IMX296_REG_8BIT(0x38a2), 0xf6 },
491 { IMX296_REG_8BIT(0x38a3), 0x00 },
492 { IMX296_REG_8BIT(0x3a00), 0x80 },
493 { IMX296_REG_8BIT(0x3d48), 0xa3 },
494 { IMX296_REG_8BIT(0x3d49), 0x00 },
495 { IMX296_REG_8BIT(0x3d4a), 0x85 },
496 { IMX296_REG_8BIT(0x3d4b), 0x00 },
497 { IMX296_REG_8BIT(0x400e), 0x58 },
498 { IMX296_REG_8BIT(0x4014), 0x1c },
499 { IMX296_REG_8BIT(0x4041), 0x2a },
500 { IMX296_REG_8BIT(0x40a2), 0x06 },
501 { IMX296_REG_8BIT(0x40c1), 0xf6 },
502 { IMX296_REG_8BIT(0x40c7), 0x0f },
503 { IMX296_REG_8BIT(0x40c8), 0x00 },
504 { IMX296_REG_8BIT(0x4174), 0x00 },
505 };
506
507 static int imx296_setup(struct imx296 *sensor, struct v4l2_subdev_state *state)
508 {
509 const struct v4l2_mbus_framefmt *format;
510 const struct v4l2_rect *crop;
511 unsigned int i;
512 int ret = 0;
513
514 format = v4l2_subdev_state_get_format(state, 0);
515 crop = v4l2_subdev_state_get_crop(state, 0);
516
517 for (i = 0; i < ARRAY_SIZE(imx296_init_table); ++i)
518 imx296_write(sensor, imx296_init_table[i].reg,
519 imx296_init_table[i].value, &ret);
520
521 if (crop->width != IMX296_PIXEL_ARRAY_WIDTH ||
522 crop->height != IMX296_PIXEL_ARRAY_HEIGHT) {
523 imx296_write(sensor, IMX296_FID0_ROI,
524 IMX296_FID0_ROIH1ON | IMX296_FID0_ROIV1ON, &ret);
525 imx296_write(sensor, IMX296_FID0_ROIPH1, crop->left, &ret);
526 imx296_write(sensor, IMX296_FID0_ROIPV1, crop->top, &ret);
527 imx296_write(sensor, IMX296_FID0_ROIWH1, crop->width, &ret);
528 imx296_write(sensor, IMX296_FID0_ROIWV1, crop->height, &ret);
529 } else {
530 imx296_write(sensor, IMX296_FID0_ROI, 0, &ret);
531 }
532
533 imx296_write(sensor, IMX296_CTRL0D,
534 (crop->width != format->width ?
535 IMX296_CTRL0D_HADD_ON_BINNING : 0) |
536 (crop->height != format->height ?
537 IMX296_CTRL0D_WINMODE_FD_BINNING : 0),
538 &ret);
539
540 /*
541 * HMAX and VMAX configure horizontal and vertical blanking by
542 * specifying the total line time and frame time respectively. The line
543 * time is specified in operational clock units (which appears to be the
544 * output of an internal PLL, fixed at 74.25 MHz regardless of the
545 * exernal clock frequency), while the frame time is specified as a
546 * number of lines.
547 *
548 * In the vertical direction the sensor outputs the following:
549 *
550 * - one line for the FS packet
551 * - two lines of embedded data (DT 0x12)
552 * - six null lines (DT 0x10)
553 * - four lines of vertical effective optical black (DT 0x37)
554 * - 8 to 1088 lines of active image data (RAW10, DT 0x2b)
555 * - one line for the FE packet
556 * - 16 or more lines of vertical blanking
557 */
558 imx296_write(sensor, IMX296_HMAX, 1100, &ret);
559 imx296_write(sensor, IMX296_VMAX,
560 format->height + sensor->vblank->cur.val, &ret);
561
562 for (i = 0; i < ARRAY_SIZE(sensor->clk_params->incksel); ++i)
563 imx296_write(sensor, IMX296_INCKSEL(i),
564 sensor->clk_params->incksel[i], &ret);
565 imx296_write(sensor, IMX296_GTTABLENUM, 0xc5, &ret);
566 imx296_write(sensor, IMX296_CTRL418C, sensor->clk_params->ctrl418c,
567 &ret);
568
569 imx296_write(sensor, IMX296_GAINDLY, IMX296_GAINDLY_NONE, &ret);
570 imx296_write(sensor, IMX296_BLKLEVEL, 0x03c, &ret);
571
572 return ret;
573 }
574
575 static int imx296_stream_on(struct imx296 *sensor)
576 {
577 int ret = 0;
578
579 imx296_write(sensor, IMX296_CTRL00, 0, &ret);
580 usleep_range(2000, 5000);
581 imx296_write(sensor, IMX296_CTRL0A, 0, &ret);
582
583 return ret;
584 }
585
586 static int imx296_stream_off(struct imx296 *sensor)
587 {
588 int ret = 0;
589
590 imx296_write(sensor, IMX296_CTRL0A, IMX296_CTRL0A_XMSTA, &ret);
591 imx296_write(sensor, IMX296_CTRL00, IMX296_CTRL00_STANDBY, &ret);
592
593 return ret;
594 }
595
596 static int imx296_s_stream(struct v4l2_subdev *sd, int enable)
597 {
598 struct imx296 *sensor = to_imx296(sd);
599 struct v4l2_subdev_state *state;
600 int ret;
601
602 state = v4l2_subdev_lock_and_get_active_state(sd);
603
604 if (!enable) {
605 ret = imx296_stream_off(sensor);
606
607 pm_runtime_mark_last_busy(sensor->dev);
608 pm_runtime_put_autosuspend(sensor->dev);
609
610 goto unlock;
611 }
612
613 ret = pm_runtime_resume_and_get(sensor->dev);
614 if (ret < 0)
615 goto unlock;
616
617 ret = imx296_setup(sensor, state);
618 if (ret < 0)
619 goto err_pm;
620
621 ret = __v4l2_ctrl_handler_setup(&sensor->ctrls);
622 if (ret < 0)
623 goto err_pm;
624
625 ret = imx296_stream_on(sensor);
626 if (ret)
627 goto err_pm;
628
629 unlock:
630 v4l2_subdev_unlock_state(state);
631
632 return ret;
633
634 err_pm:
635 /*
636 * In case of error, turn the power off synchronously as the device
637 * likely has no other chance to recover.
638 */
639 pm_runtime_put_sync(sensor->dev);
640
641 goto unlock;
642 }
643
644 static int imx296_enum_mbus_code(struct v4l2_subdev *sd,
645 struct v4l2_subdev_state *state,
646 struct v4l2_subdev_mbus_code_enum *code)
647 {
648 struct imx296 *sensor = to_imx296(sd);
649
650 if (code->index != 0)
651 return -EINVAL;
652
653 code->code = sensor->mono ? MEDIA_BUS_FMT_Y10_1X10
654 : MEDIA_BUS_FMT_SBGGR10_1X10;
655
656 return 0;
657 }
658
659 static int imx296_enum_frame_size(struct v4l2_subdev *sd,
660 struct v4l2_subdev_state *state,
661 struct v4l2_subdev_frame_size_enum *fse)
662 {
663 const struct v4l2_mbus_framefmt *format;
664
665 format = v4l2_subdev_state_get_format(state, fse->pad);
666
667 if (fse->index >= 2 || fse->code != format->code)
668 return -EINVAL;
669
670 fse->min_width = IMX296_PIXEL_ARRAY_WIDTH / (fse->index + 1);
671 fse->max_width = fse->min_width;
672 fse->min_height = IMX296_PIXEL_ARRAY_HEIGHT / (fse->index + 1);
673 fse->max_height = fse->min_height;
674
675 return 0;
676 }
677
678 static int imx296_set_format(struct v4l2_subdev *sd,
679 struct v4l2_subdev_state *state,
680 struct v4l2_subdev_format *fmt)
681 {
682 struct imx296 *sensor = to_imx296(sd);
683 struct v4l2_mbus_framefmt *format;
684 struct v4l2_rect *crop;
685
686 crop = v4l2_subdev_state_get_crop(state, fmt->pad);
687 format = v4l2_subdev_state_get_format(state, fmt->pad);
688
689 /*
690 * Binning is only allowed when cropping is disabled according to the
691 * documentation. This should be double-checked.
692 */
693 if (crop->width == IMX296_PIXEL_ARRAY_WIDTH &&
694 crop->height == IMX296_PIXEL_ARRAY_HEIGHT) {
695 unsigned int width;
696 unsigned int height;
697 unsigned int hratio;
698 unsigned int vratio;
699
700 /* Clamp the width and height to avoid dividing by zero. */
701 width = clamp_t(unsigned int, fmt->format.width,
702 crop->width / 2, crop->width);
703 height = clamp_t(unsigned int, fmt->format.height,
704 crop->height / 2, crop->height);
705
706 hratio = DIV_ROUND_CLOSEST(crop->width, width);
707 vratio = DIV_ROUND_CLOSEST(crop->height, height);
708
709 format->width = crop->width / hratio;
710 format->height = crop->height / vratio;
711 } else {
712 format->width = crop->width;
713 format->height = crop->height;
714 }
715
716 format->code = sensor->mono ? MEDIA_BUS_FMT_Y10_1X10
717 : MEDIA_BUS_FMT_SBGGR10_1X10;
718 format->field = V4L2_FIELD_NONE;
719 format->colorspace = V4L2_COLORSPACE_RAW;
720 format->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
721 format->quantization = V4L2_QUANTIZATION_FULL_RANGE;
722 format->xfer_func = V4L2_XFER_FUNC_NONE;
723
724 fmt->format = *format;
725
726 return 0;
727 }
728
729 static int imx296_get_selection(struct v4l2_subdev *sd,
730 struct v4l2_subdev_state *state,
731 struct v4l2_subdev_selection *sel)
732 {
733 switch (sel->target) {
734 case V4L2_SEL_TGT_CROP:
735 sel->r = *v4l2_subdev_state_get_crop(state, sel->pad);
736 break;
737
738 case V4L2_SEL_TGT_CROP_DEFAULT:
739 case V4L2_SEL_TGT_CROP_BOUNDS:
740 case V4L2_SEL_TGT_NATIVE_SIZE:
741 sel->r.left = 0;
742 sel->r.top = 0;
743 sel->r.width = IMX296_PIXEL_ARRAY_WIDTH;
744 sel->r.height = IMX296_PIXEL_ARRAY_HEIGHT;
745 break;
746
747 default:
748 return -EINVAL;
749 }
750
751 return 0;
752 }
753
754 static int imx296_set_selection(struct v4l2_subdev *sd,
755 struct v4l2_subdev_state *state,
756 struct v4l2_subdev_selection *sel)
757 {
758 struct v4l2_mbus_framefmt *format;
759 struct v4l2_rect *crop;
760 struct v4l2_rect rect;
761
762 if (sel->target != V4L2_SEL_TGT_CROP)
763 return -EINVAL;
764
765 /*
766 * Clamp the crop rectangle boundaries and align them to a multiple of 4
767 * pixels to satisfy hardware requirements.
768 */
769 rect.left = clamp(ALIGN(sel->r.left, 4), 0,
770 IMX296_PIXEL_ARRAY_WIDTH - IMX296_FID0_ROIWH1_MIN);
771 rect.top = clamp(ALIGN(sel->r.top, 4), 0,
772 IMX296_PIXEL_ARRAY_HEIGHT - IMX296_FID0_ROIWV1_MIN);
773 rect.width = clamp_t(unsigned int, ALIGN(sel->r.width, 4),
774 IMX296_FID0_ROIWH1_MIN, IMX296_PIXEL_ARRAY_WIDTH);
775 rect.height = clamp_t(unsigned int, ALIGN(sel->r.height, 4),
776 IMX296_FID0_ROIWV1_MIN, IMX296_PIXEL_ARRAY_HEIGHT);
777
778 rect.width = min_t(unsigned int, rect.width,
779 IMX296_PIXEL_ARRAY_WIDTH - rect.left);
780 rect.height = min_t(unsigned int, rect.height,
781 IMX296_PIXEL_ARRAY_HEIGHT - rect.top);
782
783 crop = v4l2_subdev_state_get_crop(state, sel->pad);
784
785 if (rect.width != crop->width || rect.height != crop->height) {
786 /*
787 * Reset the output image size if the crop rectangle size has
788 * been modified.
789 */
790 format = v4l2_subdev_state_get_format(state, sel->pad);
791 format->width = rect.width;
792 format->height = rect.height;
793 }
794
795 *crop = rect;
796 sel->r = rect;
797
798 return 0;
799 }
800
801 static int imx296_init_state(struct v4l2_subdev *sd,
802 struct v4l2_subdev_state *state)
803 {
804 struct v4l2_subdev_selection sel = {
805 .target = V4L2_SEL_TGT_CROP,
806 .r.width = IMX296_PIXEL_ARRAY_WIDTH,
807 .r.height = IMX296_PIXEL_ARRAY_HEIGHT,
808 };
809 struct v4l2_subdev_format format = {
810 .format = {
811 .width = IMX296_PIXEL_ARRAY_WIDTH,
812 .height = IMX296_PIXEL_ARRAY_HEIGHT,
813 },
814 };
815
816 imx296_set_selection(sd, state, &sel);
817 imx296_set_format(sd, state, &format);
818
819 return 0;
820 }
821
822 static const struct v4l2_subdev_video_ops imx296_subdev_video_ops = {
823 .s_stream = imx296_s_stream,
824 };
825
826 static const struct v4l2_subdev_pad_ops imx296_subdev_pad_ops = {
827 .enum_mbus_code = imx296_enum_mbus_code,
828 .enum_frame_size = imx296_enum_frame_size,
829 .get_fmt = v4l2_subdev_get_fmt,
830 .set_fmt = imx296_set_format,
831 .get_selection = imx296_get_selection,
832 .set_selection = imx296_set_selection,
833 };
834
835 static const struct v4l2_subdev_ops imx296_subdev_ops = {
836 .video = &imx296_subdev_video_ops,
837 .pad = &imx296_subdev_pad_ops,
838 };
839
840 static const struct v4l2_subdev_internal_ops imx296_internal_ops = {
841 .init_state = imx296_init_state,
842 };
843
844 static int imx296_subdev_init(struct imx296 *sensor)
845 {
846 struct i2c_client *client = to_i2c_client(sensor->dev);
847 int ret;
848
849 v4l2_i2c_subdev_init(&sensor->subdev, client, &imx296_subdev_ops);
850 sensor->subdev.internal_ops = &imx296_internal_ops;
851
852 ret = imx296_ctrls_init(sensor);
853 if (ret < 0)
854 return ret;
855
856 sensor->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
857 sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
858 sensor->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR;
859 ret = media_entity_pads_init(&sensor->subdev.entity, 1, &sensor->pad);
860 if (ret < 0) {
861 v4l2_ctrl_handler_free(&sensor->ctrls);
862 return ret;
863 }
864
865 sensor->subdev.state_lock = sensor->subdev.ctrl_handler->lock;
866
867 v4l2_subdev_init_finalize(&sensor->subdev);
868
869 return ret;
870 }
871
872 static void imx296_subdev_cleanup(struct imx296 *sensor)
873 {
874 media_entity_cleanup(&sensor->subdev.entity);
875 v4l2_ctrl_handler_free(&sensor->ctrls);
876 }
877
878 /* -----------------------------------------------------------------------------
879 * Power management
880 */
881
882 static int __maybe_unused imx296_runtime_resume(struct device *dev)
883 {
884 struct i2c_client *client = to_i2c_client(dev);
885 struct v4l2_subdev *subdev = i2c_get_clientdata(client);
886 struct imx296 *sensor = to_imx296(subdev);
887
888 return imx296_power_on(sensor);
889 }
890
891 static int __maybe_unused imx296_runtime_suspend(struct device *dev)
892 {
893 struct i2c_client *client = to_i2c_client(dev);
894 struct v4l2_subdev *subdev = i2c_get_clientdata(client);
895 struct imx296 *sensor = to_imx296(subdev);
896
897 imx296_power_off(sensor);
898
899 return 0;
900 }
901
902 static const struct dev_pm_ops imx296_pm_ops = {
903 SET_RUNTIME_PM_OPS(imx296_runtime_suspend, imx296_runtime_resume, NULL)
904 };
905
906 /* -----------------------------------------------------------------------------
907 * Probe & Remove
908 */
909
910 static int imx296_read_temperature(struct imx296 *sensor, int *temp)
911 {
912 int tmdout;
913 int ret;
914
915 ret = imx296_write(sensor, IMX296_TMDCTRL, IMX296_TMDCTRL_LATCH, NULL);
916 if (ret < 0)
917 return ret;
918
919 tmdout = imx296_read(sensor, IMX296_TMDOUT);
920 if (tmdout < 0)
921 return tmdout;
922
923 tmdout &= IMX296_TMDOUT_MASK;
924
925 /* T(°C) = 246.312 - 0.304 * TMDOUT */;
926 *temp = 246312 - 304 * tmdout;
927
928 return imx296_write(sensor, IMX296_TMDCTRL, 0, NULL);
929 }
930
931 static int imx296_identify_model(struct imx296 *sensor)
932 {
933 unsigned int model;
934 int temp = 0;
935 int ret;
936
937 model = (uintptr_t)of_device_get_match_data(sensor->dev);
938 if (model) {
939 dev_dbg(sensor->dev,
940 "sensor model auto-detection disabled, forcing 0x%04x\n",
941 model);
942 sensor->mono = model & IMX296_SENSOR_INFO_MONO;
943 return 0;
944 }
945
946 /*
947 * While most registers can be read when the sensor is in standby, this
948 * is not the case of the sensor info register :-(
949 */
950 ret = imx296_write(sensor, IMX296_CTRL00, 0, NULL);
951 if (ret < 0) {
952 dev_err(sensor->dev,
953 "failed to get sensor out of standby (%d)\n", ret);
954 return ret;
955 }
956
957 ret = imx296_read(sensor, IMX296_SENSOR_INFO);
958 if (ret < 0) {
959 dev_err(sensor->dev, "failed to read sensor information (%d)\n",
960 ret);
961 goto done;
962 }
963
964 model = (ret >> 6) & 0x1ff;
965
966 switch (model) {
967 case 296:
968 sensor->mono = ret & IMX296_SENSOR_INFO_MONO;
969 break;
970 /*
971 * The IMX297 seems to share features with the IMX296, it may be
972 * possible to support it in the same driver.
973 */
974 case 297:
975 default:
976 dev_err(sensor->dev, "invalid device model 0x%04x\n", ret);
977 ret = -ENODEV;
978 goto done;
979 }
980
981 ret = imx296_read_temperature(sensor, &temp);
982 if (ret < 0)
983 goto done;
984
985 dev_info(sensor->dev, "found IMX%u%s (%u.%uC)\n", model,
986 sensor->mono ? "LL" : "LQ", temp / 1000, (temp / 100) % 10);
987
988 done:
989 imx296_write(sensor, IMX296_CTRL00, IMX296_CTRL00_STANDBY, NULL);
990 return ret;
991 }
992
993 static const struct regmap_config imx296_regmap_config = {
994 .reg_bits = 16,
995 .val_bits = 8,
996
997 .wr_table = &(const struct regmap_access_table) {
998 .no_ranges = (const struct regmap_range[]) {
999 {
1000 .range_min = IMX296_SENSOR_INFO & 0xffff,
1001 .range_max = (IMX296_SENSOR_INFO & 0xffff) + 1,
1002 },
1003 },
1004 .n_no_ranges = 1,
1005 },
1006 };
1007
1008 static int imx296_probe(struct i2c_client *client)
1009 {
1010 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
1011 unsigned long clk_rate;
1012 struct imx296 *sensor;
1013 unsigned int i;
1014 int ret;
1015
1016 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1017 dev_warn(&adapter->dev,
1018 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
1019 return -EIO;
1020 }
1021
1022 sensor = devm_kzalloc(&client->dev, sizeof(*sensor), GFP_KERNEL);
1023 if (!sensor)
1024 return -ENOMEM;
1025
1026 sensor->dev = &client->dev;
1027
1028 /* Acquire resources. */
1029 for (i = 0; i < ARRAY_SIZE(sensor->supplies); ++i)
1030 sensor->supplies[i].supply = imx296_supply_names[i];
1031
1032 ret = devm_regulator_bulk_get(sensor->dev, ARRAY_SIZE(sensor->supplies),
1033 sensor->supplies);
1034 if (ret) {
1035 dev_err_probe(sensor->dev, ret, "failed to get supplies\n");
1036 return ret;
1037 }
1038
1039 sensor->reset = devm_gpiod_get_optional(sensor->dev, "reset",
1040 GPIOD_OUT_HIGH);
1041 if (IS_ERR(sensor->reset))
1042 return dev_err_probe(sensor->dev, PTR_ERR(sensor->reset),
1043 "failed to get reset GPIO\n");
1044
1045 sensor->clk = devm_clk_get(sensor->dev, "inck");
1046 if (IS_ERR(sensor->clk))
1047 return dev_err_probe(sensor->dev, PTR_ERR(sensor->clk),
1048 "failed to get clock\n");
1049
1050 clk_rate = clk_get_rate(sensor->clk);
1051 for (i = 0; i < ARRAY_SIZE(imx296_clk_params); ++i) {
1052 if (clk_rate == imx296_clk_params[i].freq) {
1053 sensor->clk_params = &imx296_clk_params[i];
1054 break;
1055 }
1056 }
1057
1058 if (!sensor->clk_params) {
1059 dev_err(sensor->dev, "unsupported clock rate %lu\n", clk_rate);
1060 return -EINVAL;
1061 }
1062
1063 sensor->regmap = devm_regmap_init_i2c(client, &imx296_regmap_config);
1064 if (IS_ERR(sensor->regmap))
1065 return PTR_ERR(sensor->regmap);
1066
1067 /*
1068 * Enable power management. The driver supports runtime PM, but needs to
1069 * work when runtime PM is disabled in the kernel. To that end, power
1070 * the sensor on manually here, identify it, and fully initialize it.
1071 */
1072 ret = imx296_power_on(sensor);
1073 if (ret < 0)
1074 return ret;
1075
1076 ret = imx296_identify_model(sensor);
1077 if (ret < 0)
1078 goto err_power;
1079
1080 /* Initialize the V4L2 subdev. */
1081 ret = imx296_subdev_init(sensor);
1082 if (ret < 0)
1083 goto err_power;
1084
1085 /*
1086 * Enable runtime PM. As the device has been powered manually, mark it
1087 * as active, and increase the usage count without resuming the device.
1088 */
1089 pm_runtime_set_active(sensor->dev);
1090 pm_runtime_get_noresume(sensor->dev);
1091 pm_runtime_enable(sensor->dev);
1092
1093 /* Register the V4L2 subdev. */
1094 ret = v4l2_async_register_subdev(&sensor->subdev);
1095 if (ret < 0)
1096 goto err_pm;
1097
1098 /*
1099 * Finally, enable autosuspend and decrease the usage count. The device
1100 * will get suspended after the autosuspend delay, turning the power
1101 * off.
1102 */
1103 pm_runtime_set_autosuspend_delay(sensor->dev, 1000);
1104 pm_runtime_use_autosuspend(sensor->dev);
1105 pm_runtime_put_autosuspend(sensor->dev);
1106
1107 return 0;
1108
1109 err_pm:
1110 pm_runtime_disable(sensor->dev);
1111 pm_runtime_put_noidle(sensor->dev);
1112 imx296_subdev_cleanup(sensor);
1113 err_power:
1114 imx296_power_off(sensor);
1115 return ret;
1116 }
1117
1118 static void imx296_remove(struct i2c_client *client)
1119 {
1120 struct v4l2_subdev *subdev = i2c_get_clientdata(client);
1121 struct imx296 *sensor = to_imx296(subdev);
1122
1123 v4l2_async_unregister_subdev(subdev);
1124
1125 imx296_subdev_cleanup(sensor);
1126
1127 /*
1128 * Disable runtime PM. In case runtime PM is disabled in the kernel,
1129 * make sure to turn power off manually.
1130 */
1131 pm_runtime_disable(sensor->dev);
1132 if (!pm_runtime_status_suspended(sensor->dev))
1133 imx296_power_off(sensor);
1134 pm_runtime_set_suspended(sensor->dev);
1135 }
1136
1137 static const struct of_device_id imx296_of_match[] = {
1138 { .compatible = "sony,imx296", .data = NULL },
1139 { .compatible = "sony,imx296ll", .data = (void *)IMX296_SENSOR_INFO_IMX296LL },
1140 { .compatible = "sony,imx296lq", .data = (void *)IMX296_SENSOR_INFO_IMX296LQ },
1141 { /* sentinel */ },
1142 };
1143 MODULE_DEVICE_TABLE(of, imx296_of_match);
1144
1145 static struct i2c_driver imx296_i2c_driver = {
1146 .driver = {
1147 .of_match_table = imx296_of_match,
1148 .name = "imx296",
1149 .pm = &imx296_pm_ops
1150 },
1151 .probe = imx296_probe,
1152 .remove = imx296_remove,
1153 };
1154
1155 module_i2c_driver(imx296_i2c_driver);
1156
1157 MODULE_DESCRIPTION("Sony IMX296 Camera driver");
1158 MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
1159 MODULE_LICENSE("GPL");
Kernel DRM miscellaneous fixes and cross-tree changes