1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * driver for Earthsoft PT1/PT2
5 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
7 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
8 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
11 #include <linux/kernel.h>
12 #include <linux/sched.h>
13 #include <linux/sched/signal.h>
14 #include <linux/hrtimer.h>
15 #include <linux/delay.h>
16 #include <linux/module.h>
17 #include <linux/slab.h>
18 #include <linux/vmalloc.h>
19 #include <linux/pci.h>
20 #include <linux/kthread.h>
21 #include <linux/freezer.h>
22 #include <linux/ratelimit.h>
23 #include <linux/string.h>
24 #include <linux/i2c.h>
26 #include <media/dvbdev.h>
27 #include <media/dvb_demux.h>
28 #include <media/dmxdev.h>
29 #include <media/dvb_net.h>
30 #include <media/dvb_frontend.h>
33 #include "qm1d1b0004.h"
36 #define DRIVER_NAME "earth-pt1"
38 #define PT1_PAGE_SHIFT 12
39 #define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
40 #define PT1_NR_UPACKETS 1024
41 #define PT1_NR_BUFS 511
43 struct pt1_buffer_page
{
44 __le32 upackets
[PT1_NR_UPACKETS
];
47 struct pt1_table_page
{
49 __le32 buf_pfns
[PT1_NR_BUFS
];
53 struct pt1_buffer_page
*page
;
58 struct pt1_table_page
*page
;
60 struct pt1_buffer bufs
[PT1_NR_BUFS
];
64 PT1_FE_CLK_20MHZ
, /* PT1 */
65 PT1_FE_CLK_25MHZ
, /* PT2 */
68 #define PT1_NR_ADAPS 4
75 struct i2c_adapter i2c_adap
;
77 struct pt1_adapter
*adaps
[PT1_NR_ADAPS
];
78 struct pt1_table
*tables
;
79 struct task_struct
*kthread
;
87 enum pt1_fe_clk fe_clk
;
99 struct dvb_adapter adap
;
100 struct dvb_demux demux
;
102 struct dmxdev dmxdev
;
103 struct dvb_frontend
*fe
;
104 struct i2c_client
*demod_i2c_client
;
105 struct i2c_client
*tuner_i2c_client
;
106 int (*orig_set_voltage
)(struct dvb_frontend
*fe
,
107 enum fe_sec_voltage voltage
);
108 int (*orig_sleep
)(struct dvb_frontend
*fe
);
109 int (*orig_init
)(struct dvb_frontend
*fe
);
111 enum fe_sec_voltage voltage
;
115 union pt1_tuner_config
{
116 struct qm1d1b0004_config qm1d1b0004
;
117 struct dvb_pll_config tda6651
;
121 struct i2c_board_info demod_info
;
122 struct tc90522_config demod_cfg
;
124 struct i2c_board_info tuner_info
;
125 union pt1_tuner_config tuner_cfg
;
128 static const struct pt1_config pt1_configs
[PT1_NR_ADAPS
] = {
131 I2C_BOARD_INFO(TC90522_I2C_DEV_SAT
, 0x1b),
134 I2C_BOARD_INFO("qm1d1b0004", 0x60),
139 I2C_BOARD_INFO(TC90522_I2C_DEV_TER
, 0x1a),
142 I2C_BOARD_INFO("tda665x_earthpt1", 0x61),
147 I2C_BOARD_INFO(TC90522_I2C_DEV_SAT
, 0x19),
150 I2C_BOARD_INFO("qm1d1b0004", 0x60),
155 I2C_BOARD_INFO(TC90522_I2C_DEV_TER
, 0x18),
158 I2C_BOARD_INFO("tda665x_earthpt1", 0x61),
163 static const u8 va1j5jf8007s_20mhz_configs
[][2] = {
164 {0x04, 0x02}, {0x0d, 0x55}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01},
165 {0x1c, 0x0a}, {0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0},
166 {0x52, 0x89}, {0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69},
167 {0x87, 0x04}, {0x8e, 0x02}, {0xa3, 0xf7}, {0xa5, 0xc0},
170 static const u8 va1j5jf8007s_25mhz_configs
[][2] = {
171 {0x04, 0x02}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01}, {0x1c, 0x0a},
172 {0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0}, {0x52, 0x89},
173 {0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69}, {0x87, 0x04},
174 {0x8e, 0x26}, {0xa3, 0xf7}, {0xa5, 0xc0},
177 static const u8 va1j5jf8007t_20mhz_configs
[][2] = {
178 {0x03, 0x90}, {0x14, 0x8f}, {0x1c, 0x2a}, {0x1d, 0xa8}, {0x1e, 0xa2},
179 {0x22, 0x83}, {0x31, 0x0d}, {0x32, 0xe0}, {0x39, 0xd3}, {0x3a, 0x00},
180 {0x3b, 0x11}, {0x3c, 0x3f},
181 {0x5c, 0x40}, {0x5f, 0x80}, {0x75, 0x02}, {0x76, 0x4e}, {0x77, 0x03},
185 static const u8 va1j5jf8007t_25mhz_configs
[][2] = {
186 {0x03, 0x90}, {0x1c, 0x2a}, {0x1d, 0xa8}, {0x1e, 0xa2}, {0x22, 0x83},
187 {0x3a, 0x04}, {0x3b, 0x11}, {0x3c, 0x3f}, {0x5c, 0x40}, {0x5f, 0x80},
188 {0x75, 0x0a}, {0x76, 0x4c}, {0x77, 0x03}, {0xef, 0x01}
191 static int config_demod(struct i2c_client
*cl
, enum pt1_fe_clk clk
)
195 const u8 (*cfg_data
)[2];
198 is_sat
= !strncmp(cl
->name
, TC90522_I2C_DEV_SAT
,
199 strlen(TC90522_I2C_DEV_SAT
));
201 struct i2c_msg msg
[2];
205 msg
[0].addr
= cl
->addr
;
210 msg
[1].addr
= cl
->addr
;
211 msg
[1].flags
= I2C_M_RD
;
214 ret
= i2c_transfer(cl
->adapter
, msg
, 2);
222 if (clk
== PT1_FE_CLK_20MHZ
) {
224 cfg_data
= va1j5jf8007s_20mhz_configs
;
225 len
= ARRAY_SIZE(va1j5jf8007s_20mhz_configs
);
227 cfg_data
= va1j5jf8007t_20mhz_configs
;
228 len
= ARRAY_SIZE(va1j5jf8007t_20mhz_configs
);
232 cfg_data
= va1j5jf8007s_25mhz_configs
;
233 len
= ARRAY_SIZE(va1j5jf8007s_25mhz_configs
);
235 cfg_data
= va1j5jf8007t_25mhz_configs
;
236 len
= ARRAY_SIZE(va1j5jf8007t_25mhz_configs
);
240 for (i
= 0; i
< len
; i
++) {
241 ret
= i2c_master_send(cl
, cfg_data
[i
], 2);
249 * Init registers for (each pair of) terrestrial/satellite block in demod.
250 * Note that resetting terr. block also resets its peer sat. block as well.
251 * This function must be called before configuring any demod block
252 * (before pt1_wakeup(), fe->ops.init()).
254 static int pt1_demod_block_init(struct pt1
*pt1
)
256 struct i2c_client
*cl
;
257 u8 buf
[2] = {0x01, 0x80};
261 /* reset all terr. & sat. pairs first */
262 for (i
= 0; i
< PT1_NR_ADAPS
; i
++) {
263 cl
= pt1
->adaps
[i
]->demod_i2c_client
;
264 if (strncmp(cl
->name
, TC90522_I2C_DEV_TER
,
265 strlen(TC90522_I2C_DEV_TER
)))
268 ret
= i2c_master_send(cl
, buf
, 2);
271 usleep_range(30000, 50000);
274 for (i
= 0; i
< PT1_NR_ADAPS
; i
++) {
275 cl
= pt1
->adaps
[i
]->demod_i2c_client
;
276 if (strncmp(cl
->name
, TC90522_I2C_DEV_SAT
,
277 strlen(TC90522_I2C_DEV_SAT
)))
280 ret
= i2c_master_send(cl
, buf
, 2);
283 usleep_range(30000, 50000);
288 static void pt1_write_reg(struct pt1
*pt1
, int reg
, u32 data
)
290 writel(data
, pt1
->regs
+ reg
* 4);
293 static u32
pt1_read_reg(struct pt1
*pt1
, int reg
)
295 return readl(pt1
->regs
+ reg
* 4);
298 static unsigned int pt1_nr_tables
= 8;
299 module_param_named(nr_tables
, pt1_nr_tables
, uint
, 0);
301 static void pt1_increment_table_count(struct pt1
*pt1
)
303 pt1_write_reg(pt1
, 0, 0x00000020);
306 static void pt1_init_table_count(struct pt1
*pt1
)
308 pt1_write_reg(pt1
, 0, 0x00000010);
311 static void pt1_register_tables(struct pt1
*pt1
, u32 first_pfn
)
313 pt1_write_reg(pt1
, 5, first_pfn
);
314 pt1_write_reg(pt1
, 0, 0x0c000040);
317 static void pt1_unregister_tables(struct pt1
*pt1
)
319 pt1_write_reg(pt1
, 0, 0x08080000);
322 static int pt1_sync(struct pt1
*pt1
)
325 for (i
= 0; i
< 57; i
++) {
326 if (pt1_read_reg(pt1
, 0) & 0x20000000)
328 pt1_write_reg(pt1
, 0, 0x00000008);
330 dev_err(&pt1
->pdev
->dev
, "could not sync\n");
334 static u64
pt1_identify(struct pt1
*pt1
)
338 for (i
= 0; i
< 57; i
++) {
339 id
|= (u64
)(pt1_read_reg(pt1
, 0) >> 30 & 1) << i
;
340 pt1_write_reg(pt1
, 0, 0x00000008);
345 static int pt1_unlock(struct pt1
*pt1
)
348 pt1_write_reg(pt1
, 0, 0x00000008);
349 for (i
= 0; i
< 3; i
++) {
350 if (pt1_read_reg(pt1
, 0) & 0x80000000)
352 usleep_range(1000, 2000);
354 dev_err(&pt1
->pdev
->dev
, "could not unlock\n");
358 static int pt1_reset_pci(struct pt1
*pt1
)
361 pt1_write_reg(pt1
, 0, 0x01010000);
362 pt1_write_reg(pt1
, 0, 0x01000000);
363 for (i
= 0; i
< 10; i
++) {
364 if (pt1_read_reg(pt1
, 0) & 0x00000001)
366 usleep_range(1000, 2000);
368 dev_err(&pt1
->pdev
->dev
, "could not reset PCI\n");
372 static int pt1_reset_ram(struct pt1
*pt1
)
375 pt1_write_reg(pt1
, 0, 0x02020000);
376 pt1_write_reg(pt1
, 0, 0x02000000);
377 for (i
= 0; i
< 10; i
++) {
378 if (pt1_read_reg(pt1
, 0) & 0x00000002)
380 usleep_range(1000, 2000);
382 dev_err(&pt1
->pdev
->dev
, "could not reset RAM\n");
386 static int pt1_do_enable_ram(struct pt1
*pt1
)
390 status
= pt1_read_reg(pt1
, 0) & 0x00000004;
391 pt1_write_reg(pt1
, 0, 0x00000002);
392 for (i
= 0; i
< 10; i
++) {
393 for (j
= 0; j
< 1024; j
++) {
394 if ((pt1_read_reg(pt1
, 0) & 0x00000004) != status
)
397 usleep_range(1000, 2000);
399 dev_err(&pt1
->pdev
->dev
, "could not enable RAM\n");
403 static int pt1_enable_ram(struct pt1
*pt1
)
407 usleep_range(1000, 2000);
408 phase
= pt1
->pdev
->device
== 0x211a ? 128 : 166;
409 for (i
= 0; i
< phase
; i
++) {
410 ret
= pt1_do_enable_ram(pt1
);
417 static void pt1_disable_ram(struct pt1
*pt1
)
419 pt1_write_reg(pt1
, 0, 0x0b0b0000);
422 static void pt1_set_stream(struct pt1
*pt1
, int index
, int enabled
)
424 pt1_write_reg(pt1
, 2, 1 << (index
+ 8) | enabled
<< index
);
427 static void pt1_init_streams(struct pt1
*pt1
)
430 for (i
= 0; i
< PT1_NR_ADAPS
; i
++)
431 pt1_set_stream(pt1
, i
, 0);
434 static int pt1_filter(struct pt1
*pt1
, struct pt1_buffer_page
*page
)
439 struct pt1_adapter
*adap
;
444 if (!page
->upackets
[PT1_NR_UPACKETS
- 1])
447 for (i
= 0; i
< PT1_NR_UPACKETS
; i
++) {
448 upacket
= le32_to_cpu(page
->upackets
[i
]);
449 index
= (upacket
>> 29) - 1;
450 if (index
< 0 || index
>= PT1_NR_ADAPS
)
453 adap
= pt1
->adaps
[index
];
454 if (upacket
>> 25 & 1)
455 adap
->upacket_count
= 0;
456 else if (!adap
->upacket_count
)
459 if (upacket
>> 24 & 1)
460 printk_ratelimited(KERN_INFO
"earth-pt1: device buffer overflowing. table[%d] buf[%d]\n",
461 pt1
->table_index
, pt1
->buf_index
);
462 sc
= upacket
>> 26 & 0x7;
463 if (adap
->st_count
!= -1 && sc
!= ((adap
->st_count
+ 1) & 0x7))
464 printk_ratelimited(KERN_INFO
"earth-pt1: data loss in streamID(adapter)[%d]\n",
469 offset
= adap
->packet_count
* 188 + adap
->upacket_count
* 3;
470 buf
[offset
] = upacket
>> 16;
471 buf
[offset
+ 1] = upacket
>> 8;
472 if (adap
->upacket_count
!= 62)
473 buf
[offset
+ 2] = upacket
;
475 if (++adap
->upacket_count
>= 63) {
476 adap
->upacket_count
= 0;
477 if (++adap
->packet_count
>= 21) {
478 dvb_dmx_swfilter_packets(&adap
->demux
, buf
, 21);
479 adap
->packet_count
= 0;
484 page
->upackets
[PT1_NR_UPACKETS
- 1] = 0;
488 static int pt1_thread(void *data
)
491 struct pt1_buffer_page
*page
;
494 #define PT1_FETCH_DELAY 10
495 #define PT1_FETCH_DELAY_DELTA 2
500 while (!kthread_freezable_should_stop(&was_frozen
)) {
504 for (i
= 0; i
< PT1_NR_ADAPS
; i
++)
505 pt1_set_stream(pt1
, i
, !!pt1
->adaps
[i
]->users
);
508 page
= pt1
->tables
[pt1
->table_index
].bufs
[pt1
->buf_index
].page
;
509 if (!pt1_filter(pt1
, page
)) {
512 delay
= ktime_set(0, PT1_FETCH_DELAY
* NSEC_PER_MSEC
);
513 set_current_state(TASK_INTERRUPTIBLE
);
514 schedule_hrtimeout_range(&delay
,
515 PT1_FETCH_DELAY_DELTA
* NSEC_PER_MSEC
,
520 if (++pt1
->buf_index
>= PT1_NR_BUFS
) {
521 pt1_increment_table_count(pt1
);
523 if (++pt1
->table_index
>= pt1_nr_tables
)
524 pt1
->table_index
= 0;
531 static void pt1_free_page(struct pt1
*pt1
, void *page
, dma_addr_t addr
)
533 dma_free_coherent(&pt1
->pdev
->dev
, PT1_PAGE_SIZE
, page
, addr
);
536 static void *pt1_alloc_page(struct pt1
*pt1
, dma_addr_t
*addrp
, u32
*pfnp
)
541 page
= dma_alloc_coherent(&pt1
->pdev
->dev
, PT1_PAGE_SIZE
, &addr
,
546 BUG_ON(addr
& (PT1_PAGE_SIZE
- 1));
547 BUG_ON(addr
>> PT1_PAGE_SHIFT
>> 31 >> 1);
550 *pfnp
= addr
>> PT1_PAGE_SHIFT
;
554 static void pt1_cleanup_buffer(struct pt1
*pt1
, struct pt1_buffer
*buf
)
556 pt1_free_page(pt1
, buf
->page
, buf
->addr
);
560 pt1_init_buffer(struct pt1
*pt1
, struct pt1_buffer
*buf
, u32
*pfnp
)
562 struct pt1_buffer_page
*page
;
565 page
= pt1_alloc_page(pt1
, &addr
, pfnp
);
569 page
->upackets
[PT1_NR_UPACKETS
- 1] = 0;
576 static void pt1_cleanup_table(struct pt1
*pt1
, struct pt1_table
*table
)
580 for (i
= 0; i
< PT1_NR_BUFS
; i
++)
581 pt1_cleanup_buffer(pt1
, &table
->bufs
[i
]);
583 pt1_free_page(pt1
, table
->page
, table
->addr
);
587 pt1_init_table(struct pt1
*pt1
, struct pt1_table
*table
, u32
*pfnp
)
589 struct pt1_table_page
*page
;
594 page
= pt1_alloc_page(pt1
, &addr
, pfnp
);
598 for (i
= 0; i
< PT1_NR_BUFS
; i
++) {
599 ret
= pt1_init_buffer(pt1
, &table
->bufs
[i
], &buf_pfn
);
603 page
->buf_pfns
[i
] = cpu_to_le32(buf_pfn
);
606 pt1_increment_table_count(pt1
);
613 pt1_cleanup_buffer(pt1
, &table
->bufs
[i
]);
615 pt1_free_page(pt1
, page
, addr
);
619 static void pt1_cleanup_tables(struct pt1
*pt1
)
621 struct pt1_table
*tables
;
624 tables
= pt1
->tables
;
625 pt1_unregister_tables(pt1
);
627 for (i
= 0; i
< pt1_nr_tables
; i
++)
628 pt1_cleanup_table(pt1
, &tables
[i
]);
633 static int pt1_init_tables(struct pt1
*pt1
)
635 struct pt1_table
*tables
;
642 tables
= vmalloc(array_size(pt1_nr_tables
, sizeof(struct pt1_table
)));
646 pt1_init_table_count(pt1
);
649 ret
= pt1_init_table(pt1
, &tables
[0], &first_pfn
);
654 while (i
< pt1_nr_tables
) {
655 ret
= pt1_init_table(pt1
, &tables
[i
], &pfn
);
658 tables
[i
- 1].page
->next_pfn
= cpu_to_le32(pfn
);
662 tables
[pt1_nr_tables
- 1].page
->next_pfn
= cpu_to_le32(first_pfn
);
664 pt1_register_tables(pt1
, first_pfn
);
665 pt1
->tables
= tables
;
670 pt1_cleanup_table(pt1
, &tables
[i
]);
676 static int pt1_start_polling(struct pt1
*pt1
)
680 mutex_lock(&pt1
->lock
);
682 pt1
->kthread
= kthread_run(pt1_thread
, pt1
, "earth-pt1");
683 if (IS_ERR(pt1
->kthread
)) {
684 ret
= PTR_ERR(pt1
->kthread
);
688 mutex_unlock(&pt1
->lock
);
692 static int pt1_start_feed(struct dvb_demux_feed
*feed
)
694 struct pt1_adapter
*adap
;
695 adap
= container_of(feed
->demux
, struct pt1_adapter
, demux
);
696 if (!adap
->users
++) {
699 ret
= pt1_start_polling(adap
->pt1
);
702 pt1_set_stream(adap
->pt1
, adap
->index
, 1);
707 static void pt1_stop_polling(struct pt1
*pt1
)
711 mutex_lock(&pt1
->lock
);
712 for (i
= 0, count
= 0; i
< PT1_NR_ADAPS
; i
++)
713 count
+= pt1
->adaps
[i
]->users
;
715 if (count
== 0 && pt1
->kthread
) {
716 kthread_stop(pt1
->kthread
);
719 mutex_unlock(&pt1
->lock
);
722 static int pt1_stop_feed(struct dvb_demux_feed
*feed
)
724 struct pt1_adapter
*adap
;
725 adap
= container_of(feed
->demux
, struct pt1_adapter
, demux
);
726 if (!--adap
->users
) {
727 pt1_set_stream(adap
->pt1
, adap
->index
, 0);
728 pt1_stop_polling(adap
->pt1
);
734 pt1_update_power(struct pt1
*pt1
)
738 struct pt1_adapter
*adap
;
739 static const int sleep_bits
[] = {
746 bits
= pt1
->power
| !pt1
->reset
<< 3;
747 mutex_lock(&pt1
->lock
);
748 for (i
= 0; i
< PT1_NR_ADAPS
; i
++) {
749 adap
= pt1
->adaps
[i
];
750 switch (adap
->voltage
) {
751 case SEC_VOLTAGE_13
: /* actually 11V */
754 case SEC_VOLTAGE_18
: /* actually 15V */
755 bits
|= 1 << 1 | 1 << 2;
761 /* XXX: The bits should be changed depending on adap->sleep. */
762 bits
|= sleep_bits
[i
];
764 pt1_write_reg(pt1
, 1, bits
);
765 mutex_unlock(&pt1
->lock
);
768 static int pt1_set_voltage(struct dvb_frontend
*fe
, enum fe_sec_voltage voltage
)
770 struct pt1_adapter
*adap
;
772 adap
= container_of(fe
->dvb
, struct pt1_adapter
, adap
);
773 adap
->voltage
= voltage
;
774 pt1_update_power(adap
->pt1
);
776 if (adap
->orig_set_voltage
)
777 return adap
->orig_set_voltage(fe
, voltage
);
782 static int pt1_sleep(struct dvb_frontend
*fe
)
784 struct pt1_adapter
*adap
;
787 adap
= container_of(fe
->dvb
, struct pt1_adapter
, adap
);
790 if (adap
->orig_sleep
)
791 ret
= adap
->orig_sleep(fe
);
794 pt1_update_power(adap
->pt1
);
798 static int pt1_wakeup(struct dvb_frontend
*fe
)
800 struct pt1_adapter
*adap
;
803 adap
= container_of(fe
->dvb
, struct pt1_adapter
, adap
);
805 pt1_update_power(adap
->pt1
);
806 usleep_range(1000, 2000);
808 ret
= config_demod(adap
->demod_i2c_client
, adap
->pt1
->fe_clk
);
809 if (ret
== 0 && adap
->orig_init
)
810 ret
= adap
->orig_init(fe
);
814 static void pt1_free_adapter(struct pt1_adapter
*adap
)
816 adap
->demux
.dmx
.close(&adap
->demux
.dmx
);
817 dvb_dmxdev_release(&adap
->dmxdev
);
818 dvb_dmx_release(&adap
->demux
);
819 dvb_unregister_adapter(&adap
->adap
);
820 free_page((unsigned long)adap
->buf
);
824 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr
);
826 static struct pt1_adapter
*
827 pt1_alloc_adapter(struct pt1
*pt1
)
829 struct pt1_adapter
*adap
;
831 struct dvb_adapter
*dvb_adap
;
832 struct dvb_demux
*demux
;
833 struct dmxdev
*dmxdev
;
836 adap
= kzalloc(sizeof(struct pt1_adapter
), GFP_KERNEL
);
844 adap
->voltage
= SEC_VOLTAGE_OFF
;
847 buf
= (u8
*)__get_free_page(GFP_KERNEL
);
854 adap
->upacket_count
= 0;
855 adap
->packet_count
= 0;
858 dvb_adap
= &adap
->adap
;
859 dvb_adap
->priv
= adap
;
860 ret
= dvb_register_adapter(dvb_adap
, DRIVER_NAME
, THIS_MODULE
,
861 &pt1
->pdev
->dev
, adapter_nr
);
865 demux
= &adap
->demux
;
866 demux
->dmx
.capabilities
= DMX_TS_FILTERING
| DMX_SECTION_FILTERING
;
868 demux
->feednum
= 256;
869 demux
->filternum
= 256;
870 demux
->start_feed
= pt1_start_feed
;
871 demux
->stop_feed
= pt1_stop_feed
;
872 demux
->write_to_decoder
= NULL
;
873 ret
= dvb_dmx_init(demux
);
875 goto err_unregister_adapter
;
877 dmxdev
= &adap
->dmxdev
;
878 dmxdev
->filternum
= 256;
879 dmxdev
->demux
= &demux
->dmx
;
880 dmxdev
->capabilities
= 0;
881 ret
= dvb_dmxdev_init(dmxdev
, dvb_adap
);
883 goto err_dmx_release
;
888 dvb_dmx_release(demux
);
889 err_unregister_adapter
:
890 dvb_unregister_adapter(dvb_adap
);
892 free_page((unsigned long)buf
);
899 static void pt1_cleanup_adapters(struct pt1
*pt1
)
902 for (i
= 0; i
< PT1_NR_ADAPS
; i
++)
903 pt1_free_adapter(pt1
->adaps
[i
]);
906 static int pt1_init_adapters(struct pt1
*pt1
)
909 struct pt1_adapter
*adap
;
912 for (i
= 0; i
< PT1_NR_ADAPS
; i
++) {
913 adap
= pt1_alloc_adapter(pt1
);
920 pt1
->adaps
[i
] = adap
;
926 pt1_free_adapter(pt1
->adaps
[i
]);
931 static void pt1_cleanup_frontend(struct pt1_adapter
*adap
)
933 dvb_unregister_frontend(adap
->fe
);
934 dvb_module_release(adap
->tuner_i2c_client
);
935 dvb_module_release(adap
->demod_i2c_client
);
938 static int pt1_init_frontend(struct pt1_adapter
*adap
, struct dvb_frontend
*fe
)
942 adap
->orig_set_voltage
= fe
->ops
.set_voltage
;
943 adap
->orig_sleep
= fe
->ops
.sleep
;
944 adap
->orig_init
= fe
->ops
.init
;
945 fe
->ops
.set_voltage
= pt1_set_voltage
;
946 fe
->ops
.sleep
= pt1_sleep
;
947 fe
->ops
.init
= pt1_wakeup
;
949 ret
= dvb_register_frontend(&adap
->adap
, fe
);
957 static void pt1_cleanup_frontends(struct pt1
*pt1
)
960 for (i
= 0; i
< PT1_NR_ADAPS
; i
++)
961 pt1_cleanup_frontend(pt1
->adaps
[i
]);
964 static int pt1_init_frontends(struct pt1
*pt1
)
969 for (i
= 0; i
< ARRAY_SIZE(pt1_configs
); i
++) {
970 const struct i2c_board_info
*info
;
971 struct tc90522_config dcfg
;
972 struct i2c_client
*cl
;
974 info
= &pt1_configs
[i
].demod_info
;
975 dcfg
= pt1_configs
[i
].demod_cfg
;
976 dcfg
.tuner_i2c
= NULL
;
979 cl
= dvb_module_probe("tc90522", info
->type
, &pt1
->i2c_adap
,
983 pt1
->adaps
[i
]->demod_i2c_client
= cl
;
985 if (!strncmp(cl
->name
, TC90522_I2C_DEV_SAT
,
986 strlen(TC90522_I2C_DEV_SAT
))) {
987 struct qm1d1b0004_config tcfg
;
989 info
= &pt1_configs
[i
].tuner_info
;
990 tcfg
= pt1_configs
[i
].tuner_cfg
.qm1d1b0004
;
992 cl
= dvb_module_probe("qm1d1b0004",
993 info
->type
, dcfg
.tuner_i2c
,
996 struct dvb_pll_config tcfg
;
998 info
= &pt1_configs
[i
].tuner_info
;
999 tcfg
= pt1_configs
[i
].tuner_cfg
.tda6651
;
1001 cl
= dvb_module_probe("dvb_pll",
1002 info
->type
, dcfg
.tuner_i2c
,
1007 pt1
->adaps
[i
]->tuner_i2c_client
= cl
;
1009 ret
= pt1_init_frontend(pt1
->adaps
[i
], dcfg
.fe
);
1014 ret
= pt1_demod_block_init(pt1
);
1021 dvb_module_release(pt1
->adaps
[i
]->tuner_i2c_client
);
1023 dvb_module_release(pt1
->adaps
[i
]->demod_i2c_client
);
1025 dev_warn(&pt1
->pdev
->dev
, "failed to init FE(%d).\n", i
);
1027 for (; i
>= 0; i
--) {
1028 dvb_unregister_frontend(pt1
->adaps
[i
]->fe
);
1029 dvb_module_release(pt1
->adaps
[i
]->tuner_i2c_client
);
1030 dvb_module_release(pt1
->adaps
[i
]->demod_i2c_client
);
1035 static void pt1_i2c_emit(struct pt1
*pt1
, int addr
, int busy
, int read_enable
,
1036 int clock
, int data
, int next_addr
)
1038 pt1_write_reg(pt1
, 4, addr
<< 18 | busy
<< 13 | read_enable
<< 12 |
1039 !clock
<< 11 | !data
<< 10 | next_addr
);
1042 static void pt1_i2c_write_bit(struct pt1
*pt1
, int addr
, int *addrp
, int data
)
1044 pt1_i2c_emit(pt1
, addr
, 1, 0, 0, data
, addr
+ 1);
1045 pt1_i2c_emit(pt1
, addr
+ 1, 1, 0, 1, data
, addr
+ 2);
1046 pt1_i2c_emit(pt1
, addr
+ 2, 1, 0, 0, data
, addr
+ 3);
1050 static void pt1_i2c_read_bit(struct pt1
*pt1
, int addr
, int *addrp
)
1052 pt1_i2c_emit(pt1
, addr
, 1, 0, 0, 1, addr
+ 1);
1053 pt1_i2c_emit(pt1
, addr
+ 1, 1, 0, 1, 1, addr
+ 2);
1054 pt1_i2c_emit(pt1
, addr
+ 2, 1, 1, 1, 1, addr
+ 3);
1055 pt1_i2c_emit(pt1
, addr
+ 3, 1, 0, 0, 1, addr
+ 4);
1059 static void pt1_i2c_write_byte(struct pt1
*pt1
, int addr
, int *addrp
, int data
)
1062 for (i
= 0; i
< 8; i
++)
1063 pt1_i2c_write_bit(pt1
, addr
, &addr
, data
>> (7 - i
) & 1);
1064 pt1_i2c_write_bit(pt1
, addr
, &addr
, 1);
1068 static void pt1_i2c_read_byte(struct pt1
*pt1
, int addr
, int *addrp
, int last
)
1071 for (i
= 0; i
< 8; i
++)
1072 pt1_i2c_read_bit(pt1
, addr
, &addr
);
1073 pt1_i2c_write_bit(pt1
, addr
, &addr
, last
);
1077 static void pt1_i2c_prepare(struct pt1
*pt1
, int addr
, int *addrp
)
1079 pt1_i2c_emit(pt1
, addr
, 1, 0, 1, 1, addr
+ 1);
1080 pt1_i2c_emit(pt1
, addr
+ 1, 1, 0, 1, 0, addr
+ 2);
1081 pt1_i2c_emit(pt1
, addr
+ 2, 1, 0, 0, 0, addr
+ 3);
1086 pt1_i2c_write_msg(struct pt1
*pt1
, int addr
, int *addrp
, struct i2c_msg
*msg
)
1089 pt1_i2c_prepare(pt1
, addr
, &addr
);
1090 pt1_i2c_write_byte(pt1
, addr
, &addr
, msg
->addr
<< 1);
1091 for (i
= 0; i
< msg
->len
; i
++)
1092 pt1_i2c_write_byte(pt1
, addr
, &addr
, msg
->buf
[i
]);
1097 pt1_i2c_read_msg(struct pt1
*pt1
, int addr
, int *addrp
, struct i2c_msg
*msg
)
1100 pt1_i2c_prepare(pt1
, addr
, &addr
);
1101 pt1_i2c_write_byte(pt1
, addr
, &addr
, msg
->addr
<< 1 | 1);
1102 for (i
= 0; i
< msg
->len
; i
++)
1103 pt1_i2c_read_byte(pt1
, addr
, &addr
, i
== msg
->len
- 1);
1107 static int pt1_i2c_end(struct pt1
*pt1
, int addr
)
1109 pt1_i2c_emit(pt1
, addr
, 1, 0, 0, 0, addr
+ 1);
1110 pt1_i2c_emit(pt1
, addr
+ 1, 1, 0, 1, 0, addr
+ 2);
1111 pt1_i2c_emit(pt1
, addr
+ 2, 1, 0, 1, 1, 0);
1113 pt1_write_reg(pt1
, 0, 0x00000004);
1115 if (signal_pending(current
))
1117 usleep_range(1000, 2000);
1118 } while (pt1_read_reg(pt1
, 0) & 0x00000080);
1122 static void pt1_i2c_begin(struct pt1
*pt1
, int *addrp
)
1126 pt1_i2c_emit(pt1
, addr
, 0, 0, 1, 1, addr
/* itself */);
1129 if (!pt1
->i2c_running
) {
1130 pt1_i2c_emit(pt1
, addr
, 1, 0, 1, 1, addr
+ 1);
1131 pt1_i2c_emit(pt1
, addr
+ 1, 1, 0, 1, 0, addr
+ 2);
1133 pt1
->i2c_running
= 1;
1138 static int pt1_i2c_xfer(struct i2c_adapter
*adap
, struct i2c_msg
*msgs
, int num
)
1142 struct i2c_msg
*msg
, *next_msg
;
1147 pt1
= i2c_get_adapdata(adap
);
1149 for (i
= 0; i
< num
; i
++) {
1151 if (msg
->flags
& I2C_M_RD
)
1155 next_msg
= &msgs
[i
+ 1];
1159 if (next_msg
&& next_msg
->flags
& I2C_M_RD
) {
1162 len
= next_msg
->len
;
1166 pt1_i2c_begin(pt1
, &addr
);
1167 pt1_i2c_write_msg(pt1
, addr
, &addr
, msg
);
1168 pt1_i2c_read_msg(pt1
, addr
, &addr
, next_msg
);
1169 ret
= pt1_i2c_end(pt1
, addr
);
1173 word
= pt1_read_reg(pt1
, 2);
1175 next_msg
->buf
[len
] = word
;
1179 pt1_i2c_begin(pt1
, &addr
);
1180 pt1_i2c_write_msg(pt1
, addr
, &addr
, msg
);
1181 ret
= pt1_i2c_end(pt1
, addr
);
1190 static u32
pt1_i2c_func(struct i2c_adapter
*adap
)
1192 return I2C_FUNC_I2C
;
1195 static const struct i2c_algorithm pt1_i2c_algo
= {
1196 .master_xfer
= pt1_i2c_xfer
,
1197 .functionality
= pt1_i2c_func
,
1200 static void pt1_i2c_wait(struct pt1
*pt1
)
1203 for (i
= 0; i
< 128; i
++)
1204 pt1_i2c_emit(pt1
, 0, 0, 0, 1, 1, 0);
1207 static void pt1_i2c_init(struct pt1
*pt1
)
1210 for (i
= 0; i
< 1024; i
++)
1211 pt1_i2c_emit(pt1
, i
, 0, 0, 1, 1, 0);
1214 #ifdef CONFIG_PM_SLEEP
1216 static int pt1_suspend(struct device
*dev
)
1218 struct pt1
*pt1
= dev_get_drvdata(dev
);
1220 pt1_init_streams(pt1
);
1221 pt1_disable_ram(pt1
);
1224 pt1_update_power(pt1
);
1228 static int pt1_resume(struct device
*dev
)
1230 struct pt1
*pt1
= dev_get_drvdata(dev
);
1236 pt1_update_power(pt1
);
1241 ret
= pt1_sync(pt1
);
1247 ret
= pt1_unlock(pt1
);
1251 ret
= pt1_reset_pci(pt1
);
1255 ret
= pt1_reset_ram(pt1
);
1259 ret
= pt1_enable_ram(pt1
);
1263 pt1_init_streams(pt1
);
1266 pt1_update_power(pt1
);
1270 pt1_update_power(pt1
);
1271 usleep_range(1000, 2000);
1273 ret
= pt1_demod_block_init(pt1
);
1277 for (i
= 0; i
< PT1_NR_ADAPS
; i
++)
1278 dvb_frontend_reinitialise(pt1
->adaps
[i
]->fe
);
1280 pt1_init_table_count(pt1
);
1281 for (i
= 0; i
< pt1_nr_tables
; i
++) {
1284 for (j
= 0; j
< PT1_NR_BUFS
; j
++)
1285 pt1
->tables
[i
].bufs
[j
].page
->upackets
[PT1_NR_UPACKETS
-1]
1287 pt1_increment_table_count(pt1
);
1289 pt1_register_tables(pt1
, pt1
->tables
[0].addr
>> PT1_PAGE_SHIFT
);
1291 pt1
->table_index
= 0;
1293 for (i
= 0; i
< PT1_NR_ADAPS
; i
++) {
1294 pt1
->adaps
[i
]->upacket_count
= 0;
1295 pt1
->adaps
[i
]->packet_count
= 0;
1296 pt1
->adaps
[i
]->st_count
= -1;
1302 dev_info(&pt1
->pdev
->dev
, "failed to resume PT1/PT2.");
1303 return 0; /* resume anyway */
1306 #endif /* CONFIG_PM_SLEEP */
1308 static void pt1_remove(struct pci_dev
*pdev
)
1313 pt1
= pci_get_drvdata(pdev
);
1317 kthread_stop(pt1
->kthread
);
1318 pt1_cleanup_tables(pt1
);
1319 pt1_cleanup_frontends(pt1
);
1320 pt1_disable_ram(pt1
);
1323 pt1_update_power(pt1
);
1324 pt1_cleanup_adapters(pt1
);
1325 i2c_del_adapter(&pt1
->i2c_adap
);
1327 pci_iounmap(pdev
, regs
);
1328 pci_release_regions(pdev
);
1329 pci_disable_device(pdev
);
1332 static int pt1_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
1337 struct i2c_adapter
*i2c_adap
;
1339 ret
= pci_enable_device(pdev
);
1343 ret
= dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(32));
1345 goto err_pci_disable_device
;
1347 pci_set_master(pdev
);
1349 ret
= pci_request_regions(pdev
, DRIVER_NAME
);
1351 goto err_pci_disable_device
;
1353 regs
= pci_iomap(pdev
, 0, 0);
1356 goto err_pci_release_regions
;
1359 pt1
= kzalloc(sizeof(struct pt1
), GFP_KERNEL
);
1362 goto err_pci_iounmap
;
1365 mutex_init(&pt1
->lock
);
1368 pt1
->fe_clk
= (pdev
->device
== 0x211a) ?
1369 PT1_FE_CLK_20MHZ
: PT1_FE_CLK_25MHZ
;
1370 pci_set_drvdata(pdev
, pt1
);
1372 ret
= pt1_init_adapters(pt1
);
1376 mutex_init(&pt1
->lock
);
1380 pt1_update_power(pt1
);
1382 i2c_adap
= &pt1
->i2c_adap
;
1383 i2c_adap
->algo
= &pt1_i2c_algo
;
1384 i2c_adap
->algo_data
= NULL
;
1385 i2c_adap
->dev
.parent
= &pdev
->dev
;
1386 strscpy(i2c_adap
->name
, DRIVER_NAME
, sizeof(i2c_adap
->name
));
1387 i2c_set_adapdata(i2c_adap
, pt1
);
1388 ret
= i2c_add_adapter(i2c_adap
);
1390 goto err_pt1_cleanup_adapters
;
1395 ret
= pt1_sync(pt1
);
1397 goto err_i2c_del_adapter
;
1401 ret
= pt1_unlock(pt1
);
1403 goto err_i2c_del_adapter
;
1405 ret
= pt1_reset_pci(pt1
);
1407 goto err_i2c_del_adapter
;
1409 ret
= pt1_reset_ram(pt1
);
1411 goto err_i2c_del_adapter
;
1413 ret
= pt1_enable_ram(pt1
);
1415 goto err_i2c_del_adapter
;
1417 pt1_init_streams(pt1
);
1420 pt1_update_power(pt1
);
1424 pt1_update_power(pt1
);
1425 usleep_range(1000, 2000);
1427 ret
= pt1_init_frontends(pt1
);
1429 goto err_pt1_disable_ram
;
1431 ret
= pt1_init_tables(pt1
);
1433 goto err_pt1_cleanup_frontends
;
1437 err_pt1_cleanup_frontends
:
1438 pt1_cleanup_frontends(pt1
);
1439 err_pt1_disable_ram
:
1440 pt1_disable_ram(pt1
);
1443 pt1_update_power(pt1
);
1444 err_i2c_del_adapter
:
1445 i2c_del_adapter(i2c_adap
);
1446 err_pt1_cleanup_adapters
:
1447 pt1_cleanup_adapters(pt1
);
1451 pci_iounmap(pdev
, regs
);
1452 err_pci_release_regions
:
1453 pci_release_regions(pdev
);
1454 err_pci_disable_device
:
1455 pci_disable_device(pdev
);
1461 static const struct pci_device_id pt1_id_table
[] = {
1462 { PCI_DEVICE(0x10ee, 0x211a) },
1463 { PCI_DEVICE(0x10ee, 0x222a) },
1466 MODULE_DEVICE_TABLE(pci
, pt1_id_table
);
1468 static SIMPLE_DEV_PM_OPS(pt1_pm_ops
, pt1_suspend
, pt1_resume
);
1470 static struct pci_driver pt1_driver
= {
1471 .name
= DRIVER_NAME
,
1473 .remove
= pt1_remove
,
1474 .id_table
= pt1_id_table
,
1475 .driver
.pm
= &pt1_pm_ops
,
1478 module_pci_driver(pt1_driver
);
1480 MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
1481 MODULE_DESCRIPTION("Earthsoft PT1/PT2 Driver");
1482 MODULE_LICENSE("GPL");