drivers/media/platform/allegro-dvt/nal-hevc.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (C) 2019 Pengutronix, Michael Tretter <kernel@pengutronix.de>
   4  *
   5  * Convert NAL units between raw byte sequence payloads (RBSP) and C structs.
   6  */
   7
   8 #ifndef __NAL_HEVC_H__
   9 #define __NAL_HEVC_H__
  10
  11 #include <linux/errno.h>
  12 #include <linux/kernel.h>
  13 #include <linux/types.h>
  14 #include <linux/v4l2-controls.h>
  15 #include <linux/videodev2.h>
  16
  17 struct nal_hevc_profile_tier_level {
  18         unsigned int general_profile_space;
  19         unsigned int general_tier_flag;
  20         unsigned int general_profile_idc;
  21         unsigned int general_profile_compatibility_flag[32];
  22         unsigned int general_progressive_source_flag;
  23         unsigned int general_interlaced_source_flag;
  24         unsigned int general_non_packed_constraint_flag;
  25         unsigned int general_frame_only_constraint_flag;
  26         union {
  27                 struct {
  28                         unsigned int general_max_12bit_constraint_flag;
  29                         unsigned int general_max_10bit_constraint_flag;
  30                         unsigned int general_max_8bit_constraint_flag;
  31                         unsigned int general_max_422chroma_constraint_flag;
  32                         unsigned int general_max_420chroma_constraint_flag;
  33                         unsigned int general_max_monochrome_constraint_flag;
  34                         unsigned int general_intra_constraint_flag;
  35                         unsigned int general_one_picture_only_constraint_flag;
  36                         unsigned int general_lower_bit_rate_constraint_flag;
  37                         union {
  38                                 struct {
  39                                         unsigned int general_max_14bit_constraint_flag;
  40                                         unsigned int general_reserved_zero_33bits;
  41                                 };
  42                                 unsigned int general_reserved_zero_34bits;
  43                         };
  44                 };
  45                 struct {
  46                         unsigned int general_reserved_zero_7bits;
  47                         /* unsigned int general_one_picture_only_constraint_flag; */
  48                         unsigned int general_reserved_zero_35bits;
  49                 };
  50                 unsigned int general_reserved_zero_43bits;
  51         };
  52         union {
  53                 unsigned int general_inbld_flag;
  54                 unsigned int general_reserved_zero_bit;
  55         };
  56         unsigned int general_level_idc;
  57 };
  58
  59 /*
  60  * struct nal_hevc_vps - Video parameter set
  61  *
  62  * C struct representation of the video parameter set NAL unit as defined by
  63  * Rec. ITU-T H.265 (02/2018) 7.3.2.1 Video parameter set RBSP syntax
  64  */
  65 struct nal_hevc_vps {
  66         unsigned int video_parameter_set_id;
  67         unsigned int base_layer_internal_flag;
  68         unsigned int base_layer_available_flag;
  69         unsigned int max_layers_minus1;
  70         unsigned int max_sub_layers_minus1;
  71         unsigned int temporal_id_nesting_flag;
  72         struct nal_hevc_profile_tier_level profile_tier_level;
  73         unsigned int sub_layer_ordering_info_present_flag;
  74         struct {
  75                 unsigned int max_dec_pic_buffering_minus1[7];
  76                 unsigned int max_num_reorder_pics[7];
  77                 unsigned int max_latency_increase_plus1[7];
  78         };
  79         unsigned int max_layer_id;
  80         unsigned int num_layer_sets_minus1;
  81         unsigned int layer_id_included_flag[1024][64];
  82         unsigned int timing_info_present_flag;
  83         struct {
  84                 unsigned int num_units_in_tick;
  85                 unsigned int time_scale;
  86                 unsigned int poc_proportional_to_timing_flag;
  87                 unsigned int num_ticks_poc_diff_one_minus1;
  88                 unsigned int num_hrd_parameters;
  89                 struct {
  90                         unsigned int hrd_layer_set_idx[0];
  91                         unsigned int cprms_present_flag[0];
  92                 };
  93                 /* hrd_parameters( cprms_present_flag[ i ], max_sub_layers_minus1 ) */
  94         };
  95         unsigned int extension_flag;
  96         unsigned int extension_data_flag;
  97 };
  98
  99 #define N_HRD_PARAMS 1
 100 struct nal_hevc_sub_layer_hrd_parameters {
 101         unsigned int bit_rate_value_minus1[N_HRD_PARAMS];
 102         unsigned int cpb_size_value_minus1[N_HRD_PARAMS];
 103         unsigned int cbr_flag[N_HRD_PARAMS];
 104 };
 105
 106 struct nal_hevc_hrd_parameters {
 107         unsigned int nal_hrd_parameters_present_flag;
 108         unsigned int vcl_hrd_parameters_present_flag;
 109         struct {
 110                 unsigned int sub_pic_hrd_params_present_flag;
 111                 struct {
 112                         unsigned int tick_divisor_minus2;
 113                         unsigned int du_cpb_removal_delay_increment_length_minus1;
 114                         unsigned int sub_pic_cpb_params_in_pic_timing_sei_flag;
 115                         unsigned int dpb_output_delay_du_length_minus1;
 116                 };
 117                 unsigned int bit_rate_scale;
 118                 unsigned int cpb_size_scale;
 119                 unsigned int cpb_size_du_scale;
 120                 unsigned int initial_cpb_removal_delay_length_minus1;
 121                 unsigned int au_cpb_removal_delay_length_minus1;
 122                 unsigned int dpb_output_delay_length_minus1;
 123         };
 124         struct {
 125                 unsigned int fixed_pic_rate_general_flag[1];
 126                 unsigned int fixed_pic_rate_within_cvs_flag[1];
 127                 unsigned int elemental_duration_in_tc_minus1[1];
 128                 unsigned int low_delay_hrd_flag[1];
 129                 unsigned int cpb_cnt_minus1[1];
 130                 struct nal_hevc_sub_layer_hrd_parameters nal_hrd[1];
 131                 struct nal_hevc_sub_layer_hrd_parameters vcl_hrd[1];
 132         };
 133 };
 134
 135 /*
 136  * struct nal_hevc_vui_parameters - VUI parameters
 137  *
 138  * C struct representation of the VUI parameters as defined by Rec. ITU-T
 139  * H.265 (02/2018) E.2.1 VUI parameters syntax.
 140  */
 141 struct nal_hevc_vui_parameters {
 142         unsigned int aspect_ratio_info_present_flag;
 143         struct {
 144                 unsigned int aspect_ratio_idc;
 145                 unsigned int sar_width;
 146                 unsigned int sar_height;
 147         };
 148         unsigned int overscan_info_present_flag;
 149         unsigned int overscan_appropriate_flag;
 150         unsigned int video_signal_type_present_flag;
 151         struct {
 152                 unsigned int video_format;
 153                 unsigned int video_full_range_flag;
 154                 unsigned int colour_description_present_flag;
 155                 struct {
 156                         unsigned int colour_primaries;
 157                         unsigned int transfer_characteristics;
 158                         unsigned int matrix_coeffs;
 159                 };
 160         };
 161         unsigned int chroma_loc_info_present_flag;
 162         struct {
 163                 unsigned int chroma_sample_loc_type_top_field;
 164                 unsigned int chroma_sample_loc_type_bottom_field;
 165         };
 166         unsigned int neutral_chroma_indication_flag;
 167         unsigned int field_seq_flag;
 168         unsigned int frame_field_info_present_flag;
 169         unsigned int default_display_window_flag;
 170         struct {
 171                 unsigned int def_disp_win_left_offset;
 172                 unsigned int def_disp_win_right_offset;
 173                 unsigned int def_disp_win_top_offset;
 174                 unsigned int def_disp_win_bottom_offset;
 175         };
 176         unsigned int vui_timing_info_present_flag;
 177         struct {
 178                 unsigned int vui_num_units_in_tick;
 179                 unsigned int vui_time_scale;
 180                 unsigned int vui_poc_proportional_to_timing_flag;
 181                 unsigned int vui_num_ticks_poc_diff_one_minus1;
 182                 unsigned int vui_hrd_parameters_present_flag;
 183                 struct nal_hevc_hrd_parameters nal_hrd_parameters;
 184         };
 185         unsigned int bitstream_restriction_flag;
 186         struct {
 187                 unsigned int tiles_fixed_structure_flag;
 188                 unsigned int motion_vectors_over_pic_boundaries_flag;
 189                 unsigned int restricted_ref_pic_lists_flag;
 190                 unsigned int min_spatial_segmentation_idc;
 191                 unsigned int max_bytes_per_pic_denom;
 192                 unsigned int max_bits_per_min_cu_denom;
 193                 unsigned int log2_max_mv_length_horizontal;
 194                 unsigned int log2_max_mv_length_vertical;
 195         };
 196 };
 197
 198 /*
 199  * struct nal_hevc_sps - Sequence parameter set
 200  *
 201  * C struct representation of the video parameter set NAL unit as defined by
 202  * Rec. ITU-T H.265 (02/2018) 7.3.2.2 Sequence parameter set RBSP syntax
 203  */
 204 struct nal_hevc_sps {
 205         unsigned int video_parameter_set_id;
 206         unsigned int max_sub_layers_minus1;
 207         unsigned int temporal_id_nesting_flag;
 208         struct nal_hevc_profile_tier_level profile_tier_level;
 209         unsigned int seq_parameter_set_id;
 210         unsigned int chroma_format_idc;
 211         unsigned int separate_colour_plane_flag;
 212         unsigned int pic_width_in_luma_samples;
 213         unsigned int pic_height_in_luma_samples;
 214         unsigned int conformance_window_flag;
 215         struct {
 216                 unsigned int conf_win_left_offset;
 217                 unsigned int conf_win_right_offset;
 218                 unsigned int conf_win_top_offset;
 219                 unsigned int conf_win_bottom_offset;
 220         };
 221
 222         unsigned int bit_depth_luma_minus8;
 223         unsigned int bit_depth_chroma_minus8;
 224         unsigned int log2_max_pic_order_cnt_lsb_minus4;
 225         unsigned int sub_layer_ordering_info_present_flag;
 226         struct {
 227                 unsigned int max_dec_pic_buffering_minus1[7];
 228                 unsigned int max_num_reorder_pics[7];
 229                 unsigned int max_latency_increase_plus1[7];
 230         };
 231         unsigned int log2_min_luma_coding_block_size_minus3;
 232         unsigned int log2_diff_max_min_luma_coding_block_size;
 233         unsigned int log2_min_luma_transform_block_size_minus2;
 234         unsigned int log2_diff_max_min_luma_transform_block_size;
 235         unsigned int max_transform_hierarchy_depth_inter;
 236         unsigned int max_transform_hierarchy_depth_intra;
 237
 238         unsigned int scaling_list_enabled_flag;
 239         unsigned int scaling_list_data_present_flag;
 240         unsigned int amp_enabled_flag;
 241         unsigned int sample_adaptive_offset_enabled_flag;
 242         unsigned int pcm_enabled_flag;
 243         struct {
 244                 unsigned int pcm_sample_bit_depth_luma_minus1;
 245                 unsigned int pcm_sample_bit_depth_chroma_minus1;
 246                 unsigned int log2_min_pcm_luma_coding_block_size_minus3;
 247                 unsigned int log2_diff_max_min_pcm_luma_coding_block_size;
 248                 unsigned int pcm_loop_filter_disabled_flag;
 249         };
 250
 251         unsigned int num_short_term_ref_pic_sets;
 252         unsigned int long_term_ref_pics_present_flag;
 253         unsigned int sps_temporal_mvp_enabled_flag;
 254         unsigned int strong_intra_smoothing_enabled_flag;
 255         unsigned int vui_parameters_present_flag;
 256         struct nal_hevc_vui_parameters vui;
 257         unsigned int extension_present_flag;
 258         struct {
 259                 unsigned int sps_range_extension_flag;
 260                 unsigned int sps_multilayer_extension_flag;
 261                 unsigned int sps_3d_extension_flag;
 262                 unsigned int sps_scc_extension_flag;
 263                 unsigned int sps_extension_4bits;
 264         };
 265 };
 266
 267 struct nal_hevc_pps {
 268         unsigned int pps_pic_parameter_set_id;
 269         unsigned int pps_seq_parameter_set_id;
 270         unsigned int dependent_slice_segments_enabled_flag;
 271         unsigned int output_flag_present_flag;
 272         unsigned int num_extra_slice_header_bits;
 273         unsigned int sign_data_hiding_enabled_flag;
 274         unsigned int cabac_init_present_flag;
 275         unsigned int num_ref_idx_l0_default_active_minus1;
 276         unsigned int num_ref_idx_l1_default_active_minus1;
 277         int init_qp_minus26;
 278         unsigned int constrained_intra_pred_flag;
 279         unsigned int transform_skip_enabled_flag;
 280         unsigned int cu_qp_delta_enabled_flag;
 281         unsigned int diff_cu_qp_delta_depth;
 282         int pps_cb_qp_offset;
 283         int pps_cr_qp_offset;
 284         unsigned int pps_slice_chroma_qp_offsets_present_flag;
 285         unsigned int weighted_pred_flag;
 286         unsigned int weighted_bipred_flag;
 287         unsigned int transquant_bypass_enabled_flag;
 288         unsigned int tiles_enabled_flag;
 289         unsigned int entropy_coding_sync_enabled_flag;
 290         struct {
 291                 unsigned int num_tile_columns_minus1;
 292                 unsigned int num_tile_rows_minus1;
 293                 unsigned int uniform_spacing_flag;
 294                 struct {
 295                         unsigned int column_width_minus1[1];
 296                         unsigned int row_height_minus1[1];
 297                 };
 298                 unsigned int loop_filter_across_tiles_enabled_flag;
 299         };
 300         unsigned int pps_loop_filter_across_slices_enabled_flag;
 301         unsigned int deblocking_filter_control_present_flag;
 302         struct {
 303                 unsigned int deblocking_filter_override_enabled_flag;
 304                 unsigned int pps_deblocking_filter_disabled_flag;
 305                 struct {
 306                         int pps_beta_offset_div2;
 307                         int pps_tc_offset_div2;
 308                 };
 309         };
 310         unsigned int pps_scaling_list_data_present_flag;
 311         unsigned int lists_modification_present_flag;
 312         unsigned int log2_parallel_merge_level_minus2;
 313         unsigned int slice_segment_header_extension_present_flag;
 314         unsigned int pps_extension_present_flag;
 315         struct {
 316                 unsigned int pps_range_extension_flag;
 317                 unsigned int pps_multilayer_extension_flag;
 318                 unsigned int pps_3d_extension_flag;
 319                 unsigned int pps_scc_extension_flag;
 320                 unsigned int pps_extension_4bits;
 321         };
 322 };
 323
 324 /**
 325  * nal_hevc_profile() - Get profile_idc for v4l2 hevc profile
 326  * @profile: the profile as &enum v4l2_mpeg_video_hevc_profile
 327  *
 328  * Convert the &enum v4l2_mpeg_video_hevc_profile to profile_idc as specified
 329  * in Rec. ITU-T H.265 (02/2018) A.3.
 330  *
 331  * Return: the profile_idc for the passed level
 332  */
 333 static inline int nal_hevc_profile(enum v4l2_mpeg_video_hevc_profile profile)
 334 {
 335         switch (profile) {
 336         case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN:
 337                 return 1;
 338         case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10:
 339                 return 2;
 340         case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE:
 341                 return 3;
 342         default:
 343                 return -EINVAL;
 344         }
 345 }
 346
 347 /**
 348  * nal_hevc_tier() - Get tier_flag for v4l2 hevc tier
 349  * @tier: the tier as &enum v4l2_mpeg_video_hevc_tier
 350  *
 351  * Convert the &enum v4l2_mpeg_video_hevc_tier to tier_flag as specified
 352  * in Rec. ITU-T H.265 (02/2018) A.4.1.
 353  *
 354  * Return: the tier_flag for the passed tier
 355  */
 356 static inline int nal_hevc_tier(enum v4l2_mpeg_video_hevc_tier tier)
 357 {
 358         switch (tier) {
 359         case V4L2_MPEG_VIDEO_HEVC_TIER_MAIN:
 360                 return 0;
 361         case V4L2_MPEG_VIDEO_HEVC_TIER_HIGH:
 362                 return 1;
 363         default:
 364                 return -EINVAL;
 365         }
 366 }
 367
 368 /**
 369  * nal_hevc_level() - Get level_idc for v4l2 hevc level
 370  * @level: the level as &enum v4l2_mpeg_video_hevc_level
 371  *
 372  * Convert the &enum v4l2_mpeg_video_hevc_level to level_idc as specified in
 373  * Rec. ITU-T H.265 (02/2018) A.4.1.
 374  *
 375  * Return: the level_idc for the passed level
 376  */
 377 static inline int nal_hevc_level(enum v4l2_mpeg_video_hevc_level level)
 378 {
 379         /*
 380          * T-Rec-H.265 p. 280: general_level_idc and sub_layer_level_idc[ i ]
 381          * shall be set equal to a value of 30 times the level number
 382          * specified in Table A.6.
 383          */
 384         int factor = 30 / 10;
 385
 386         switch (level) {
 387         case V4L2_MPEG_VIDEO_HEVC_LEVEL_1:
 388                 return factor * 10;
 389         case V4L2_MPEG_VIDEO_HEVC_LEVEL_2:
 390                 return factor * 20;
 391         case V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1:
 392                 return factor * 21;
 393         case V4L2_MPEG_VIDEO_HEVC_LEVEL_3:
 394                 return factor * 30;
 395         case V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1:
 396                 return factor * 31;
 397         case V4L2_MPEG_VIDEO_HEVC_LEVEL_4:
 398                 return factor * 40;
 399         case V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1:
 400                 return factor * 41;
 401         case V4L2_MPEG_VIDEO_HEVC_LEVEL_5:
 402                 return factor * 50;
 403         case V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1:
 404                 return factor * 51;
 405         case V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2:
 406                 return factor * 52;
 407         case V4L2_MPEG_VIDEO_HEVC_LEVEL_6:
 408                 return factor * 60;
 409         case V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1:
 410                 return factor * 61;
 411         case V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2:
 412                 return factor * 62;
 413         default:
 414                 return -EINVAL;
 415         }
 416 }
 417
 418 static inline int nal_hevc_full_range(enum v4l2_quantization quantization)
 419 {
 420         switch (quantization) {
 421         case V4L2_QUANTIZATION_FULL_RANGE:
 422                 return 1;
 423         case V4L2_QUANTIZATION_LIM_RANGE:
 424                 return 0;
 425         default:
 426                 break;
 427         }
 428
 429         return 0;
 430 }
 431
 432 static inline int nal_hevc_color_primaries(enum v4l2_colorspace colorspace)
 433 {
 434         switch (colorspace) {
 435         case V4L2_COLORSPACE_SMPTE170M:
 436                 return 6;
 437         case V4L2_COLORSPACE_SMPTE240M:
 438                 return 7;
 439         case V4L2_COLORSPACE_REC709:
 440                 return 1;
 441         case V4L2_COLORSPACE_470_SYSTEM_M:
 442                 return 4;
 443         case V4L2_COLORSPACE_JPEG:
 444         case V4L2_COLORSPACE_SRGB:
 445         case V4L2_COLORSPACE_470_SYSTEM_BG:
 446                 return 5;
 447         case V4L2_COLORSPACE_BT2020:
 448                 return 9;
 449         case V4L2_COLORSPACE_DEFAULT:
 450         case V4L2_COLORSPACE_OPRGB:
 451         case V4L2_COLORSPACE_RAW:
 452         case V4L2_COLORSPACE_DCI_P3:
 453         default:
 454                 return 2;
 455         }
 456 }
 457
 458 static inline int nal_hevc_transfer_characteristics(enum v4l2_colorspace colorspace,
 459                                                     enum v4l2_xfer_func xfer_func)
 460 {
 461         if (xfer_func == V4L2_XFER_FUNC_DEFAULT)
 462                 xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(colorspace);
 463
 464         switch (xfer_func) {
 465         case V4L2_XFER_FUNC_709:
 466                 return 6;
 467         case V4L2_XFER_FUNC_SMPTE2084:
 468                 return 16;
 469         case V4L2_XFER_FUNC_SRGB:
 470         case V4L2_XFER_FUNC_OPRGB:
 471         case V4L2_XFER_FUNC_NONE:
 472         case V4L2_XFER_FUNC_DCI_P3:
 473         case V4L2_XFER_FUNC_SMPTE240M:
 474         default:
 475                 return 2;
 476         }
 477 }
 478
 479 static inline int nal_hevc_matrix_coeffs(enum v4l2_colorspace colorspace,
 480                                          enum v4l2_ycbcr_encoding ycbcr_encoding)
 481 {
 482         if (ycbcr_encoding == V4L2_YCBCR_ENC_DEFAULT)
 483                 ycbcr_encoding = V4L2_MAP_YCBCR_ENC_DEFAULT(colorspace);
 484
 485         switch (ycbcr_encoding) {
 486         case V4L2_YCBCR_ENC_601:
 487         case V4L2_YCBCR_ENC_XV601:
 488                 return 5;
 489         case V4L2_YCBCR_ENC_709:
 490         case V4L2_YCBCR_ENC_XV709:
 491                 return 1;
 492         case V4L2_YCBCR_ENC_BT2020:
 493                 return 9;
 494         case V4L2_YCBCR_ENC_BT2020_CONST_LUM:
 495                 return 10;
 496         case V4L2_YCBCR_ENC_SMPTE240M:
 497         default:
 498                 return 2;
 499         }
 500 }
 501
 502 ssize_t nal_hevc_write_vps(const struct device *dev,
 503                            void *dest, size_t n, struct nal_hevc_vps *vps);
 504 ssize_t nal_hevc_read_vps(const struct device *dev,
 505                           struct nal_hevc_vps *vps, void *src, size_t n);
 506
 507 ssize_t nal_hevc_write_sps(const struct device *dev,
 508                            void *dest, size_t n, struct nal_hevc_sps *sps);
 509 ssize_t nal_hevc_read_sps(const struct device *dev,
 510                           struct nal_hevc_sps *sps, void *src, size_t n);
 511
 512 ssize_t nal_hevc_write_pps(const struct device *dev,
 513                            void *dest, size_t n, struct nal_hevc_pps *pps);
 514 ssize_t nal_hevc_read_pps(const struct device *dev,
 515                           struct nal_hevc_pps *pps, void *src, size_t n);
 516
 517 ssize_t nal_hevc_write_filler(const struct device *dev, void *dest, size_t n);
 518 ssize_t nal_hevc_read_filler(const struct device *dev, void *src, size_t n);
 519
 520 #endif /* __NAL_HEVC_H__ */