drivers/media/platform/samsung/exynos-gsc/gsc-core.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * header file for Samsung EXYNOS5 SoC series G-Scaler driver
   7
   8  */
   9
  10 #ifndef GSC_CORE_H_
  11 #define GSC_CORE_H_
  12
  13 #include <linux/delay.h>
  14 #include <linux/sched.h>
  15 #include <linux/spinlock.h>
  16 #include <linux/types.h>
  17 #include <linux/videodev2.h>
  18 #include <linux/io.h>
  19 #include <linux/pm_runtime.h>
  20 #include <media/videobuf2-v4l2.h>
  21 #include <media/v4l2-ctrls.h>
  22 #include <media/v4l2-device.h>
  23 #include <media/v4l2-mem2mem.h>
  24 #include <media/v4l2-mediabus.h>
  25 #include <media/videobuf2-dma-contig.h>
  26
  27 #include "gsc-regs.h"
  28
  29 #define GSC_MODULE_NAME                 "exynos-gsc"
  30
  31 #define GSC_SHUTDOWN_TIMEOUT            ((100*HZ)/1000)
  32 #define GSC_MAX_DEVS                    4
  33 #define GSC_MAX_CLOCKS                  4
  34 #define GSC_M2M_BUF_NUM                 0
  35 #define GSC_MAX_CTRL_NUM                10
  36 #define GSC_SC_ALIGN_4                  4
  37 #define GSC_SC_ALIGN_2                  2
  38 #define DEFAULT_CSC_EQ                  1
  39 #define DEFAULT_CSC_RANGE               1
  40
  41 #define GSC_PARAMS                      (1 << 0)
  42 #define GSC_SRC_FMT                     (1 << 1)
  43 #define GSC_DST_FMT                     (1 << 2)
  44 #define GSC_CTX_M2M                     (1 << 3)
  45 #define GSC_CTX_STOP_REQ                (1 << 6)
  46 #define GSC_CTX_ABORT                   (1 << 7)
  47
  48 enum gsc_dev_flags {
  49         /* for m2m node */
  50         ST_M2M_OPEN,
  51         ST_M2M_RUN,
  52         ST_M2M_PEND,
  53         ST_M2M_SUSPENDED,
  54         ST_M2M_SUSPENDING,
  55 };
  56
  57 enum gsc_irq {
  58         GSC_IRQ_DONE,
  59         GSC_IRQ_OVERRUN
  60 };
  61
  62 /**
  63  * enum gsc_datapath - the path of data used for G-Scaler
  64  * @GSC_CAMERA: from camera
  65  * @GSC_DMA: from/to DMA
  66  * @GSC_WRITEBACK: from FIMD
  67  */
  68 enum gsc_datapath {
  69         GSC_CAMERA = 0x1,
  70         GSC_DMA,
  71         GSC_WRITEBACK,
  72 };
  73
  74 enum gsc_color_fmt {
  75         GSC_RGB = 0x1,
  76         GSC_YUV420 = 0x2,
  77         GSC_YUV422 = 0x4,
  78         GSC_YUV444 = 0x8,
  79 };
  80
  81 enum gsc_yuv_fmt {
  82         GSC_LSB_Y = 0x10,
  83         GSC_LSB_C,
  84         GSC_CBCR = 0x20,
  85         GSC_CRCB,
  86 };
  87
  88 #define fh_to_ctx(__fh) container_of(__fh, struct gsc_ctx, fh)
  89 #define is_rgb(x) (!!((x) & 0x1))
  90 #define is_yuv420(x) (!!((x) & 0x2))
  91 #define is_yuv422(x) (!!((x) & 0x4))
  92
  93 #define gsc_m2m_active(dev)     test_bit(ST_M2M_RUN, &(dev)->state)
  94 #define gsc_m2m_pending(dev)    test_bit(ST_M2M_PEND, &(dev)->state)
  95 #define gsc_m2m_opened(dev)     test_bit(ST_M2M_OPEN, &(dev)->state)
  96
  97 #define ctrl_to_ctx(__ctrl) \
  98         container_of((__ctrl)->handler, struct gsc_ctx, ctrl_handler)
  99 /**
 100  * struct gsc_fmt - the driver's internal color format data
 101  * @mbus_code: Media Bus pixel code, -1 if not applicable
 102  * @pixelformat: the fourcc code for this format, 0 if not applicable
 103  * @color: color encoding
 104  * @yorder: Y/C order
 105  * @corder: Chrominance order control
 106  * @num_planes: number of physically non-contiguous data planes
 107  * @num_comp: number of physically contiguous data planes
 108  * @depth: per plane driver's private 'number of bits per pixel'
 109  * @flags: flags indicating which operation mode format applies to
 110  */
 111 struct gsc_fmt {
 112         u32 mbus_code;
 113         u32     pixelformat;
 114         u32     color;
 115         u32     yorder;
 116         u32     corder;
 117         u16     num_planes;
 118         u16     num_comp;
 119         u8      depth[VIDEO_MAX_PLANES];
 120         u32     flags;
 121 };
 122
 123 /**
 124  * struct gsc_input_buf - the driver's video buffer
 125  * @vb: videobuf2 buffer
 126  * @list : linked list structure for buffer queue
 127  * @idx : index of G-Scaler input buffer
 128  */
 129 struct gsc_input_buf {
 130         struct vb2_v4l2_buffer vb;
 131         struct list_head        list;
 132         int                     idx;
 133 };
 134
 135 /**
 136  * struct gsc_addr - the G-Scaler physical address set
 137  * @y:   luminance plane address
 138  * @cb:  Cb plane address
 139  * @cr:  Cr plane address
 140  */
 141 struct gsc_addr {
 142         dma_addr_t y;
 143         dma_addr_t cb;
 144         dma_addr_t cr;
 145 };
 146
 147 /* struct gsc_ctrls - the G-Scaler control set
 148  * @rotate: rotation degree
 149  * @hflip: horizontal flip
 150  * @vflip: vertical flip
 151  * @global_alpha: the alpha value of current frame
 152  */
 153 struct gsc_ctrls {
 154         struct v4l2_ctrl *rotate;
 155         struct v4l2_ctrl *hflip;
 156         struct v4l2_ctrl *vflip;
 157         struct v4l2_ctrl *global_alpha;
 158 };
 159
 160 /**
 161  * struct gsc_scaler - the configuration data for G-Scaler inetrnal scaler
 162  * @pre_shfactor:       pre sclaer shift factor
 163  * @pre_hratio:         horizontal ratio of the prescaler
 164  * @pre_vratio:         vertical ratio of the prescaler
 165  * @main_hratio:        the main scaler's horizontal ratio
 166  * @main_vratio:        the main scaler's vertical ratio
 167  */
 168 struct gsc_scaler {
 169         u32 pre_shfactor;
 170         u32 pre_hratio;
 171         u32 pre_vratio;
 172         u32 main_hratio;
 173         u32 main_vratio;
 174 };
 175
 176 struct gsc_dev;
 177
 178 struct gsc_ctx;
 179
 180 /**
 181  * struct gsc_frame - source/target frame properties
 182  * @f_width:    SRC : SRCIMG_WIDTH, DST : OUTPUTDMA_WHOLE_IMG_WIDTH
 183  * @f_height:   SRC : SRCIMG_HEIGHT, DST : OUTPUTDMA_WHOLE_IMG_HEIGHT
 184  * @crop:       cropped(source)/scaled(destination) size
 185  * @payload:    image size in bytes (w x h x bpp)
 186  * @addr:       image frame buffer physical addresses
 187  * @fmt:        G-Scaler color format pointer
 188  * @colorspace: value indicating v4l2_colorspace
 189  * @alpha:      frame's alpha value
 190  */
 191 struct gsc_frame {
 192         u32 f_width;
 193         u32 f_height;
 194         struct v4l2_rect crop;
 195         unsigned long payload[VIDEO_MAX_PLANES];
 196         struct gsc_addr addr;
 197         const struct gsc_fmt *fmt;
 198         u32 colorspace;
 199         u8 alpha;
 200 };
 201
 202 /**
 203  * struct gsc_m2m_device - v4l2 memory-to-memory device data
 204  * @vfd: the video device node for v4l2 m2m mode
 205  * @m2m_dev: v4l2 memory-to-memory device data
 206  * @ctx: hardware context data
 207  * @refcnt: the reference counter
 208  */
 209 struct gsc_m2m_device {
 210         struct video_device     *vfd;
 211         struct v4l2_m2m_dev     *m2m_dev;
 212         struct gsc_ctx          *ctx;
 213         int                     refcnt;
 214 };
 215
 216 /**
 217  *  struct gsc_pix_max - image pixel size limits in various IP configurations
 218  *
 219  *  @org_scaler_bypass_w: max pixel width when the scaler is disabled
 220  *  @org_scaler_bypass_h: max pixel height when the scaler is disabled
 221  *  @org_scaler_input_w: max pixel width when the scaler is enabled
 222  *  @org_scaler_input_h: max pixel height when the scaler is enabled
 223  *  @real_rot_dis_w: max pixel src cropped height with the rotator is off
 224  *  @real_rot_dis_h: max pixel src cropped width with the rotator is off
 225  *  @real_rot_en_w: max pixel src cropped width with the rotator is on
 226  *  @real_rot_en_h: max pixel src cropped height with the rotator is on
 227  *  @target_rot_dis_w: max pixel dst scaled width with the rotator is off
 228  *  @target_rot_dis_h: max pixel dst scaled height with the rotator is off
 229  *  @target_rot_en_w: max pixel dst scaled width with the rotator is on
 230  *  @target_rot_en_h: max pixel dst scaled height with the rotator is on
 231  */
 232 struct gsc_pix_max {
 233         u16 org_scaler_bypass_w;
 234         u16 org_scaler_bypass_h;
 235         u16 org_scaler_input_w;
 236         u16 org_scaler_input_h;
 237         u16 real_rot_dis_w;
 238         u16 real_rot_dis_h;
 239         u16 real_rot_en_w;
 240         u16 real_rot_en_h;
 241         u16 target_rot_dis_w;
 242         u16 target_rot_dis_h;
 243         u16 target_rot_en_w;
 244         u16 target_rot_en_h;
 245 };
 246
 247 /**
 248  *  struct gsc_pix_min - image pixel size limits in various IP configurations
 249  *
 250  *  @org_w: minimum source pixel width
 251  *  @org_h: minimum source pixel height
 252  *  @real_w: minimum input crop pixel width
 253  *  @real_h: minimum input crop pixel height
 254  *  @target_rot_dis_w: minimum output scaled pixel height when rotator is off
 255  *  @target_rot_dis_h: minimum output scaled pixel height when rotator is off
 256  *  @target_rot_en_w: minimum output scaled pixel height when rotator is on
 257  *  @target_rot_en_h: minimum output scaled pixel height when rotator is on
 258  */
 259 struct gsc_pix_min {
 260         u16 org_w;
 261         u16 org_h;
 262         u16 real_w;
 263         u16 real_h;
 264         u16 target_rot_dis_w;
 265         u16 target_rot_dis_h;
 266         u16 target_rot_en_w;
 267         u16 target_rot_en_h;
 268 };
 269
 270 struct gsc_pix_align {
 271         u16 org_h;
 272         u16 org_w;
 273         u16 offset_h;
 274         u16 real_w;
 275         u16 real_h;
 276         u16 target_w;
 277         u16 target_h;
 278 };
 279
 280 /*
 281  * struct gsc_variant - G-Scaler variant information
 282  */
 283 struct gsc_variant {
 284         struct gsc_pix_max *pix_max;
 285         struct gsc_pix_min *pix_min;
 286         struct gsc_pix_align *pix_align;
 287         u16             in_buf_cnt;
 288         u16             out_buf_cnt;
 289         u16             sc_up_max;
 290         u16             sc_down_max;
 291         u16             poly_sc_down_max;
 292         u16             pre_sc_down_max;
 293         u16             local_sc_down;
 294 };
 295
 296 /**
 297  * struct gsc_driverdata - per device type driver data for init time.
 298  *
 299  * @variant: the variant information for this driver.
 300  * @num_entities: the number of g-scalers
 301  * @clk_names: clock names
 302  * @num_clocks: the number of clocks in @clk_names
 303  * @num_entities: the number of g-scalers
 304  */
 305 struct gsc_driverdata {
 306         struct gsc_variant *variant[GSC_MAX_DEVS];
 307         const char      *clk_names[GSC_MAX_CLOCKS];
 308         int             num_clocks;
 309         int             num_entities;
 310 };
 311
 312 /**
 313  * struct gsc_dev - abstraction for G-Scaler entity
 314  * @slock:      the spinlock protecting this data structure
 315  * @lock:       the mutex protecting this data structure
 316  * @pdev:       pointer to the G-Scaler platform device
 317  * @variant:    the IP variant information
 318  * @id:         G-Scaler device index (0..GSC_MAX_DEVS)
 319  * @num_clocks: number of clocks required for G-Scaler operation
 320  * @clock:      clocks required for G-Scaler operation
 321  * @regs:       the mapped hardware registers
 322  * @irq_queue:  interrupt handler waitqueue
 323  * @m2m:        memory-to-memory V4L2 device information
 324  * @state:      flags used to synchronize m2m and capture mode operation
 325  * @vdev:       video device for G-Scaler instance
 326  * @v4l2_dev:   v4l2_device for G-Scaler instance
 327  */
 328 struct gsc_dev {
 329         spinlock_t                      slock;
 330         struct mutex                    lock;
 331         struct platform_device          *pdev;
 332         struct gsc_variant              *variant;
 333         u16                             id;
 334         int                             num_clocks;
 335         struct clk                      *clock[GSC_MAX_CLOCKS];
 336         void __iomem                    *regs;
 337         wait_queue_head_t               irq_queue;
 338         struct gsc_m2m_device           m2m;
 339         unsigned long                   state;
 340         struct video_device             vdev;
 341         struct v4l2_device              v4l2_dev;
 342 };
 343
 344 /**
 345  * struct gsc_ctx - the device context data
 346  * @s_frame:            source frame properties
 347  * @d_frame:            destination frame properties
 348  * @in_path:            input mode (DMA or camera)
 349  * @out_path:           output mode (DMA or FIFO)
 350  * @scaler:             image scaler properties
 351  * @flags:              additional flags for image conversion
 352  * @state:              flags to keep track of user configuration
 353  * @rotation:           rotation
 354  * @hflip:              horizontal flip
 355  * @vflip:              vertical flip
 356  * @gsc_dev:            the G-Scaler device this context applies to
 357  * @m2m_ctx:            memory-to-memory device context
 358  * @fh:                 v4l2 file handle
 359  * @ctrl_handler:       v4l2 controls handler
 360  * @gsc_ctrls:          G-Scaler control set
 361  * @ctrls_rdy:          true if the control handler is initialized
 362  * @out_colorspace:     the colorspace of the OUTPUT queue
 363  */
 364 struct gsc_ctx {
 365         struct gsc_frame        s_frame;
 366         struct gsc_frame        d_frame;
 367         enum gsc_datapath       in_path;
 368         enum gsc_datapath       out_path;
 369         struct gsc_scaler       scaler;
 370         u32                     flags;
 371         u32                     state;
 372         int                     rotation;
 373         unsigned int            hflip:1;
 374         unsigned int            vflip:1;
 375         struct gsc_dev          *gsc_dev;
 376         struct v4l2_m2m_ctx     *m2m_ctx;
 377         struct v4l2_fh          fh;
 378         struct v4l2_ctrl_handler ctrl_handler;
 379         struct gsc_ctrls        gsc_ctrls;
 380         bool                    ctrls_rdy;
 381         enum v4l2_colorspace out_colorspace;
 382 };
 383
 384 void gsc_set_prefbuf(struct gsc_dev *gsc, struct gsc_frame *frm);
 385 int gsc_register_m2m_device(struct gsc_dev *gsc);
 386 void gsc_unregister_m2m_device(struct gsc_dev *gsc);
 387 void gsc_m2m_job_finish(struct gsc_ctx *ctx, int vb_state);
 388
 389 u32 get_plane_size(struct gsc_frame *fr, unsigned int plane);
 390 const struct gsc_fmt *get_format(int index);
 391 const struct gsc_fmt *find_fmt(u32 *pixelformat, u32 *mbus_code, u32 index);
 392 int gsc_enum_fmt(struct v4l2_fmtdesc *f);
 393 int gsc_try_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
 394 void gsc_set_frame_size(struct gsc_frame *frame, int width, int height);
 395 int gsc_g_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
 396 void gsc_check_crop_change(u32 tmp_w, u32 tmp_h, u32 *w, u32 *h);
 397 int gsc_try_selection(struct gsc_ctx *ctx, struct v4l2_selection *s);
 398 int gsc_cal_prescaler_ratio(struct gsc_variant *var, u32 src, u32 dst,
 399                                                         u32 *ratio);
 400 void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *sh);
 401 void gsc_check_src_scale_info(struct gsc_variant *var,
 402                                 struct gsc_frame *s_frame,
 403                                 u32 *wratio, u32 tx, u32 ty, u32 *hratio);
 404 int gsc_check_scaler_ratio(struct gsc_variant *var, int sw, int sh, int dw,
 405                            int dh, int rot, int out_path);
 406 int gsc_set_scaler_info(struct gsc_ctx *ctx);
 407 int gsc_ctrls_create(struct gsc_ctx *ctx);
 408 void gsc_ctrls_delete(struct gsc_ctx *ctx);
 409 int gsc_prepare_addr(struct gsc_ctx *ctx, struct vb2_buffer *vb,
 410                      struct gsc_frame *frame, struct gsc_addr *addr);
 411
 412 static inline void gsc_ctx_state_lock_set(u32 state, struct gsc_ctx *ctx)
 413 {
 414         unsigned long flags;
 415
 416         spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
 417         ctx->state |= state;
 418         spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
 419 }
 420
 421 static inline void gsc_ctx_state_lock_clear(u32 state, struct gsc_ctx *ctx)
 422 {
 423         unsigned long flags;
 424
 425         spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
 426         ctx->state &= ~state;
 427         spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
 428 }
 429
 430 static inline int is_tiled(const struct gsc_fmt *fmt)
 431 {
 432         return fmt->pixelformat == V4L2_PIX_FMT_NV12MT_16X16;
 433 }
 434
 435 static inline void gsc_hw_enable_control(struct gsc_dev *dev, bool on)
 436 {
 437         u32 cfg = readl(dev->regs + GSC_ENABLE);
 438
 439         if (on)
 440                 cfg |= GSC_ENABLE_ON;
 441         else
 442                 cfg &= ~GSC_ENABLE_ON;
 443
 444         writel(cfg, dev->regs + GSC_ENABLE);
 445 }
 446
 447 static inline int gsc_hw_get_irq_status(struct gsc_dev *dev)
 448 {
 449         u32 cfg = readl(dev->regs + GSC_IRQ);
 450         if (cfg & GSC_IRQ_STATUS_OR_IRQ)
 451                 return GSC_IRQ_OVERRUN;
 452         else
 453                 return GSC_IRQ_DONE;
 454
 455 }
 456
 457 static inline void gsc_hw_clear_irq(struct gsc_dev *dev, int irq)
 458 {
 459         u32 cfg = readl(dev->regs + GSC_IRQ);
 460         if (irq == GSC_IRQ_OVERRUN)
 461                 cfg |= GSC_IRQ_STATUS_OR_IRQ;
 462         else if (irq == GSC_IRQ_DONE)
 463                 cfg |= GSC_IRQ_STATUS_FRM_DONE_IRQ;
 464         writel(cfg, dev->regs + GSC_IRQ);
 465 }
 466
 467 static inline bool gsc_ctx_state_is_set(u32 mask, struct gsc_ctx *ctx)
 468 {
 469         unsigned long flags;
 470         bool ret;
 471
 472         spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
 473         ret = (ctx->state & mask) == mask;
 474         spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
 475         return ret;
 476 }
 477
 478 static inline struct gsc_frame *ctx_get_frame(struct gsc_ctx *ctx,
 479                                               enum v4l2_buf_type type)
 480 {
 481         struct gsc_frame *frame;
 482
 483         if (V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE == type) {
 484                 frame = &ctx->s_frame;
 485         } else if (V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE == type) {
 486                 frame = &ctx->d_frame;
 487         } else {
 488                 pr_err("Wrong buffer/video queue type (%d)", type);
 489                 return ERR_PTR(-EINVAL);
 490         }
 491
 492         return frame;
 493 }
 494
 495 void gsc_hw_set_sw_reset(struct gsc_dev *dev);
 496 int gsc_wait_reset(struct gsc_dev *dev);
 497
 498 void gsc_hw_set_frm_done_irq_mask(struct gsc_dev *dev, bool mask);
 499 void gsc_hw_set_gsc_irq_enable(struct gsc_dev *dev, bool mask);
 500 void gsc_hw_set_input_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
 501 void gsc_hw_set_output_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
 502 void gsc_hw_set_input_addr(struct gsc_dev *dev, struct gsc_addr *addr,
 503                                                         int index);
 504 void gsc_hw_set_output_addr(struct gsc_dev *dev, struct gsc_addr *addr,
 505                                                         int index);
 506 void gsc_hw_set_input_path(struct gsc_ctx *ctx);
 507 void gsc_hw_set_in_size(struct gsc_ctx *ctx);
 508 void gsc_hw_set_in_image_rgb(struct gsc_ctx *ctx);
 509 void gsc_hw_set_in_image_format(struct gsc_ctx *ctx);
 510 void gsc_hw_set_output_path(struct gsc_ctx *ctx);
 511 void gsc_hw_set_out_size(struct gsc_ctx *ctx);
 512 void gsc_hw_set_out_image_rgb(struct gsc_ctx *ctx);
 513 void gsc_hw_set_out_image_format(struct gsc_ctx *ctx);
 514 void gsc_hw_set_prescaler(struct gsc_ctx *ctx);
 515 void gsc_hw_set_mainscaler(struct gsc_ctx *ctx);
 516 void gsc_hw_set_rotation(struct gsc_ctx *ctx);
 517 void gsc_hw_set_global_alpha(struct gsc_ctx *ctx);
 518 void gsc_hw_set_sfr_update(struct gsc_ctx *ctx);
 519
 520 #endif /* GSC_CORE_H_ */