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Merge tag 'trace-printf-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/trace...
[drm/drm-misc.git] / drivers / media / rc / ene_ir.c
blob67722e2e47ff78e504c55054480f0619e050f093
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * driver for ENE KB3926 B/C/D/E/F CIR (pnp id: ENE0XXX)
4 *
5 * Copyright (C) 2010 Maxim Levitsky <maximlevitsky@gmail.com>
6 *
7 * Special thanks to:
8 * Sami R. <maesesami@gmail.com> for lot of help in debugging and therefore
9 * bringing to life support for transmission & learning mode.
10 *
11 * Charlie Andrews <charliethepilot@googlemail.com> for lots of help in
12 * bringing up the support of new firmware buffer that is popular
13 * on latest notebooks
14 *
15 * ENE for partial device documentation
16 */
17
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/pnp.h>
23 #include <linux/io.h>
24 #include <linux/interrupt.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <media/rc-core.h>
28 #include "ene_ir.h"
29
30 static int sample_period;
31 static bool learning_mode_force;
32 static int debug;
33 static bool txsim;
34
35 static void ene_set_reg_addr(struct ene_device *dev, u16 reg)
36 {
37 outb(reg >> 8, dev->hw_io + ENE_ADDR_HI);
38 outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO);
39 }
40
41 /* read a hardware register */
42 static u8 ene_read_reg(struct ene_device *dev, u16 reg)
43 {
44 u8 retval;
45 ene_set_reg_addr(dev, reg);
46 retval = inb(dev->hw_io + ENE_IO);
47 dbg_regs("reg %04x == %02x", reg, retval);
48 return retval;
49 }
50
51 /* write a hardware register */
52 static void ene_write_reg(struct ene_device *dev, u16 reg, u8 value)
53 {
54 dbg_regs("reg %04x <- %02x", reg, value);
55 ene_set_reg_addr(dev, reg);
56 outb(value, dev->hw_io + ENE_IO);
57 }
58
59 /* Set bits in hardware register */
60 static void ene_set_reg_mask(struct ene_device *dev, u16 reg, u8 mask)
61 {
62 dbg_regs("reg %04x |= %02x", reg, mask);
63 ene_set_reg_addr(dev, reg);
64 outb(inb(dev->hw_io + ENE_IO) | mask, dev->hw_io + ENE_IO);
65 }
66
67 /* Clear bits in hardware register */
68 static void ene_clear_reg_mask(struct ene_device *dev, u16 reg, u8 mask)
69 {
70 dbg_regs("reg %04x &= ~%02x ", reg, mask);
71 ene_set_reg_addr(dev, reg);
72 outb(inb(dev->hw_io + ENE_IO) & ~mask, dev->hw_io + ENE_IO);
73 }
74
75 /* A helper to set/clear a bit in register according to boolean variable */
76 static void ene_set_clear_reg_mask(struct ene_device *dev, u16 reg, u8 mask,
77 bool set)
78 {
79 if (set)
80 ene_set_reg_mask(dev, reg, mask);
81 else
82 ene_clear_reg_mask(dev, reg, mask);
83 }
84
85 /* detect hardware features */
86 static int ene_hw_detect(struct ene_device *dev)
87 {
88 u8 chip_major, chip_minor;
89 u8 hw_revision, old_ver;
90 u8 fw_reg2, fw_reg1;
91
92 ene_clear_reg_mask(dev, ENE_ECSTS, ENE_ECSTS_RSRVD);
93 chip_major = ene_read_reg(dev, ENE_ECVER_MAJOR);
94 chip_minor = ene_read_reg(dev, ENE_ECVER_MINOR);
95 ene_set_reg_mask(dev, ENE_ECSTS, ENE_ECSTS_RSRVD);
96
97 hw_revision = ene_read_reg(dev, ENE_ECHV);
98 old_ver = ene_read_reg(dev, ENE_HW_VER_OLD);
99
100 dev->pll_freq = (ene_read_reg(dev, ENE_PLLFRH) << 4) +
101 (ene_read_reg(dev, ENE_PLLFRL) >> 4);
102
103 if (sample_period != ENE_DEFAULT_SAMPLE_PERIOD)
104 dev->rx_period_adjust =
105 dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 2 : 4;
106
107 if (hw_revision == 0xFF) {
108 pr_warn("device seems to be disabled\n");
109 pr_warn("send a mail to lirc-list@lists.sourceforge.net\n");
110 pr_warn("please attach output of acpidump and dmidecode\n");
111 return -ENODEV;
112 }
113
114 pr_notice("chip is 0x%02x%02x - kbver = 0x%02x, rev = 0x%02x\n",
115 chip_major, chip_minor, old_ver, hw_revision);
116
117 pr_notice("PLL freq = %d\n", dev->pll_freq);
118
119 if (chip_major == 0x33) {
120 pr_warn("chips 0x33xx aren't supported\n");
121 return -ENODEV;
122 }
123
124 if (chip_major == 0x39 && chip_minor == 0x26 && hw_revision == 0xC0) {
125 dev->hw_revision = ENE_HW_C;
126 pr_notice("KB3926C detected\n");
127 } else if (old_ver == 0x24 && hw_revision == 0xC0) {
128 dev->hw_revision = ENE_HW_B;
129 pr_notice("KB3926B detected\n");
130 } else {
131 dev->hw_revision = ENE_HW_D;
132 pr_notice("KB3926D or higher detected\n");
133 }
134
135 /* detect features hardware supports */
136 if (dev->hw_revision < ENE_HW_C)
137 return 0;
138
139 fw_reg1 = ene_read_reg(dev, ENE_FW1);
140 fw_reg2 = ene_read_reg(dev, ENE_FW2);
141
142 pr_notice("Firmware regs: %02x %02x\n", fw_reg1, fw_reg2);
143
144 dev->hw_use_gpio_0a = !!(fw_reg2 & ENE_FW2_GP0A);
145 dev->hw_learning_and_tx_capable = !!(fw_reg2 & ENE_FW2_LEARNING);
146 dev->hw_extra_buffer = !!(fw_reg1 & ENE_FW1_HAS_EXTRA_BUF);
147
148 if (dev->hw_learning_and_tx_capable)
149 dev->hw_fan_input = !!(fw_reg2 & ENE_FW2_FAN_INPUT);
150
151 pr_notice("Hardware features:\n");
152
153 if (dev->hw_learning_and_tx_capable) {
154 pr_notice("* Supports transmitting & learning mode\n");
155 pr_notice(" This feature is rare and therefore,\n");
156 pr_notice(" you are welcome to test it,\n");
157 pr_notice(" and/or contact the author via:\n");
158 pr_notice(" lirc-list@lists.sourceforge.net\n");
159 pr_notice(" or maximlevitsky@gmail.com\n");
160
161 pr_notice("* Uses GPIO %s for IR raw input\n",
162 dev->hw_use_gpio_0a ? "40" : "0A");
163
164 if (dev->hw_fan_input)
165 pr_notice("* Uses unused fan feedback input as source of demodulated IR data\n");
166 }
167
168 if (!dev->hw_fan_input)
169 pr_notice("* Uses GPIO %s for IR demodulated input\n",
170 dev->hw_use_gpio_0a ? "0A" : "40");
171
172 if (dev->hw_extra_buffer)
173 pr_notice("* Uses new style input buffer\n");
174 return 0;
175 }
176
177 /* Read properties of hw sample buffer */
178 static void ene_rx_setup_hw_buffer(struct ene_device *dev)
179 {
180 u16 tmp;
181
182 ene_rx_read_hw_pointer(dev);
183 dev->r_pointer = dev->w_pointer;
184
185 if (!dev->hw_extra_buffer) {
186 dev->buffer_len = ENE_FW_PACKET_SIZE * 2;
187 return;
188 }
189
190 tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER);
191 tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER+1) << 8;
192 dev->extra_buf1_address = tmp;
193
194 dev->extra_buf1_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 2);
195
196 tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 3);
197 tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 4) << 8;
198 dev->extra_buf2_address = tmp;
199
200 dev->extra_buf2_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 5);
201
202 dev->buffer_len = dev->extra_buf1_len + dev->extra_buf2_len + 8;
203
204 pr_notice("Hardware uses 2 extended buffers:\n");
205 pr_notice(" 0x%04x - len : %d\n",
206 dev->extra_buf1_address, dev->extra_buf1_len);
207 pr_notice(" 0x%04x - len : %d\n",
208 dev->extra_buf2_address, dev->extra_buf2_len);
209
210 pr_notice("Total buffer len = %d\n", dev->buffer_len);
211
212 if (dev->buffer_len > 64 || dev->buffer_len < 16)
213 goto error;
214
215 if (dev->extra_buf1_address > 0xFBFC ||
216 dev->extra_buf1_address < 0xEC00)
217 goto error;
218
219 if (dev->extra_buf2_address > 0xFBFC ||
220 dev->extra_buf2_address < 0xEC00)
221 goto error;
222
223 if (dev->r_pointer > dev->buffer_len)
224 goto error;
225
226 ene_set_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
227 return;
228 error:
229 pr_warn("Error validating extra buffers, device probably won't work\n");
230 dev->hw_extra_buffer = false;
231 ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
232 }
233
234
235 /* Restore the pointers to extra buffers - to make module reload work*/
236 static void ene_rx_restore_hw_buffer(struct ene_device *dev)
237 {
238 if (!dev->hw_extra_buffer)
239 return;
240
241 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 0,
242 dev->extra_buf1_address & 0xFF);
243 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 1,
244 dev->extra_buf1_address >> 8);
245 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 2, dev->extra_buf1_len);
246
247 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 3,
248 dev->extra_buf2_address & 0xFF);
249 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 4,
250 dev->extra_buf2_address >> 8);
251 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 5,
252 dev->extra_buf2_len);
253 ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
254 }
255
256 /* Read hardware write pointer */
257 static void ene_rx_read_hw_pointer(struct ene_device *dev)
258 {
259 if (dev->hw_extra_buffer)
260 dev->w_pointer = ene_read_reg(dev, ENE_FW_RX_POINTER);
261 else
262 dev->w_pointer = ene_read_reg(dev, ENE_FW2)
263 & ENE_FW2_BUF_WPTR ? 0 : ENE_FW_PACKET_SIZE;
264
265 dbg_verbose("RB: HW write pointer: %02x, driver read pointer: %02x",
266 dev->w_pointer, dev->r_pointer);
267 }
268
269 /* Gets address of next sample from HW ring buffer */
270 static int ene_rx_get_sample_reg(struct ene_device *dev)
271 {
272 int r_pointer;
273
274 if (dev->r_pointer == dev->w_pointer) {
275 dbg_verbose("RB: hit end, try update w_pointer");
276 ene_rx_read_hw_pointer(dev);
277 }
278
279 if (dev->r_pointer == dev->w_pointer) {
280 dbg_verbose("RB: end of data at %d", dev->r_pointer);
281 return 0;
282 }
283
284 dbg_verbose("RB: reading at offset %d", dev->r_pointer);
285 r_pointer = dev->r_pointer;
286
287 dev->r_pointer++;
288 if (dev->r_pointer == dev->buffer_len)
289 dev->r_pointer = 0;
290
291 dbg_verbose("RB: next read will be from offset %d", dev->r_pointer);
292
293 if (r_pointer < 8) {
294 dbg_verbose("RB: read at main buffer at %d", r_pointer);
295 return ENE_FW_SAMPLE_BUFFER + r_pointer;
296 }
297
298 r_pointer -= 8;
299
300 if (r_pointer < dev->extra_buf1_len) {
301 dbg_verbose("RB: read at 1st extra buffer at %d", r_pointer);
302 return dev->extra_buf1_address + r_pointer;
303 }
304
305 r_pointer -= dev->extra_buf1_len;
306
307 if (r_pointer < dev->extra_buf2_len) {
308 dbg_verbose("RB: read at 2nd extra buffer at %d", r_pointer);
309 return dev->extra_buf2_address + r_pointer;
310 }
311
312 dbg("attempt to read beyond ring buffer end");
313 return 0;
314 }
315
316 /* Sense current received carrier */
317 static void ene_rx_sense_carrier(struct ene_device *dev)
318 {
319 int carrier, duty_cycle;
320 int period = ene_read_reg(dev, ENE_CIRCAR_PRD);
321 int hperiod = ene_read_reg(dev, ENE_CIRCAR_HPRD);
322
323 if (!(period & ENE_CIRCAR_PRD_VALID))
324 return;
325
326 period &= ~ENE_CIRCAR_PRD_VALID;
327
328 if (!period)
329 return;
330
331 dbg("RX: hardware carrier period = %02x", period);
332 dbg("RX: hardware carrier pulse period = %02x", hperiod);
333
334 carrier = 2000000 / period;
335 duty_cycle = (hperiod * 100) / period;
336 dbg("RX: sensed carrier = %d Hz, duty cycle %d%%",
337 carrier, duty_cycle);
338 if (dev->carrier_detect_enabled) {
339 struct ir_raw_event ev = {
340 .carrier_report = true,
341 .carrier = carrier,
342 .duty_cycle = duty_cycle
343 };
344 ir_raw_event_store(dev->rdev, &ev);
345 }
346 }
347
348 /* this enables/disables the CIR RX engine */
349 static void ene_rx_enable_cir_engine(struct ene_device *dev, bool enable)
350 {
351 ene_set_clear_reg_mask(dev, ENE_CIRCFG,
352 ENE_CIRCFG_RX_EN | ENE_CIRCFG_RX_IRQ, enable);
353 }
354
355 /* this selects input for CIR engine. Ether GPIO 0A or GPIO40*/
356 static void ene_rx_select_input(struct ene_device *dev, bool gpio_0a)
357 {
358 ene_set_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_GPIO0A, gpio_0a);
359 }
360
361 /*
362 * this enables alternative input via fan tachometer sensor and bypasses
363 * the hw CIR engine
364 */
365 static void ene_rx_enable_fan_input(struct ene_device *dev, bool enable)
366 {
367 if (!dev->hw_fan_input)
368 return;
369
370 if (!enable)
371 ene_write_reg(dev, ENE_FAN_AS_IN1, 0);
372 else {
373 ene_write_reg(dev, ENE_FAN_AS_IN1, ENE_FAN_AS_IN1_EN);
374 ene_write_reg(dev, ENE_FAN_AS_IN2, ENE_FAN_AS_IN2_EN);
375 }
376 }
377
378 /* setup the receiver for RX*/
379 static void ene_rx_setup(struct ene_device *dev)
380 {
381 bool learning_mode = dev->learning_mode_enabled ||
382 dev->carrier_detect_enabled;
383 int sample_period_adjust = 0;
384
385 dbg("RX: setup receiver, learning mode = %d", learning_mode);
386
387
388 /* This selects RLC input and clears CFG2 settings */
389 ene_write_reg(dev, ENE_CIRCFG2, 0x00);
390
391 /* set sample period*/
392 if (sample_period == ENE_DEFAULT_SAMPLE_PERIOD)
393 sample_period_adjust =
394 dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 1 : 2;
395
396 ene_write_reg(dev, ENE_CIRRLC_CFG,
397 (sample_period + sample_period_adjust) |
398 ENE_CIRRLC_CFG_OVERFLOW);
399 /* revB doesn't support inputs */
400 if (dev->hw_revision < ENE_HW_C)
401 goto select_timeout;
402
403 if (learning_mode) {
404
405 WARN_ON(!dev->hw_learning_and_tx_capable);
406
407 /* Enable the opposite of the normal input
408 That means that if GPIO40 is normally used, use GPIO0A
409 and vice versa.
410 This input will carry non demodulated
411 signal, and we will tell the hw to demodulate it itself */
412 ene_rx_select_input(dev, !dev->hw_use_gpio_0a);
413 dev->rx_fan_input_inuse = false;
414
415 /* Enable carrier demodulation */
416 ene_set_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_CARR_DEMOD);
417
418 /* Enable carrier detection */
419 ene_write_reg(dev, ENE_CIRCAR_PULS, 0x63);
420 ene_set_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_CARR_DETECT,
421 dev->carrier_detect_enabled || debug);
422 } else {
423 if (dev->hw_fan_input)
424 dev->rx_fan_input_inuse = true;
425 else
426 ene_rx_select_input(dev, dev->hw_use_gpio_0a);
427
428 /* Disable carrier detection & demodulation */
429 ene_clear_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_CARR_DEMOD);
430 ene_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_CARR_DETECT);
431 }
432
433 select_timeout:
434 if (dev->rx_fan_input_inuse) {
435 dev->rdev->rx_resolution = ENE_FW_SAMPLE_PERIOD_FAN;
436
437 /* Fan input doesn't support timeouts, it just ends the
438 input with a maximum sample */
439 dev->rdev->min_timeout = dev->rdev->max_timeout =
440 ENE_FW_SMPL_BUF_FAN_MSK *
441 ENE_FW_SAMPLE_PERIOD_FAN;
442 } else {
443 dev->rdev->rx_resolution = sample_period;
444
445 /* Theoreticly timeout is unlimited, but we cap it
446 * because it was seen that on one device, it
447 * would stop sending spaces after around 250 msec.
448 * Besides, this is close to 2^32 anyway and timeout is u32.
449 */
450 dev->rdev->min_timeout = 127 * sample_period;
451 dev->rdev->max_timeout = 200000;
452 }
453
454 if (dev->rdev->timeout > dev->rdev->max_timeout)
455 dev->rdev->timeout = dev->rdev->max_timeout;
456 if (dev->rdev->timeout < dev->rdev->min_timeout)
457 dev->rdev->timeout = dev->rdev->min_timeout;
458 }
459
460 /* Enable the device for receive */
461 static void ene_rx_enable_hw(struct ene_device *dev)
462 {
463 u8 reg_value;
464
465 /* Enable system interrupt */
466 if (dev->hw_revision < ENE_HW_C) {
467 ene_write_reg(dev, ENEB_IRQ, dev->irq << 1);
468 ene_write_reg(dev, ENEB_IRQ_UNK1, 0x01);
469 } else {
470 reg_value = ene_read_reg(dev, ENE_IRQ) & 0xF0;
471 reg_value |= ENE_IRQ_UNK_EN;
472 reg_value &= ~ENE_IRQ_STATUS;
473 reg_value |= (dev->irq & ENE_IRQ_MASK);
474 ene_write_reg(dev, ENE_IRQ, reg_value);
475 }
476
477 /* Enable inputs */
478 ene_rx_enable_fan_input(dev, dev->rx_fan_input_inuse);
479 ene_rx_enable_cir_engine(dev, !dev->rx_fan_input_inuse);
480
481 /* ack any pending irqs - just in case */
482 ene_irq_status(dev);
483
484 /* enable firmware bits */
485 ene_set_reg_mask(dev, ENE_FW1, ENE_FW1_ENABLE | ENE_FW1_IRQ);
486
487 /* enter idle mode */
488 ir_raw_event_set_idle(dev->rdev, true);
489 }
490
491 /* Enable the device for receive - wrapper to track the state*/
492 static void ene_rx_enable(struct ene_device *dev)
493 {
494 ene_rx_enable_hw(dev);
495 dev->rx_enabled = true;
496 }
497
498 /* Disable the device receiver */
499 static void ene_rx_disable_hw(struct ene_device *dev)
500 {
501 /* disable inputs */
502 ene_rx_enable_cir_engine(dev, false);
503 ene_rx_enable_fan_input(dev, false);
504
505 /* disable hardware IRQ and firmware flag */
506 ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_ENABLE | ENE_FW1_IRQ);
507 ir_raw_event_set_idle(dev->rdev, true);
508 }
509
510 /* Disable the device receiver - wrapper to track the state */
511 static void ene_rx_disable(struct ene_device *dev)
512 {
513 ene_rx_disable_hw(dev);
514 dev->rx_enabled = false;
515 }
516
517 /* This resets the receiver. Useful to stop stream of spaces at end of
518 * transmission
519 */
520 static void ene_rx_reset(struct ene_device *dev)
521 {
522 ene_clear_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_RX_EN);
523 ene_set_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_RX_EN);
524 }
525
526 /* Set up the TX carrier frequency and duty cycle */
527 static void ene_tx_set_carrier(struct ene_device *dev)
528 {
529 u8 tx_puls_width;
530 unsigned long flags;
531
532 spin_lock_irqsave(&dev->hw_lock, flags);
533
534 ene_set_clear_reg_mask(dev, ENE_CIRCFG,
535 ENE_CIRCFG_TX_CARR, dev->tx_period > 0);
536
537 if (!dev->tx_period)
538 goto unlock;
539
540 BUG_ON(dev->tx_duty_cycle >= 100 || dev->tx_duty_cycle <= 0);
541
542 tx_puls_width = dev->tx_period / (100 / dev->tx_duty_cycle);
543
544 if (!tx_puls_width)
545 tx_puls_width = 1;
546
547 dbg("TX: pulse distance = %d * 500 ns", dev->tx_period);
548 dbg("TX: pulse width = %d * 500 ns", tx_puls_width);
549
550 ene_write_reg(dev, ENE_CIRMOD_PRD, dev->tx_period | ENE_CIRMOD_PRD_POL);
551 ene_write_reg(dev, ENE_CIRMOD_HPRD, tx_puls_width);
552 unlock:
553 spin_unlock_irqrestore(&dev->hw_lock, flags);
554 }
555
556 /* Enable/disable transmitters */
557 static void ene_tx_set_transmitters(struct ene_device *dev)
558 {
559 unsigned long flags;
560
561 spin_lock_irqsave(&dev->hw_lock, flags);
562 ene_set_clear_reg_mask(dev, ENE_GPIOFS8, ENE_GPIOFS8_GPIO41,
563 !!(dev->transmitter_mask & 0x01));
564 ene_set_clear_reg_mask(dev, ENE_GPIOFS1, ENE_GPIOFS1_GPIO0D,
565 !!(dev->transmitter_mask & 0x02));
566 spin_unlock_irqrestore(&dev->hw_lock, flags);
567 }
568
569 /* prepare transmission */
570 static void ene_tx_enable(struct ene_device *dev)
571 {
572 u8 conf1 = ene_read_reg(dev, ENE_CIRCFG);
573 u8 fwreg2 = ene_read_reg(dev, ENE_FW2);
574
575 dev->saved_conf1 = conf1;
576
577 /* Show information about currently connected transmitter jacks */
578 if (fwreg2 & ENE_FW2_EMMITER1_CONN)
579 dbg("TX: Transmitter #1 is connected");
580
581 if (fwreg2 & ENE_FW2_EMMITER2_CONN)
582 dbg("TX: Transmitter #2 is connected");
583
584 if (!(fwreg2 & (ENE_FW2_EMMITER1_CONN | ENE_FW2_EMMITER2_CONN)))
585 pr_warn("TX: transmitter cable isn't connected!\n");
586
587 /* disable receive on revc */
588 if (dev->hw_revision == ENE_HW_C)
589 conf1 &= ~ENE_CIRCFG_RX_EN;
590
591 /* Enable TX engine */
592 conf1 |= ENE_CIRCFG_TX_EN | ENE_CIRCFG_TX_IRQ;
593 ene_write_reg(dev, ENE_CIRCFG, conf1);
594 }
595
596 /* end transmission */
597 static void ene_tx_disable(struct ene_device *dev)
598 {
599 ene_write_reg(dev, ENE_CIRCFG, dev->saved_conf1);
600 dev->tx_buffer = NULL;
601 }
602
603
604 /* TX one sample - must be called with dev->hw_lock*/
605 static void ene_tx_sample(struct ene_device *dev)
606 {
607 u8 raw_tx;
608 u32 sample;
609 bool pulse = dev->tx_sample_pulse;
610
611 if (!dev->tx_buffer) {
612 pr_warn("TX: BUG: attempt to transmit NULL buffer\n");
613 return;
614 }
615
616 /* Grab next TX sample */
617 if (!dev->tx_sample) {
618
619 if (dev->tx_pos == dev->tx_len) {
620 if (!dev->tx_done) {
621 dbg("TX: no more data to send");
622 dev->tx_done = true;
623 goto exit;
624 } else {
625 dbg("TX: last sample sent by hardware");
626 ene_tx_disable(dev);
627 complete(&dev->tx_complete);
628 return;
629 }
630 }
631
632 sample = dev->tx_buffer[dev->tx_pos++];
633 dev->tx_sample_pulse = !dev->tx_sample_pulse;
634
635 dev->tx_sample = DIV_ROUND_CLOSEST(sample, sample_period);
636
637 if (!dev->tx_sample)
638 dev->tx_sample = 1;
639 }
640
641 raw_tx = min(dev->tx_sample , (unsigned int)ENE_CIRRLC_OUT_MASK);
642 dev->tx_sample -= raw_tx;
643
644 dbg("TX: sample %8d (%s)", raw_tx * sample_period,
645 pulse ? "pulse" : "space");
646 if (pulse)
647 raw_tx |= ENE_CIRRLC_OUT_PULSE;
648
649 ene_write_reg(dev,
650 dev->tx_reg ? ENE_CIRRLC_OUT1 : ENE_CIRRLC_OUT0, raw_tx);
651
652 dev->tx_reg = !dev->tx_reg;
653 exit:
654 /* simulate TX done interrupt */
655 if (txsim)
656 mod_timer(&dev->tx_sim_timer, jiffies + HZ / 500);
657 }
658
659 /* timer to simulate tx done interrupt */
660 static void ene_tx_irqsim(struct timer_list *t)
661 {
662 struct ene_device *dev = from_timer(dev, t, tx_sim_timer);
663 unsigned long flags;
664
665 spin_lock_irqsave(&dev->hw_lock, flags);
666 ene_tx_sample(dev);
667 spin_unlock_irqrestore(&dev->hw_lock, flags);
668 }
669
670
671 /* read irq status and ack it */
672 static int ene_irq_status(struct ene_device *dev)
673 {
674 u8 irq_status;
675 u8 fw_flags1, fw_flags2;
676 int retval = 0;
677
678 fw_flags2 = ene_read_reg(dev, ENE_FW2);
679
680 if (dev->hw_revision < ENE_HW_C) {
681 irq_status = ene_read_reg(dev, ENEB_IRQ_STATUS);
682
683 if (!(irq_status & ENEB_IRQ_STATUS_IR))
684 return 0;
685
686 ene_clear_reg_mask(dev, ENEB_IRQ_STATUS, ENEB_IRQ_STATUS_IR);
687 return ENE_IRQ_RX;
688 }
689
690 irq_status = ene_read_reg(dev, ENE_IRQ);
691 if (!(irq_status & ENE_IRQ_STATUS))
692 return 0;
693
694 /* original driver does that twice - a workaround ? */
695 ene_write_reg(dev, ENE_IRQ, irq_status & ~ENE_IRQ_STATUS);
696 ene_write_reg(dev, ENE_IRQ, irq_status & ~ENE_IRQ_STATUS);
697
698 /* check RX interrupt */
699 if (fw_flags2 & ENE_FW2_RXIRQ) {
700 retval |= ENE_IRQ_RX;
701 ene_write_reg(dev, ENE_FW2, fw_flags2 & ~ENE_FW2_RXIRQ);
702 }
703
704 /* check TX interrupt */
705 fw_flags1 = ene_read_reg(dev, ENE_FW1);
706 if (fw_flags1 & ENE_FW1_TXIRQ) {
707 ene_write_reg(dev, ENE_FW1, fw_flags1 & ~ENE_FW1_TXIRQ);
708 retval |= ENE_IRQ_TX;
709 }
710
711 return retval;
712 }
713
714 /* interrupt handler */
715 static irqreturn_t ene_isr(int irq, void *data)
716 {
717 u16 hw_value, reg;
718 int hw_sample, irq_status;
719 bool pulse;
720 unsigned long flags;
721 irqreturn_t retval = IRQ_NONE;
722 struct ene_device *dev = (struct ene_device *)data;
723 struct ir_raw_event ev = {};
724
725 spin_lock_irqsave(&dev->hw_lock, flags);
726
727 dbg_verbose("ISR called");
728 ene_rx_read_hw_pointer(dev);
729 irq_status = ene_irq_status(dev);
730
731 if (!irq_status)
732 goto unlock;
733
734 retval = IRQ_HANDLED;
735
736 if (irq_status & ENE_IRQ_TX) {
737 dbg_verbose("TX interrupt");
738 if (!dev->hw_learning_and_tx_capable) {
739 dbg("TX interrupt on unsupported device!");
740 goto unlock;
741 }
742 ene_tx_sample(dev);
743 }
744
745 if (!(irq_status & ENE_IRQ_RX))
746 goto unlock;
747
748 dbg_verbose("RX interrupt");
749
750 if (dev->hw_learning_and_tx_capable)
751 ene_rx_sense_carrier(dev);
752
753 /* On hardware that don't support extra buffer we need to trust
754 the interrupt and not track the read pointer */
755 if (!dev->hw_extra_buffer)
756 dev->r_pointer = dev->w_pointer == 0 ? ENE_FW_PACKET_SIZE : 0;
757
758 while (1) {
759
760 reg = ene_rx_get_sample_reg(dev);
761
762 dbg_verbose("next sample to read at: %04x", reg);
763 if (!reg)
764 break;
765
766 hw_value = ene_read_reg(dev, reg);
767
768 if (dev->rx_fan_input_inuse) {
769
770 int offset = ENE_FW_SMPL_BUF_FAN - ENE_FW_SAMPLE_BUFFER;
771
772 /* read high part of the sample */
773 hw_value |= ene_read_reg(dev, reg + offset) << 8;
774 pulse = hw_value & ENE_FW_SMPL_BUF_FAN_PLS;
775
776 /* clear space bit, and other unused bits */
777 hw_value &= ENE_FW_SMPL_BUF_FAN_MSK;
778 hw_sample = hw_value * ENE_FW_SAMPLE_PERIOD_FAN;
779
780 } else {
781 pulse = !(hw_value & ENE_FW_SAMPLE_SPACE);
782 hw_value &= ~ENE_FW_SAMPLE_SPACE;
783 hw_sample = hw_value * sample_period;
784
785 if (dev->rx_period_adjust) {
786 hw_sample *= 100;
787 hw_sample /= (100 + dev->rx_period_adjust);
788 }
789 }
790
791 if (!dev->hw_extra_buffer && !hw_sample) {
792 dev->r_pointer = dev->w_pointer;
793 continue;
794 }
795
796 dbg("RX: %d (%s)", hw_sample, pulse ? "pulse" : "space");
797
798 ev.duration = hw_sample;
799 ev.pulse = pulse;
800 ir_raw_event_store_with_filter(dev->rdev, &ev);
801 }
802
803 ir_raw_event_handle(dev->rdev);
804 unlock:
805 spin_unlock_irqrestore(&dev->hw_lock, flags);
806 return retval;
807 }
808
809 /* Initialize default settings */
810 static void ene_setup_default_settings(struct ene_device *dev)
811 {
812 dev->tx_period = 32;
813 dev->tx_duty_cycle = 50; /*%*/
814 dev->transmitter_mask = 0x03;
815 dev->learning_mode_enabled = learning_mode_force;
816
817 /* Set reasonable default timeout */
818 dev->rdev->timeout = MS_TO_US(150);
819 }
820
821 /* Upload all hardware settings at once. Used at load and resume time */
822 static void ene_setup_hw_settings(struct ene_device *dev)
823 {
824 if (dev->hw_learning_and_tx_capable) {
825 ene_tx_set_carrier(dev);
826 ene_tx_set_transmitters(dev);
827 }
828
829 ene_rx_setup(dev);
830 }
831
832 /* outside interface: called on first open*/
833 static int ene_open(struct rc_dev *rdev)
834 {
835 struct ene_device *dev = rdev->priv;
836 unsigned long flags;
837
838 spin_lock_irqsave(&dev->hw_lock, flags);
839 ene_rx_enable(dev);
840 spin_unlock_irqrestore(&dev->hw_lock, flags);
841 return 0;
842 }
843
844 /* outside interface: called on device close*/
845 static void ene_close(struct rc_dev *rdev)
846 {
847 struct ene_device *dev = rdev->priv;
848 unsigned long flags;
849 spin_lock_irqsave(&dev->hw_lock, flags);
850
851 ene_rx_disable(dev);
852 spin_unlock_irqrestore(&dev->hw_lock, flags);
853 }
854
855 /* outside interface: set transmitter mask */
856 static int ene_set_tx_mask(struct rc_dev *rdev, u32 tx_mask)
857 {
858 struct ene_device *dev = rdev->priv;
859 dbg("TX: attempt to set transmitter mask %02x", tx_mask);
860
861 /* invalid txmask */
862 if (!tx_mask || tx_mask & ~0x03) {
863 dbg("TX: invalid mask");
864 /* return count of transmitters */
865 return 2;
866 }
867
868 dev->transmitter_mask = tx_mask;
869 ene_tx_set_transmitters(dev);
870 return 0;
871 }
872
873 /* outside interface : set tx carrier */
874 static int ene_set_tx_carrier(struct rc_dev *rdev, u32 carrier)
875 {
876 struct ene_device *dev = rdev->priv;
877 u32 period;
878
879 dbg("TX: attempt to set tx carrier to %d kHz", carrier);
880 if (carrier == 0)
881 return -EINVAL;
882
883 period = 2000000 / carrier;
884 if (period && (period > ENE_CIRMOD_PRD_MAX ||
885 period < ENE_CIRMOD_PRD_MIN)) {
886
887 dbg("TX: out of range %d-%d kHz carrier",
888 2000 / ENE_CIRMOD_PRD_MIN, 2000 / ENE_CIRMOD_PRD_MAX);
889 return -EINVAL;
890 }
891
892 dev->tx_period = period;
893 ene_tx_set_carrier(dev);
894 return 0;
895 }
896
897 /*outside interface : set tx duty cycle */
898 static int ene_set_tx_duty_cycle(struct rc_dev *rdev, u32 duty_cycle)
899 {
900 struct ene_device *dev = rdev->priv;
901 dbg("TX: setting duty cycle to %d%%", duty_cycle);
902 dev->tx_duty_cycle = duty_cycle;
903 ene_tx_set_carrier(dev);
904 return 0;
905 }
906
907 /* outside interface: enable learning mode */
908 static int ene_set_learning_mode(struct rc_dev *rdev, int enable)
909 {
910 struct ene_device *dev = rdev->priv;
911 unsigned long flags;
912 if (enable == dev->learning_mode_enabled)
913 return 0;
914
915 spin_lock_irqsave(&dev->hw_lock, flags);
916 dev->learning_mode_enabled = enable;
917 ene_rx_disable(dev);
918 ene_rx_setup(dev);
919 ene_rx_enable(dev);
920 spin_unlock_irqrestore(&dev->hw_lock, flags);
921 return 0;
922 }
923
924 static int ene_set_carrier_report(struct rc_dev *rdev, int enable)
925 {
926 struct ene_device *dev = rdev->priv;
927 unsigned long flags;
928
929 if (enable == dev->carrier_detect_enabled)
930 return 0;
931
932 spin_lock_irqsave(&dev->hw_lock, flags);
933 dev->carrier_detect_enabled = enable;
934 ene_rx_disable(dev);
935 ene_rx_setup(dev);
936 ene_rx_enable(dev);
937 spin_unlock_irqrestore(&dev->hw_lock, flags);
938 return 0;
939 }
940
941 /* outside interface: enable or disable idle mode */
942 static void ene_set_idle(struct rc_dev *rdev, bool idle)
943 {
944 struct ene_device *dev = rdev->priv;
945
946 if (idle) {
947 ene_rx_reset(dev);
948 dbg("RX: end of data");
949 }
950 }
951
952 /* outside interface: transmit */
953 static int ene_transmit(struct rc_dev *rdev, unsigned *buf, unsigned n)
954 {
955 struct ene_device *dev = rdev->priv;
956 unsigned long flags;
957
958 dev->tx_buffer = buf;
959 dev->tx_len = n;
960 dev->tx_pos = 0;
961 dev->tx_reg = 0;
962 dev->tx_done = 0;
963 dev->tx_sample = 0;
964 dev->tx_sample_pulse = false;
965
966 dbg("TX: %d samples", dev->tx_len);
967
968 spin_lock_irqsave(&dev->hw_lock, flags);
969
970 ene_tx_enable(dev);
971
972 /* Transmit first two samples */
973 ene_tx_sample(dev);
974 ene_tx_sample(dev);
975
976 spin_unlock_irqrestore(&dev->hw_lock, flags);
977
978 if (wait_for_completion_timeout(&dev->tx_complete, 2 * HZ) == 0) {
979 dbg("TX: timeout");
980 spin_lock_irqsave(&dev->hw_lock, flags);
981 ene_tx_disable(dev);
982 spin_unlock_irqrestore(&dev->hw_lock, flags);
983 } else
984 dbg("TX: done");
985 return n;
986 }
987
988 /* probe entry */
989 static int ene_probe(struct pnp_dev *pnp_dev, const struct pnp_device_id *id)
990 {
991 int error = -ENOMEM;
992 struct rc_dev *rdev;
993 struct ene_device *dev;
994
995 /* allocate memory */
996 dev = kzalloc(sizeof(struct ene_device), GFP_KERNEL);
997 rdev = rc_allocate_device(RC_DRIVER_IR_RAW);
998 if (!dev || !rdev)
999 goto exit_free_dev_rdev;
1000
1001 /* validate resources */
1002 error = -ENODEV;
1003
1004 /* init these to -1, as 0 is valid for both */
1005 dev->hw_io = -1;
1006 dev->irq = -1;
1007
1008 if (!pnp_port_valid(pnp_dev, 0) ||
1009 pnp_port_len(pnp_dev, 0) < ENE_IO_SIZE)
1010 goto exit_free_dev_rdev;
1011
1012 if (!pnp_irq_valid(pnp_dev, 0))
1013 goto exit_free_dev_rdev;
1014
1015 spin_lock_init(&dev->hw_lock);
1016
1017 dev->hw_io = pnp_port_start(pnp_dev, 0);
1018 dev->irq = pnp_irq(pnp_dev, 0);
1019
1020
1021 pnp_set_drvdata(pnp_dev, dev);
1022 dev->pnp_dev = pnp_dev;
1023
1024 /* don't allow too short/long sample periods */
1025 if (sample_period < 5 || sample_period > 0x7F)
1026 sample_period = ENE_DEFAULT_SAMPLE_PERIOD;
1027
1028 /* detect hardware version and features */
1029 error = ene_hw_detect(dev);
1030 if (error)
1031 goto exit_free_dev_rdev;
1032
1033 if (!dev->hw_learning_and_tx_capable && txsim) {
1034 dev->hw_learning_and_tx_capable = true;
1035 timer_setup(&dev->tx_sim_timer, ene_tx_irqsim, 0);
1036 pr_warn("Simulation of TX activated\n");
1037 }
1038
1039 if (!dev->hw_learning_and_tx_capable)
1040 learning_mode_force = false;
1041
1042 rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
1043 rdev->priv = dev;
1044 rdev->open = ene_open;
1045 rdev->close = ene_close;
1046 rdev->s_idle = ene_set_idle;
1047 rdev->driver_name = ENE_DRIVER_NAME;
1048 rdev->map_name = RC_MAP_RC6_MCE;
1049 rdev->device_name = "ENE eHome Infrared Remote Receiver";
1050
1051 if (dev->hw_learning_and_tx_capable) {
1052 rdev->s_wideband_receiver = ene_set_learning_mode;
1053 init_completion(&dev->tx_complete);
1054 rdev->tx_ir = ene_transmit;
1055 rdev->s_tx_mask = ene_set_tx_mask;
1056 rdev->s_tx_carrier = ene_set_tx_carrier;
1057 rdev->s_tx_duty_cycle = ene_set_tx_duty_cycle;
1058 rdev->s_carrier_report = ene_set_carrier_report;
1059 rdev->device_name = "ENE eHome Infrared Remote Transceiver";
1060 }
1061
1062 dev->rdev = rdev;
1063
1064 ene_rx_setup_hw_buffer(dev);
1065 ene_setup_default_settings(dev);
1066 ene_setup_hw_settings(dev);
1067
1068 device_set_wakeup_capable(&pnp_dev->dev, true);
1069 device_set_wakeup_enable(&pnp_dev->dev, true);
1070
1071 error = rc_register_device(rdev);
1072 if (error < 0)
1073 goto exit_free_dev_rdev;
1074
1075 /* claim the resources */
1076 error = -EBUSY;
1077 if (!request_region(dev->hw_io, ENE_IO_SIZE, ENE_DRIVER_NAME)) {
1078 goto exit_unregister_device;
1079 }
1080
1081 if (request_irq(dev->irq, ene_isr,
1082 IRQF_SHARED, ENE_DRIVER_NAME, (void *)dev)) {
1083 goto exit_release_hw_io;
1084 }
1085
1086 pr_notice("driver has been successfully loaded\n");
1087 return 0;
1088
1089 exit_release_hw_io:
1090 release_region(dev->hw_io, ENE_IO_SIZE);
1091 exit_unregister_device:
1092 rc_unregister_device(rdev);
1093 rdev = NULL;
1094 exit_free_dev_rdev:
1095 rc_free_device(rdev);
1096 kfree(dev);
1097 return error;
1098 }
1099
1100 /* main unload function */
1101 static void ene_remove(struct pnp_dev *pnp_dev)
1102 {
1103 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1104 unsigned long flags;
1105
1106 rc_unregister_device(dev->rdev);
1107 del_timer_sync(&dev->tx_sim_timer);
1108 spin_lock_irqsave(&dev->hw_lock, flags);
1109 ene_rx_disable(dev);
1110 ene_rx_restore_hw_buffer(dev);
1111 spin_unlock_irqrestore(&dev->hw_lock, flags);
1112
1113 free_irq(dev->irq, dev);
1114 release_region(dev->hw_io, ENE_IO_SIZE);
1115 kfree(dev);
1116 }
1117
1118 /* enable wake on IR (wakes on specific button on original remote) */
1119 static void ene_enable_wake(struct ene_device *dev, bool enable)
1120 {
1121 dbg("wake on IR %s", enable ? "enabled" : "disabled");
1122 ene_set_clear_reg_mask(dev, ENE_FW1, ENE_FW1_WAKE, enable);
1123 }
1124
1125 #ifdef CONFIG_PM
1126 static int ene_suspend(struct pnp_dev *pnp_dev, pm_message_t state)
1127 {
1128 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1129 bool wake = device_may_wakeup(&dev->pnp_dev->dev);
1130
1131 if (!wake && dev->rx_enabled)
1132 ene_rx_disable_hw(dev);
1133
1134 ene_enable_wake(dev, wake);
1135 return 0;
1136 }
1137
1138 static int ene_resume(struct pnp_dev *pnp_dev)
1139 {
1140 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1141 ene_setup_hw_settings(dev);
1142
1143 if (dev->rx_enabled)
1144 ene_rx_enable(dev);
1145
1146 ene_enable_wake(dev, false);
1147 return 0;
1148 }
1149 #endif
1150
1151 static void ene_shutdown(struct pnp_dev *pnp_dev)
1152 {
1153 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1154 ene_enable_wake(dev, true);
1155 }
1156
1157 static const struct pnp_device_id ene_ids[] = {
1158 {.id = "ENE0100",},
1159 {.id = "ENE0200",},
1160 {.id = "ENE0201",},
1161 {.id = "ENE0202",},
1162 {},
1163 };
1164
1165 static struct pnp_driver ene_driver = {
1166 .name = ENE_DRIVER_NAME,
1167 .id_table = ene_ids,
1168 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1169
1170 .probe = ene_probe,
1171 .remove = ene_remove,
1172 #ifdef CONFIG_PM
1173 .suspend = ene_suspend,
1174 .resume = ene_resume,
1175 #endif
1176 .shutdown = ene_shutdown,
1177 };
1178
1179 module_param(sample_period, int, S_IRUGO);
1180 MODULE_PARM_DESC(sample_period, "Hardware sample period (50 us default)");
1181
1182 module_param(learning_mode_force, bool, S_IRUGO);
1183 MODULE_PARM_DESC(learning_mode_force, "Enable learning mode by default");
1184
1185 module_param(debug, int, S_IRUGO | S_IWUSR);
1186 MODULE_PARM_DESC(debug, "Debug level");
1187
1188 module_param(txsim, bool, S_IRUGO);
1189 MODULE_PARM_DESC(txsim,
1190 "Simulate TX features on unsupported hardware (dangerous)");
1191
1192 MODULE_DEVICE_TABLE(pnp, ene_ids);
1193 MODULE_DESCRIPTION
1194 ("Infrared input driver for KB3926B/C/D/E/F (aka ENE0100/ENE0200/ENE0201/ENE0202) CIR port");
1195
1196 MODULE_AUTHOR("Maxim Levitsky");
1197 MODULE_LICENSE("GPL");
1198
1199 module_pnp_driver(ene_driver);
Kernel DRM miscellaneous fixes and cross-tree changes