1 // SPDX-License-Identifier: GPL-2.0-only
3 * Motorola CPCAP PMIC core driver
5 * Copyright (C) 2016 Tony Lindgren <tony@atomide.com>
8 #include <linux/device.h>
10 #include <linux/interrupt.h>
11 #include <linux/irq.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/mod_devicetable.h>
15 #include <linux/regmap.h>
16 #include <linux/sysfs.h>
18 #include <linux/mfd/core.h>
19 #include <linux/mfd/motorola-cpcap.h>
20 #include <linux/spi/spi.h>
22 #define CPCAP_NR_IRQ_REG_BANKS 6
23 #define CPCAP_NR_IRQ_CHIPS 3
24 #define CPCAP_REGISTER_SIZE 4
25 #define CPCAP_REGISTER_BITS 16
28 struct spi_device
*spi
;
29 struct regmap_irq
*irqs
;
30 struct regmap_irq_chip_data
*irqdata
[CPCAP_NR_IRQ_CHIPS
];
31 const struct regmap_config
*regmap_conf
;
32 struct regmap
*regmap
;
35 static int cpcap_sense_irq(struct regmap
*regmap
, int irq
)
37 int regnum
= irq
/ CPCAP_REGISTER_BITS
;
38 int mask
= BIT(irq
% CPCAP_REGISTER_BITS
);
39 int reg
= CPCAP_REG_INTS1
+ (regnum
* CPCAP_REGISTER_SIZE
);
42 if (reg
< CPCAP_REG_INTS1
|| reg
> CPCAP_REG_INTS4
)
45 err
= regmap_read(regmap
, reg
, &val
);
49 return !!(val
& mask
);
52 int cpcap_sense_virq(struct regmap
*regmap
, int virq
)
54 struct regmap_irq_chip_data
*d
= irq_get_chip_data(virq
);
55 int irq_base
= regmap_irq_chip_get_base(d
);
57 return cpcap_sense_irq(regmap
, virq
- irq_base
);
59 EXPORT_SYMBOL_GPL(cpcap_sense_virq
);
61 static int cpcap_check_revision(struct cpcap_ddata
*cpcap
)
66 ret
= cpcap_get_vendor(&cpcap
->spi
->dev
, cpcap
->regmap
, &vendor
);
70 ret
= cpcap_get_revision(&cpcap
->spi
->dev
, cpcap
->regmap
, &rev
);
74 dev_info(&cpcap
->spi
->dev
, "CPCAP vendor: %s rev: %i.%i (%x)\n",
75 vendor
== CPCAP_VENDOR_ST
? "ST" : "TI",
76 CPCAP_REVISION_MAJOR(rev
), CPCAP_REVISION_MINOR(rev
),
79 if (rev
< CPCAP_REVISION_2_1
) {
80 dev_info(&cpcap
->spi
->dev
,
81 "Please add old CPCAP revision support as needed\n");
89 * First two irq chips are the two private macro interrupt chips, the third
90 * irq chip is for register banks 1 - 4 and is available for drivers to use.
92 static struct regmap_irq_chip cpcap_irq_chip
[CPCAP_NR_IRQ_CHIPS
] = {
96 .status_base
= CPCAP_REG_MI1
,
97 .ack_base
= CPCAP_REG_MI1
,
98 .mask_base
= CPCAP_REG_MIM1
,
105 .status_base
= CPCAP_REG_MI2
,
106 .ack_base
= CPCAP_REG_MI2
,
107 .mask_base
= CPCAP_REG_MIM2
,
114 .status_base
= CPCAP_REG_INT1
,
115 .ack_base
= CPCAP_REG_INT1
,
116 .mask_base
= CPCAP_REG_INTM1
,
122 static void cpcap_init_one_regmap_irq(struct cpcap_ddata
*cpcap
,
123 struct regmap_irq
*rirq
,
124 int irq_base
, int irq
)
126 unsigned int reg_offset
;
127 unsigned int bit
, mask
;
129 reg_offset
= irq
- irq_base
;
130 reg_offset
/= cpcap
->regmap_conf
->val_bits
;
131 reg_offset
*= cpcap
->regmap_conf
->reg_stride
;
133 bit
= irq
% cpcap
->regmap_conf
->val_bits
;
136 rirq
->reg_offset
= reg_offset
;
140 static int cpcap_init_irq_chip(struct cpcap_ddata
*cpcap
, int irq_chip
,
141 int irq_start
, int nr_irqs
)
143 struct regmap_irq_chip
*chip
= &cpcap_irq_chip
[irq_chip
];
146 for (i
= irq_start
; i
< irq_start
+ nr_irqs
; i
++) {
147 struct regmap_irq
*rirq
= &cpcap
->irqs
[i
];
149 cpcap_init_one_regmap_irq(cpcap
, rirq
, irq_start
, i
);
151 chip
->irqs
= &cpcap
->irqs
[irq_start
];
152 chip
->num_irqs
= nr_irqs
;
153 chip
->irq_drv_data
= cpcap
;
155 ret
= devm_regmap_add_irq_chip(&cpcap
->spi
->dev
, cpcap
->regmap
,
157 irq_get_trigger_type(cpcap
->spi
->irq
) |
159 chip
, &cpcap
->irqdata
[irq_chip
]);
161 dev_err(&cpcap
->spi
->dev
, "could not add irq chip %i: %i\n",
169 static int cpcap_init_irq(struct cpcap_ddata
*cpcap
)
173 cpcap
->irqs
= devm_kzalloc(&cpcap
->spi
->dev
,
174 array3_size(sizeof(*cpcap
->irqs
),
175 CPCAP_NR_IRQ_REG_BANKS
,
176 cpcap
->regmap_conf
->val_bits
),
181 ret
= cpcap_init_irq_chip(cpcap
, 0, 0, 16);
185 ret
= cpcap_init_irq_chip(cpcap
, 1, 16, 16);
189 ret
= cpcap_init_irq_chip(cpcap
, 2, 32, 64);
193 enable_irq_wake(cpcap
->spi
->irq
);
198 static const struct of_device_id cpcap_of_match
[] = {
199 { .compatible
= "motorola,cpcap", },
200 { .compatible
= "st,6556002", },
203 MODULE_DEVICE_TABLE(of
, cpcap_of_match
);
205 static const struct spi_device_id cpcap_spi_ids
[] = {
206 { .name
= "cpcap", },
207 { .name
= "6556002", },
210 MODULE_DEVICE_TABLE(spi
, cpcap_spi_ids
);
212 static const struct regmap_config cpcap_regmap_config
= {
217 .write_flag_mask
= 0x8000,
218 .max_register
= CPCAP_REG_ST_TEST2
,
219 .cache_type
= REGCACHE_NONE
,
220 .reg_format_endian
= REGMAP_ENDIAN_LITTLE
,
221 .val_format_endian
= REGMAP_ENDIAN_LITTLE
,
224 static int cpcap_suspend(struct device
*dev
)
226 struct spi_device
*spi
= to_spi_device(dev
);
228 disable_irq(spi
->irq
);
233 static int cpcap_resume(struct device
*dev
)
235 struct spi_device
*spi
= to_spi_device(dev
);
237 enable_irq(spi
->irq
);
242 static DEFINE_SIMPLE_DEV_PM_OPS(cpcap_pm
, cpcap_suspend
, cpcap_resume
);
244 static const struct mfd_cell cpcap_mfd_devices
[] = {
247 .of_compatible
= "motorola,mapphone-cpcap-adc",
249 .name
= "cpcap_battery",
250 .of_compatible
= "motorola,cpcap-battery",
252 .name
= "cpcap-charger",
253 .of_compatible
= "motorola,mapphone-cpcap-charger",
255 .name
= "cpcap-regulator",
256 .of_compatible
= "motorola,mapphone-cpcap-regulator",
259 .of_compatible
= "motorola,cpcap-rtc",
261 .name
= "cpcap-pwrbutton",
262 .of_compatible
= "motorola,cpcap-pwrbutton",
264 .name
= "cpcap-usb-phy",
265 .of_compatible
= "motorola,mapphone-cpcap-usb-phy",
269 .of_compatible
= "motorola,cpcap-led-red",
273 .of_compatible
= "motorola,cpcap-led-green",
277 .of_compatible
= "motorola,cpcap-led-blue",
281 .of_compatible
= "motorola,cpcap-led-adl",
285 .of_compatible
= "motorola,cpcap-led-cp",
287 .name
= "cpcap-codec",
291 static int cpcap_probe(struct spi_device
*spi
)
293 struct cpcap_ddata
*cpcap
;
296 cpcap
= devm_kzalloc(&spi
->dev
, sizeof(*cpcap
), GFP_KERNEL
);
301 spi_set_drvdata(spi
, cpcap
);
303 spi
->bits_per_word
= 16;
304 spi
->mode
= SPI_MODE_0
| SPI_CS_HIGH
;
306 ret
= spi_setup(spi
);
310 cpcap
->regmap_conf
= &cpcap_regmap_config
;
311 cpcap
->regmap
= devm_regmap_init_spi(spi
, &cpcap_regmap_config
);
312 if (IS_ERR(cpcap
->regmap
)) {
313 ret
= PTR_ERR(cpcap
->regmap
);
314 dev_err(&cpcap
->spi
->dev
, "Failed to initialize regmap: %d\n",
320 ret
= cpcap_check_revision(cpcap
);
322 dev_err(&cpcap
->spi
->dev
, "Failed to detect CPCAP: %i\n", ret
);
326 ret
= cpcap_init_irq(cpcap
);
330 /* Parent SPI controller uses DMA, CPCAP and child devices do not */
331 spi
->dev
.coherent_dma_mask
= 0;
332 spi
->dev
.dma_mask
= &spi
->dev
.coherent_dma_mask
;
334 return devm_mfd_add_devices(&spi
->dev
, 0, cpcap_mfd_devices
,
335 ARRAY_SIZE(cpcap_mfd_devices
), NULL
, 0, NULL
);
338 static struct spi_driver cpcap_driver
= {
340 .name
= "cpcap-core",
341 .of_match_table
= cpcap_of_match
,
342 .pm
= pm_sleep_ptr(&cpcap_pm
),
344 .probe
= cpcap_probe
,
345 .id_table
= cpcap_spi_ids
,
347 module_spi_driver(cpcap_driver
);
349 MODULE_ALIAS("platform:cpcap");
350 MODULE_DESCRIPTION("CPCAP driver");
351 MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
352 MODULE_LICENSE("GPL v2");