1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * A driver for the Integrated Circuits ICS932S401
4 * Copyright (C) 2008 IBM
6 * Author: Darrick J. Wong <darrick.wong@oracle.com>
9 #include <linux/module.h>
10 #include <linux/jiffies.h>
11 #include <linux/i2c.h>
12 #include <linux/err.h>
13 #include <linux/mutex.h>
14 #include <linux/delay.h>
15 #include <linux/log2.h>
16 #include <linux/slab.h>
18 /* Addresses to scan */
19 static const unsigned short normal_i2c
[] = { 0x69, I2C_CLIENT_END
};
21 /* ICS932S401 registers */
22 #define ICS932S401_REG_CFG2 0x01
23 #define ICS932S401_CFG1_SPREAD 0x01
24 #define ICS932S401_REG_CFG7 0x06
25 #define ICS932S401_FS_MASK 0x07
26 #define ICS932S401_REG_VENDOR_REV 0x07
27 #define ICS932S401_VENDOR 1
28 #define ICS932S401_VENDOR_MASK 0x0F
29 #define ICS932S401_REV 4
30 #define ICS932S401_REV_SHIFT 4
31 #define ICS932S401_REG_DEVICE 0x09
32 #define ICS932S401_DEVICE 11
33 #define ICS932S401_REG_CTRL 0x0A
34 #define ICS932S401_MN_ENABLED 0x80
35 #define ICS932S401_CPU_ALT 0x04
36 #define ICS932S401_SRC_ALT 0x08
37 #define ICS932S401_REG_CPU_M_CTRL 0x0B
38 #define ICS932S401_M_MASK 0x3F
39 #define ICS932S401_REG_CPU_N_CTRL 0x0C
40 #define ICS932S401_REG_CPU_SPREAD1 0x0D
41 #define ICS932S401_REG_CPU_SPREAD2 0x0E
42 #define ICS932S401_SPREAD_MASK 0x7FFF
43 #define ICS932S401_REG_SRC_M_CTRL 0x0F
44 #define ICS932S401_REG_SRC_N_CTRL 0x10
45 #define ICS932S401_REG_SRC_SPREAD1 0x11
46 #define ICS932S401_REG_SRC_SPREAD2 0x12
47 #define ICS932S401_REG_CPU_DIVISOR 0x13
48 #define ICS932S401_CPU_DIVISOR_SHIFT 4
49 #define ICS932S401_REG_PCISRC_DIVISOR 0x14
50 #define ICS932S401_SRC_DIVISOR_MASK 0x0F
51 #define ICS932S401_PCI_DIVISOR_SHIFT 4
53 /* Base clock is 14.318MHz */
54 #define BASE_CLOCK 14318
57 #define NUM_MIRRORED_REGS 15
59 static int regs_to_copy
[NUM_MIRRORED_REGS
] = {
62 ICS932S401_REG_VENDOR_REV
,
63 ICS932S401_REG_DEVICE
,
65 ICS932S401_REG_CPU_M_CTRL
,
66 ICS932S401_REG_CPU_N_CTRL
,
67 ICS932S401_REG_CPU_SPREAD1
,
68 ICS932S401_REG_CPU_SPREAD2
,
69 ICS932S401_REG_SRC_M_CTRL
,
70 ICS932S401_REG_SRC_N_CTRL
,
71 ICS932S401_REG_SRC_SPREAD1
,
72 ICS932S401_REG_SRC_SPREAD2
,
73 ICS932S401_REG_CPU_DIVISOR
,
74 ICS932S401_REG_PCISRC_DIVISOR
,
77 /* How often do we reread sensors values? (In jiffies) */
78 #define SENSOR_REFRESH_INTERVAL (2 * HZ)
80 /* How often do we reread sensor limit values? (In jiffies) */
81 #define LIMIT_REFRESH_INTERVAL (60 * HZ)
83 struct ics932s401_data
{
84 struct attribute_group attrs
;
87 unsigned long sensors_last_updated
; /* In jiffies */
92 static int ics932s401_probe(struct i2c_client
*client
);
93 static int ics932s401_detect(struct i2c_client
*client
,
94 struct i2c_board_info
*info
);
95 static void ics932s401_remove(struct i2c_client
*client
);
97 static const struct i2c_device_id ics932s401_id
[] = {
101 MODULE_DEVICE_TABLE(i2c
, ics932s401_id
);
103 static struct i2c_driver ics932s401_driver
= {
104 .class = I2C_CLASS_HWMON
,
106 .name
= "ics932s401",
108 .probe
= ics932s401_probe
,
109 .remove
= ics932s401_remove
,
110 .id_table
= ics932s401_id
,
111 .detect
= ics932s401_detect
,
112 .address_list
= normal_i2c
,
115 static struct ics932s401_data
*ics932s401_update_device(struct device
*dev
)
117 struct i2c_client
*client
= to_i2c_client(dev
);
118 struct ics932s401_data
*data
= i2c_get_clientdata(client
);
119 unsigned long local_jiffies
= jiffies
;
122 mutex_lock(&data
->lock
);
123 if (time_before(local_jiffies
, data
->sensors_last_updated
+
124 SENSOR_REFRESH_INTERVAL
)
125 && data
->sensors_valid
)
129 * Each register must be read as a word and then right shifted 8 bits.
130 * Not really sure why this is; setting the "byte count programming"
131 * register to 1 does not fix this problem.
133 for (i
= 0; i
< NUM_MIRRORED_REGS
; i
++) {
134 temp
= i2c_smbus_read_word_data(client
, regs_to_copy
[i
]);
137 data
->regs
[regs_to_copy
[i
]] = temp
>> 8;
140 data
->sensors_last_updated
= local_jiffies
;
141 data
->sensors_valid
= 1;
144 mutex_unlock(&data
->lock
);
148 static ssize_t
show_spread_enabled(struct device
*dev
,
149 struct device_attribute
*devattr
,
152 struct ics932s401_data
*data
= ics932s401_update_device(dev
);
154 if (data
->regs
[ICS932S401_REG_CFG2
] & ICS932S401_CFG1_SPREAD
)
155 return sprintf(buf
, "1\n");
157 return sprintf(buf
, "0\n");
160 /* bit to cpu khz map */
161 static const int fs_speeds
[] = {
172 /* clock divisor map */
173 static const int divisors
[] = {2, 3, 5, 15, 4, 6, 10, 30, 8, 12, 20, 60, 16,
176 /* Calculate CPU frequency from the M/N registers. */
177 static int calculate_cpu_freq(struct ics932s401_data
*data
)
181 m
= data
->regs
[ICS932S401_REG_CPU_M_CTRL
] & ICS932S401_M_MASK
;
182 n
= data
->regs
[ICS932S401_REG_CPU_N_CTRL
];
184 /* Pull in bits 8 & 9 from the M register */
185 n
|= ((int)data
->regs
[ICS932S401_REG_CPU_M_CTRL
] & 0x80) << 1;
186 n
|= ((int)data
->regs
[ICS932S401_REG_CPU_M_CTRL
] & 0x40) << 3;
188 freq
= BASE_CLOCK
* (n
+ 8) / (m
+ 2);
189 freq
/= divisors
[data
->regs
[ICS932S401_REG_CPU_DIVISOR
] >>
190 ICS932S401_CPU_DIVISOR_SHIFT
];
195 static ssize_t
show_cpu_clock(struct device
*dev
,
196 struct device_attribute
*devattr
,
199 struct ics932s401_data
*data
= ics932s401_update_device(dev
);
201 return sprintf(buf
, "%d\n", calculate_cpu_freq(data
));
204 static ssize_t
show_cpu_clock_sel(struct device
*dev
,
205 struct device_attribute
*devattr
,
208 struct ics932s401_data
*data
= ics932s401_update_device(dev
);
211 if (data
->regs
[ICS932S401_REG_CTRL
] & ICS932S401_MN_ENABLED
)
212 freq
= calculate_cpu_freq(data
);
214 /* Freq is neatly wrapped up for us */
215 int fid
= data
->regs
[ICS932S401_REG_CFG7
] & ICS932S401_FS_MASK
;
217 freq
= fs_speeds
[fid
];
218 if (data
->regs
[ICS932S401_REG_CTRL
] & ICS932S401_CPU_ALT
) {
230 return sprintf(buf
, "%d\n", freq
);
233 /* Calculate SRC frequency from the M/N registers. */
234 static int calculate_src_freq(struct ics932s401_data
*data
)
238 m
= data
->regs
[ICS932S401_REG_SRC_M_CTRL
] & ICS932S401_M_MASK
;
239 n
= data
->regs
[ICS932S401_REG_SRC_N_CTRL
];
241 /* Pull in bits 8 & 9 from the M register */
242 n
|= ((int)data
->regs
[ICS932S401_REG_SRC_M_CTRL
] & 0x80) << 1;
243 n
|= ((int)data
->regs
[ICS932S401_REG_SRC_M_CTRL
] & 0x40) << 3;
245 freq
= BASE_CLOCK
* (n
+ 8) / (m
+ 2);
246 freq
/= divisors
[data
->regs
[ICS932S401_REG_PCISRC_DIVISOR
] &
247 ICS932S401_SRC_DIVISOR_MASK
];
252 static ssize_t
show_src_clock(struct device
*dev
,
253 struct device_attribute
*devattr
,
256 struct ics932s401_data
*data
= ics932s401_update_device(dev
);
258 return sprintf(buf
, "%d\n", calculate_src_freq(data
));
261 static ssize_t
show_src_clock_sel(struct device
*dev
,
262 struct device_attribute
*devattr
,
265 struct ics932s401_data
*data
= ics932s401_update_device(dev
);
268 if (data
->regs
[ICS932S401_REG_CTRL
] & ICS932S401_MN_ENABLED
)
269 freq
= calculate_src_freq(data
);
271 /* Freq is neatly wrapped up for us */
272 if (data
->regs
[ICS932S401_REG_CTRL
] & ICS932S401_CPU_ALT
&&
273 data
->regs
[ICS932S401_REG_CTRL
] & ICS932S401_SRC_ALT
)
278 return sprintf(buf
, "%d\n", freq
);
281 /* Calculate PCI frequency from the SRC M/N registers. */
282 static int calculate_pci_freq(struct ics932s401_data
*data
)
286 m
= data
->regs
[ICS932S401_REG_SRC_M_CTRL
] & ICS932S401_M_MASK
;
287 n
= data
->regs
[ICS932S401_REG_SRC_N_CTRL
];
289 /* Pull in bits 8 & 9 from the M register */
290 n
|= ((int)data
->regs
[ICS932S401_REG_SRC_M_CTRL
] & 0x80) << 1;
291 n
|= ((int)data
->regs
[ICS932S401_REG_SRC_M_CTRL
] & 0x40) << 3;
293 freq
= BASE_CLOCK
* (n
+ 8) / (m
+ 2);
294 freq
/= divisors
[data
->regs
[ICS932S401_REG_PCISRC_DIVISOR
] >>
295 ICS932S401_PCI_DIVISOR_SHIFT
];
300 static ssize_t
show_pci_clock(struct device
*dev
,
301 struct device_attribute
*devattr
,
304 struct ics932s401_data
*data
= ics932s401_update_device(dev
);
306 return sprintf(buf
, "%d\n", calculate_pci_freq(data
));
309 static ssize_t
show_pci_clock_sel(struct device
*dev
,
310 struct device_attribute
*devattr
,
313 struct ics932s401_data
*data
= ics932s401_update_device(dev
);
316 if (data
->regs
[ICS932S401_REG_CTRL
] & ICS932S401_MN_ENABLED
)
317 freq
= calculate_pci_freq(data
);
321 return sprintf(buf
, "%d\n", freq
);
324 static ssize_t
show_value(struct device
*dev
,
325 struct device_attribute
*devattr
,
328 static ssize_t
show_spread(struct device
*dev
,
329 struct device_attribute
*devattr
,
332 static DEVICE_ATTR(spread_enabled
, S_IRUGO
, show_spread_enabled
, NULL
);
333 static DEVICE_ATTR(cpu_clock_selection
, S_IRUGO
, show_cpu_clock_sel
, NULL
);
334 static DEVICE_ATTR(cpu_clock
, S_IRUGO
, show_cpu_clock
, NULL
);
335 static DEVICE_ATTR(src_clock_selection
, S_IRUGO
, show_src_clock_sel
, NULL
);
336 static DEVICE_ATTR(src_clock
, S_IRUGO
, show_src_clock
, NULL
);
337 static DEVICE_ATTR(pci_clock_selection
, S_IRUGO
, show_pci_clock_sel
, NULL
);
338 static DEVICE_ATTR(pci_clock
, S_IRUGO
, show_pci_clock
, NULL
);
339 static DEVICE_ATTR(usb_clock
, S_IRUGO
, show_value
, NULL
);
340 static DEVICE_ATTR(ref_clock
, S_IRUGO
, show_value
, NULL
);
341 static DEVICE_ATTR(cpu_spread
, S_IRUGO
, show_spread
, NULL
);
342 static DEVICE_ATTR(src_spread
, S_IRUGO
, show_spread
, NULL
);
344 static struct attribute
*ics932s401_attr
[] = {
345 &dev_attr_spread_enabled
.attr
,
346 &dev_attr_cpu_clock_selection
.attr
,
347 &dev_attr_cpu_clock
.attr
,
348 &dev_attr_src_clock_selection
.attr
,
349 &dev_attr_src_clock
.attr
,
350 &dev_attr_pci_clock_selection
.attr
,
351 &dev_attr_pci_clock
.attr
,
352 &dev_attr_usb_clock
.attr
,
353 &dev_attr_ref_clock
.attr
,
354 &dev_attr_cpu_spread
.attr
,
355 &dev_attr_src_spread
.attr
,
359 static ssize_t
show_value(struct device
*dev
,
360 struct device_attribute
*devattr
,
365 if (devattr
== &dev_attr_usb_clock
)
367 else if (devattr
== &dev_attr_ref_clock
)
372 return sprintf(buf
, "%d\n", x
);
375 static ssize_t
show_spread(struct device
*dev
,
376 struct device_attribute
*devattr
,
379 struct ics932s401_data
*data
= ics932s401_update_device(dev
);
383 if (!(data
->regs
[ICS932S401_REG_CFG2
] & ICS932S401_CFG1_SPREAD
))
384 return sprintf(buf
, "0%%\n");
386 if (devattr
== &dev_attr_src_spread
)
387 reg
= ICS932S401_REG_SRC_SPREAD1
;
388 else if (devattr
== &dev_attr_cpu_spread
)
389 reg
= ICS932S401_REG_CPU_SPREAD1
;
393 val
= data
->regs
[reg
] | (data
->regs
[reg
+ 1] << 8);
394 val
&= ICS932S401_SPREAD_MASK
;
396 /* Scale 0..2^14 to -0.5. */
397 val
= 500000 * val
/ 16384;
398 return sprintf(buf
, "-0.%lu%%\n", val
);
401 /* Return 0 if detection is successful, -ENODEV otherwise */
402 static int ics932s401_detect(struct i2c_client
*client
,
403 struct i2c_board_info
*info
)
405 struct i2c_adapter
*adapter
= client
->adapter
;
406 int vendor
, device
, revision
;
408 if (!i2c_check_functionality(adapter
, I2C_FUNC_SMBUS_BYTE_DATA
))
411 vendor
= i2c_smbus_read_word_data(client
, ICS932S401_REG_VENDOR_REV
);
413 revision
= vendor
>> ICS932S401_REV_SHIFT
;
414 vendor
&= ICS932S401_VENDOR_MASK
;
415 if (vendor
!= ICS932S401_VENDOR
)
418 device
= i2c_smbus_read_word_data(client
, ICS932S401_REG_DEVICE
);
420 if (device
!= ICS932S401_DEVICE
)
423 if (revision
!= ICS932S401_REV
)
424 dev_info(&adapter
->dev
, "Unknown revision %d\n", revision
);
426 strscpy(info
->type
, "ics932s401", I2C_NAME_SIZE
);
431 static int ics932s401_probe(struct i2c_client
*client
)
433 struct ics932s401_data
*data
;
436 data
= kzalloc(sizeof(struct ics932s401_data
), GFP_KERNEL
);
442 i2c_set_clientdata(client
, data
);
443 mutex_init(&data
->lock
);
445 dev_info(&client
->dev
, "%s chip found\n", client
->name
);
447 /* Register sysfs hooks */
448 data
->attrs
.attrs
= ics932s401_attr
;
449 err
= sysfs_create_group(&client
->dev
.kobj
, &data
->attrs
);
461 static void ics932s401_remove(struct i2c_client
*client
)
463 struct ics932s401_data
*data
= i2c_get_clientdata(client
);
465 sysfs_remove_group(&client
->dev
.kobj
, &data
->attrs
);
469 module_i2c_driver(ics932s401_driver
);
471 MODULE_AUTHOR("Darrick J. Wong <darrick.wong@oracle.com>");
472 MODULE_DESCRIPTION("ICS932S401 driver");
473 MODULE_LICENSE("GPL");
475 /* IBM IntelliStation Z30 */
476 MODULE_ALIAS("dmi:bvnIBM:*:rn9228:*");
477 MODULE_ALIAS("dmi:bvnIBM:*:rn9232:*");
479 /* IBM x3650/x3550 */
480 MODULE_ALIAS("dmi:bvnIBM:*:pnIBMSystemx3650*");
481 MODULE_ALIAS("dmi:bvnIBM:*:pnIBMSystemx3550*");