1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * drivers/net/ethernet/ibm/emac/rgmii.c
5 * Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
7 * Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
8 * <benh@kernel.crashing.org>
10 * Based on the arch/ppc version of the driver:
12 * Copyright (c) 2004, 2005 Zultys Technologies.
13 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
15 * Based on original work by
16 * Matt Porter <mporter@kernel.crashing.org>
17 * Copyright 2004 MontaVista Software, Inc.
19 #include <linux/slab.h>
20 #include <linux/kernel.h>
21 #include <linux/ethtool.h>
23 #include <linux/of_address.h>
24 #include <linux/platform_device.h>
30 // XXX FIXME: Axon seems to support a subset of the RGMII, we
31 // thus need to take that into account and possibly change some
32 // of the bit settings below that don't seem to quite match the
36 #define RGMII_FER_MASK(idx) (0x7 << ((idx) * 4))
37 #define RGMII_FER_RTBI(idx) (0x4 << ((idx) * 4))
38 #define RGMII_FER_RGMII(idx) (0x5 << ((idx) * 4))
39 #define RGMII_FER_TBI(idx) (0x6 << ((idx) * 4))
40 #define RGMII_FER_GMII(idx) (0x7 << ((idx) * 4))
41 #define RGMII_FER_MII(idx) RGMII_FER_GMII(idx)
44 #define RGMII_SSR_MASK(idx) (0x7 << ((idx) * 8))
45 #define RGMII_SSR_10(idx) (0x1 << ((idx) * 8))
46 #define RGMII_SSR_100(idx) (0x2 << ((idx) * 8))
47 #define RGMII_SSR_1000(idx) (0x4 << ((idx) * 8))
49 /* RGMII bridge supports only GMII/TBI and RGMII/RTBI PHYs */
50 static inline int rgmii_valid_mode(int phy_mode
)
52 return phy_interface_mode_is_rgmii(phy_mode
) ||
53 phy_mode
== PHY_INTERFACE_MODE_GMII
||
54 phy_mode
== PHY_INTERFACE_MODE_MII
||
55 phy_mode
== PHY_INTERFACE_MODE_TBI
||
56 phy_mode
== PHY_INTERFACE_MODE_RTBI
;
59 static inline u32
rgmii_mode_mask(int mode
, int input
)
62 case PHY_INTERFACE_MODE_RGMII
:
63 case PHY_INTERFACE_MODE_RGMII_ID
:
64 case PHY_INTERFACE_MODE_RGMII_RXID
:
65 case PHY_INTERFACE_MODE_RGMII_TXID
:
66 return RGMII_FER_RGMII(input
);
67 case PHY_INTERFACE_MODE_TBI
:
68 return RGMII_FER_TBI(input
);
69 case PHY_INTERFACE_MODE_GMII
:
70 return RGMII_FER_GMII(input
);
71 case PHY_INTERFACE_MODE_MII
:
72 return RGMII_FER_MII(input
);
73 case PHY_INTERFACE_MODE_RTBI
:
74 return RGMII_FER_RTBI(input
);
80 int rgmii_attach(struct platform_device
*ofdev
, int input
, int mode
)
82 struct rgmii_instance
*dev
= platform_get_drvdata(ofdev
);
83 struct rgmii_regs __iomem
*p
= dev
->base
;
85 RGMII_DBG(dev
, "attach(%d)" NL
, input
);
87 /* Check if we need to attach to a RGMII */
88 if (input
< 0 || !rgmii_valid_mode(mode
)) {
89 printk(KERN_ERR
"%pOF: unsupported settings !\n",
94 mutex_lock(&dev
->lock
);
96 /* Enable this input */
97 out_be32(&p
->fer
, in_be32(&p
->fer
) | rgmii_mode_mask(mode
, input
));
99 printk(KERN_NOTICE
"%pOF: input %d in %s mode\n",
100 ofdev
->dev
.of_node
, input
, phy_modes(mode
));
104 mutex_unlock(&dev
->lock
);
109 void rgmii_set_speed(struct platform_device
*ofdev
, int input
, int speed
)
111 struct rgmii_instance
*dev
= platform_get_drvdata(ofdev
);
112 struct rgmii_regs __iomem
*p
= dev
->base
;
115 mutex_lock(&dev
->lock
);
117 ssr
= in_be32(&p
->ssr
) & ~RGMII_SSR_MASK(input
);
119 RGMII_DBG(dev
, "speed(%d, %d)" NL
, input
, speed
);
121 if (speed
== SPEED_1000
)
122 ssr
|= RGMII_SSR_1000(input
);
123 else if (speed
== SPEED_100
)
124 ssr
|= RGMII_SSR_100(input
);
125 else if (speed
== SPEED_10
)
126 ssr
|= RGMII_SSR_10(input
);
128 out_be32(&p
->ssr
, ssr
);
130 mutex_unlock(&dev
->lock
);
133 void rgmii_get_mdio(struct platform_device
*ofdev
, int input
)
135 struct rgmii_instance
*dev
= platform_get_drvdata(ofdev
);
136 struct rgmii_regs __iomem
*p
= dev
->base
;
139 RGMII_DBG2(dev
, "get_mdio(%d)" NL
, input
);
141 if (!(dev
->flags
& EMAC_RGMII_FLAG_HAS_MDIO
))
144 mutex_lock(&dev
->lock
);
146 fer
= in_be32(&p
->fer
);
147 fer
|= 0x00080000u
>> input
;
148 out_be32(&p
->fer
, fer
);
149 (void)in_be32(&p
->fer
);
151 DBG2(dev
, " fer = 0x%08x\n", fer
);
154 void rgmii_put_mdio(struct platform_device
*ofdev
, int input
)
156 struct rgmii_instance
*dev
= platform_get_drvdata(ofdev
);
157 struct rgmii_regs __iomem
*p
= dev
->base
;
160 RGMII_DBG2(dev
, "put_mdio(%d)" NL
, input
);
162 if (!(dev
->flags
& EMAC_RGMII_FLAG_HAS_MDIO
))
165 fer
= in_be32(&p
->fer
);
166 fer
&= ~(0x00080000u
>> input
);
167 out_be32(&p
->fer
, fer
);
168 (void)in_be32(&p
->fer
);
170 DBG2(dev
, " fer = 0x%08x\n", fer
);
172 mutex_unlock(&dev
->lock
);
175 void rgmii_detach(struct platform_device
*ofdev
, int input
)
177 struct rgmii_instance
*dev
= platform_get_drvdata(ofdev
);
178 struct rgmii_regs __iomem
*p
;
180 BUG_ON(!dev
|| dev
->users
== 0);
183 mutex_lock(&dev
->lock
);
185 RGMII_DBG(dev
, "detach(%d)" NL
, input
);
187 /* Disable this input */
188 out_be32(&p
->fer
, in_be32(&p
->fer
) & ~RGMII_FER_MASK(input
));
192 mutex_unlock(&dev
->lock
);
195 int rgmii_get_regs_len(struct platform_device
*ofdev
)
197 return sizeof(struct emac_ethtool_regs_subhdr
) +
198 sizeof(struct rgmii_regs
);
201 void *rgmii_dump_regs(struct platform_device
*ofdev
, void *buf
)
203 struct rgmii_instance
*dev
= platform_get_drvdata(ofdev
);
204 struct emac_ethtool_regs_subhdr
*hdr
= buf
;
205 struct rgmii_regs
*regs
= (struct rgmii_regs
*)(hdr
+ 1);
208 hdr
->index
= 0; /* for now, are there chips with more than one
209 * rgmii ? if yes, then we'll add a cell_index
210 * like we do for emac
212 memcpy_fromio(regs
, dev
->base
, sizeof(struct rgmii_regs
));
217 static int rgmii_probe(struct platform_device
*ofdev
)
219 struct rgmii_instance
*dev
;
222 dev
= devm_kzalloc(&ofdev
->dev
, sizeof(struct rgmii_instance
),
227 err
= devm_mutex_init(&ofdev
->dev
, &dev
->lock
);
233 dev
->base
= devm_platform_ioremap_resource(ofdev
, 0);
234 if (IS_ERR(dev
->base
)) {
235 dev_err(&ofdev
->dev
, "can't map device registers");
236 return PTR_ERR(dev
->base
);
239 /* Check for RGMII flags */
240 if (of_property_read_bool(ofdev
->dev
.of_node
, "has-mdio"))
241 dev
->flags
|= EMAC_RGMII_FLAG_HAS_MDIO
;
243 /* CAB lacks the right properties, fix this up */
244 if (of_device_is_compatible(ofdev
->dev
.of_node
, "ibm,rgmii-axon"))
245 dev
->flags
|= EMAC_RGMII_FLAG_HAS_MDIO
;
247 DBG2(dev
, " Boot FER = 0x%08x, SSR = 0x%08x\n",
248 in_be32(&dev
->base
->fer
), in_be32(&dev
->base
->ssr
));
250 /* Disable all inputs by default */
251 out_be32(&dev
->base
->fer
, 0);
254 "RGMII %pOF initialized with%s MDIO support\n",
256 (dev
->flags
& EMAC_RGMII_FLAG_HAS_MDIO
) ? "" : "out");
259 platform_set_drvdata(ofdev
, dev
);
264 static const struct of_device_id rgmii_match
[] =
267 .compatible
= "ibm,rgmii",
270 .type
= "emac-rgmii",
275 static struct platform_driver rgmii_driver
= {
277 .name
= "emac-rgmii",
278 .of_match_table
= rgmii_match
,
280 .probe
= rgmii_probe
,
283 int __init
rgmii_init(void)
285 return platform_driver_register(&rgmii_driver
);
288 void rgmii_exit(void)
290 platform_driver_unregister(&rgmii_driver
);