1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
8 #include <linux/delay.h>
9 #include <linux/interrupt.h>
10 #include <linux/if_ether.h>
11 #include <linux/netdevice.h>
19 struct ixgbe_mac_operations
{
20 s32 (*init_hw
)(struct ixgbe_hw
*);
21 s32 (*reset_hw
)(struct ixgbe_hw
*);
22 s32 (*start_hw
)(struct ixgbe_hw
*);
23 s32 (*clear_hw_cntrs
)(struct ixgbe_hw
*);
24 enum ixgbe_media_type (*get_media_type
)(struct ixgbe_hw
*);
25 s32 (*get_mac_addr
)(struct ixgbe_hw
*, u8
*);
26 s32 (*stop_adapter
)(struct ixgbe_hw
*);
27 s32 (*get_bus_info
)(struct ixgbe_hw
*);
28 s32 (*negotiate_api_version
)(struct ixgbe_hw
*hw
, int api
);
31 s32 (*setup_link
)(struct ixgbe_hw
*, ixgbe_link_speed
, bool, bool);
32 s32 (*check_link
)(struct ixgbe_hw
*, ixgbe_link_speed
*, bool *, bool);
33 s32 (*get_link_capabilities
)(struct ixgbe_hw
*, ixgbe_link_speed
*,
36 /* RAR, Multicast, VLAN */
37 s32 (*set_rar
)(struct ixgbe_hw
*, u32
, u8
*, u32
);
38 s32 (*set_uc_addr
)(struct ixgbe_hw
*, u32
, u8
*);
39 s32 (*init_rx_addrs
)(struct ixgbe_hw
*);
40 s32 (*update_mc_addr_list
)(struct ixgbe_hw
*, struct net_device
*);
41 s32 (*update_xcast_mode
)(struct ixgbe_hw
*, int);
42 s32 (*get_link_state
)(struct ixgbe_hw
*hw
, bool *link_state
);
43 s32 (*enable_mc
)(struct ixgbe_hw
*);
44 s32 (*disable_mc
)(struct ixgbe_hw
*);
45 s32 (*clear_vfta
)(struct ixgbe_hw
*);
46 s32 (*set_vfta
)(struct ixgbe_hw
*, u32
, u32
, bool);
47 s32 (*set_rlpml
)(struct ixgbe_hw
*, u16
);
51 ixgbe_mac_unknown
= 0,
55 ixgbe_mac_X550EM_x_vf
,
56 ixgbe_mac_x550em_a_vf
,
60 struct ixgbe_mac_info
{
61 struct ixgbe_mac_operations ops
;
65 enum ixgbe_mac_type type
;
75 struct ixgbe_mbx_operations
{
76 s32 (*init_params
)(struct ixgbe_hw
*hw
);
77 void (*release
)(struct ixgbe_hw
*hw
);
78 s32 (*read
)(struct ixgbe_hw
*, u32
*, u16
);
79 s32 (*write
)(struct ixgbe_hw
*, u32
*, u16
);
80 s32 (*check_for_msg
)(struct ixgbe_hw
*);
81 s32 (*check_for_ack
)(struct ixgbe_hw
*);
82 s32 (*check_for_rst
)(struct ixgbe_hw
*);
85 struct ixgbe_mbx_stats
{
94 struct ixgbe_mbx_info
{
95 struct ixgbe_mbx_operations ops
;
96 struct ixgbe_mbx_stats stats
;
108 struct ixgbe_mac_info mac
;
109 struct ixgbe_mbx_info mbx
;
112 u16 subsystem_vendor_id
;
113 u16 subsystem_device_id
;
117 bool adapter_stopped
;
122 struct ixgbevf_hw_stats
{
141 u64 saved_reset_vfgprc
;
142 u64 saved_reset_vfgptc
;
143 u64 saved_reset_vfgorc
;
144 u64 saved_reset_vfgotc
;
145 u64 saved_reset_vfmprc
;
148 struct ixgbevf_info
{
149 enum ixgbe_mac_type mac
;
150 const struct ixgbe_mac_operations
*mac_ops
;
153 #define IXGBE_FAILED_READ_REG 0xffffffffU
155 #define IXGBE_REMOVED(a) unlikely(!(a))
157 static inline void ixgbe_write_reg(struct ixgbe_hw
*hw
, u32 reg
, u32 value
)
159 u8 __iomem
*reg_addr
= READ_ONCE(hw
->hw_addr
);
161 if (IXGBE_REMOVED(reg_addr
))
163 writel(value
, reg_addr
+ reg
);
166 #define IXGBE_WRITE_REG(h, r, v) ixgbe_write_reg(h, r, v)
168 u32
ixgbevf_read_reg(struct ixgbe_hw
*hw
, u32 reg
);
169 #define IXGBE_READ_REG(h, r) ixgbevf_read_reg(h, r)
171 static inline void ixgbe_write_reg_array(struct ixgbe_hw
*hw
, u32 reg
,
172 u32 offset
, u32 value
)
174 ixgbe_write_reg(hw
, reg
+ (offset
<< 2), value
);
177 #define IXGBE_WRITE_REG_ARRAY(h, r, o, v) ixgbe_write_reg_array(h, r, o, v)
179 static inline u32
ixgbe_read_reg_array(struct ixgbe_hw
*hw
, u32 reg
,
182 return ixgbevf_read_reg(hw
, reg
+ (offset
<< 2));
185 #define IXGBE_READ_REG_ARRAY(h, r, o) ixgbe_read_reg_array(h, r, o)
187 int ixgbevf_get_queues(struct ixgbe_hw
*hw
, unsigned int *num_tcs
,
188 unsigned int *default_tc
);
189 int ixgbevf_get_reta_locked(struct ixgbe_hw
*hw
, u32
*reta
, int num_rx_queues
);
190 int ixgbevf_get_rss_key_locked(struct ixgbe_hw
*hw
, u8
*rss_key
);
191 #endif /* __IXGBE_VF_H__ */