drivers/net/wireless/intel/ipw2x00/ipw2100.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /******************************************************************************
   3
   4   Copyright(c) 2003 - 2006 Intel Corporation. All rights reserved.
   5
   6
   7   Contact Information:
   8   Intel Linux Wireless <ilw@linux.intel.com>
   9   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  10
  11 ******************************************************************************/
  12 #ifndef _IPW2100_H
  13 #define _IPW2100_H
  14
  15 #include <linux/sched.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/netdevice.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/list.h>
  20 #include <linux/delay.h>
  21 #include <linux/skbuff.h>
  22 #include <asm/io.h>
  23 #include <linux/socket.h>
  24 #include <linux/if_arp.h>
  25 #include <linux/wireless.h>
  26 #include <net/iw_handler.h>     // new driver API
  27
  28 #ifdef CONFIG_IPW2100_MONITOR
  29 #include <net/ieee80211_radiotap.h>
  30 #endif
  31
  32 #include <linux/workqueue.h>
  33 #include <linux/mutex.h>
  34
  35 #include "libipw.h"
  36
  37 struct ipw2100_priv;
  38 struct ipw2100_tx_packet;
  39 struct ipw2100_rx_packet;
  40
  41 #define IPW_DL_UNINIT    0x80000000
  42 #define IPW_DL_NONE      0x00000000
  43 #define IPW_DL_ALL       0x7FFFFFFF
  44
  45 /*
  46  * To use the debug system;
  47  *
  48  * If you are defining a new debug classification, simply add it to the #define
  49  * list here in the form of:
  50  *
  51  * #define IPW_DL_xxxx VALUE
  52  *
  53  * shifting value to the left one bit from the previous entry.  xxxx should be
  54  * the name of the classification (for example, WEP)
  55  *
  56  * You then need to either add a IPW2100_xxxx_DEBUG() macro definition for your
  57  * classification, or use IPW_DEBUG(IPW_DL_xxxx, ...) whenever you want
  58  * to send output to that classification.
  59  *
  60  * To add your debug level to the list of levels seen when you perform
  61  *
  62  * % cat /proc/net/ipw2100/debug_level
  63  *
  64  * you simply need to add your entry to the ipw2100_debug_levels array.
  65  *
  66  * If you do not see debug_level in /proc/net/ipw2100 then you do not have
  67  * CONFIG_IPW2100_DEBUG defined in your kernel configuration
  68  *
  69  */
  70
  71 #define IPW_DL_ERROR         (1<<0)
  72 #define IPW_DL_WARNING       (1<<1)
  73 #define IPW_DL_INFO          (1<<2)
  74 #define IPW_DL_WX            (1<<3)
  75 #define IPW_DL_HC            (1<<5)
  76 #define IPW_DL_STATE         (1<<6)
  77
  78 #define IPW_DL_NOTIF         (1<<10)
  79 #define IPW_DL_SCAN          (1<<11)
  80 #define IPW_DL_ASSOC         (1<<12)
  81 #define IPW_DL_DROP          (1<<13)
  82
  83 #define IPW_DL_IOCTL         (1<<14)
  84 #define IPW_DL_RF_KILL       (1<<17)
  85
  86 #define IPW_DL_MANAGE        (1<<15)
  87 #define IPW_DL_FW            (1<<16)
  88
  89 #define IPW_DL_FRAG          (1<<21)
  90 #define IPW_DL_WEP           (1<<22)
  91 #define IPW_DL_TX            (1<<23)
  92 #define IPW_DL_RX            (1<<24)
  93 #define IPW_DL_ISR           (1<<25)
  94 #define IPW_DL_IO            (1<<26)
  95 #define IPW_DL_TRACE         (1<<28)
  96
  97 #define IPW_DEBUG_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a)
  98 #define IPW_DEBUG_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a)
  99 #define IPW_DEBUG_INFO(f...)    IPW_DEBUG(IPW_DL_INFO, ## f)
 100 #define IPW_DEBUG_WX(f...)     IPW_DEBUG(IPW_DL_WX, ## f)
 101 #define IPW_DEBUG_SCAN(f...)   IPW_DEBUG(IPW_DL_SCAN, ## f)
 102 #define IPW_DEBUG_NOTIF(f...) IPW_DEBUG(IPW_DL_NOTIF, ## f)
 103 #define IPW_DEBUG_TRACE(f...)  IPW_DEBUG(IPW_DL_TRACE, ## f)
 104 #define IPW_DEBUG_RX(f...)     IPW_DEBUG(IPW_DL_RX, ## f)
 105 #define IPW_DEBUG_TX(f...)     IPW_DEBUG(IPW_DL_TX, ## f)
 106 #define IPW_DEBUG_ISR(f...)    IPW_DEBUG(IPW_DL_ISR, ## f)
 107 #define IPW_DEBUG_MANAGEMENT(f...) IPW_DEBUG(IPW_DL_MANAGE, ## f)
 108 #define IPW_DEBUG_WEP(f...)    IPW_DEBUG(IPW_DL_WEP, ## f)
 109 #define IPW_DEBUG_HC(f...) IPW_DEBUG(IPW_DL_HC, ## f)
 110 #define IPW_DEBUG_FRAG(f...) IPW_DEBUG(IPW_DL_FRAG, ## f)
 111 #define IPW_DEBUG_FW(f...) IPW_DEBUG(IPW_DL_FW, ## f)
 112 #define IPW_DEBUG_RF_KILL(f...) IPW_DEBUG(IPW_DL_RF_KILL, ## f)
 113 #define IPW_DEBUG_DROP(f...) IPW_DEBUG(IPW_DL_DROP, ## f)
 114 #define IPW_DEBUG_IO(f...) IPW_DEBUG(IPW_DL_IO, ## f)
 115 #define IPW_DEBUG_IOCTL(f...) IPW_DEBUG(IPW_DL_IOCTL, ## f)
 116 #define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
 117 #define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
 118
 119 enum {
 120         IPW_HW_STATE_DISABLED = 1,
 121         IPW_HW_STATE_ENABLED = 0
 122 };
 123
 124 extern const char *port_type_str[];
 125 extern const char *band_str[];
 126
 127 #define NUMBER_OF_BD_PER_COMMAND_PACKET         1
 128 #define NUMBER_OF_BD_PER_DATA_PACKET            2
 129
 130 #define IPW_MAX_BDS 6
 131 #define NUMBER_OF_OVERHEAD_BDS_PER_PACKETR      2
 132 #define NUMBER_OF_BDS_TO_LEAVE_FOR_COMMANDS     1
 133
 134 #define REQUIRED_SPACE_IN_RING_FOR_COMMAND_PACKET \
 135     (IPW_BD_QUEUE_W_R_MIN_SPARE + NUMBER_OF_BD_PER_COMMAND_PACKET)
 136
 137 struct bd_status {
 138         union {
 139                 struct {
 140                         u8 nlf:1, txType:2, intEnabled:1, reserved:4;
 141                 } fields;
 142                 u8 field;
 143         } info;
 144 } __packed;
 145
 146 struct ipw2100_bd {
 147         u32 host_addr;
 148         u32 buf_length;
 149         struct bd_status status;
 150         /* number of fragments for frame (should be set only for
 151          * 1st TBD) */
 152         u8 num_fragments;
 153         u8 reserved[6];
 154 } __packed;
 155
 156 #define IPW_BD_QUEUE_LENGTH(n) (1<<n)
 157 #define IPW_BD_ALIGNMENT(L)    (L*sizeof(struct ipw2100_bd))
 158
 159 #define IPW_BD_STATUS_TX_FRAME_802_3             0x00
 160 #define IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT 0x01
 161 #define IPW_BD_STATUS_TX_FRAME_COMMAND           0x02
 162 #define IPW_BD_STATUS_TX_FRAME_802_11            0x04
 163 #define IPW_BD_STATUS_TX_INTERRUPT_ENABLE        0x08
 164
 165 struct ipw2100_bd_queue {
 166         /* driver (virtual) pointer to queue */
 167         struct ipw2100_bd *drv;
 168
 169         /* firmware (physical) pointer to queue */
 170         dma_addr_t nic;
 171
 172         /* Length of phy memory allocated for BDs */
 173         u32 size;
 174
 175         /* Number of BDs in queue (and in array) */
 176         u32 entries;
 177
 178         /* Number of available BDs (invalid for NIC BDs) */
 179         u32 available;
 180
 181         /* Offset of oldest used BD in array (next one to
 182          * check for completion) */
 183         u32 oldest;
 184
 185         /* Offset of next available (unused) BD */
 186         u32 next;
 187 };
 188
 189 #define RX_QUEUE_LENGTH 256
 190 #define TX_QUEUE_LENGTH 256
 191 #define HW_QUEUE_LENGTH 256
 192
 193 #define TX_PENDED_QUEUE_LENGTH (TX_QUEUE_LENGTH / NUMBER_OF_BD_PER_DATA_PACKET)
 194
 195 #define STATUS_TYPE_MASK        0x0000000f
 196 #define COMMAND_STATUS_VAL      0
 197 #define STATUS_CHANGE_VAL       1
 198 #define P80211_DATA_VAL         2
 199 #define P8023_DATA_VAL          3
 200 #define HOST_NOTIFICATION_VAL   4
 201
 202 #define IPW2100_RSSI_TO_DBM (-98)
 203
 204 struct ipw2100_status {
 205         u32 frame_size;
 206         u16 status_fields;
 207         u8 flags;
 208 #define IPW_STATUS_FLAG_DECRYPTED       (1<<0)
 209 #define IPW_STATUS_FLAG_WEP_ENCRYPTED   (1<<1)
 210 #define IPW_STATUS_FLAG_CRC_ERROR       (1<<2)
 211         u8 rssi;
 212 } __packed;
 213
 214 struct ipw2100_status_queue {
 215         /* driver (virtual) pointer to queue */
 216         struct ipw2100_status *drv;
 217
 218         /* firmware (physical) pointer to queue */
 219         dma_addr_t nic;
 220
 221         /* Length of phy memory allocated for BDs */
 222         u32 size;
 223 };
 224
 225 #define HOST_COMMAND_PARAMS_REG_LEN     100
 226 #define CMD_STATUS_PARAMS_REG_LEN       3
 227
 228 #define IPW_WPA_CAPABILITIES   0x1
 229 #define IPW_WPA_LISTENINTERVAL 0x2
 230 #define IPW_WPA_AP_ADDRESS     0x4
 231
 232 #define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32))
 233
 234 struct ipw2100_wpa_assoc_frame {
 235         u16 fixed_ie_mask;
 236         struct {
 237                 u16 capab_info;
 238                 u16 listen_interval;
 239                 u8 current_ap[ETH_ALEN];
 240         } fixed_ies;
 241         u32 var_ie_len;
 242         u8 var_ie[IPW_MAX_VAR_IE_LEN];
 243 };
 244
 245 #define IPW_BSS     1
 246 #define IPW_MONITOR 2
 247 #define IPW_IBSS    3
 248
 249 /**
 250  * @struct _tx_cmd - HWCommand
 251  * @brief H/W command structure.
 252  */
 253 struct ipw2100_cmd_header {
 254         u32 host_command_reg;
 255         u32 host_command_reg1;
 256         u32 sequence;
 257         u32 host_command_len_reg;
 258         u32 host_command_params_reg[HOST_COMMAND_PARAMS_REG_LEN];
 259         u32 cmd_status_reg;
 260         u32 cmd_status_params_reg[CMD_STATUS_PARAMS_REG_LEN];
 261         u32 rxq_base_ptr;
 262         u32 rxq_next_ptr;
 263         u32 rxq_host_ptr;
 264         u32 txq_base_ptr;
 265         u32 txq_next_ptr;
 266         u32 txq_host_ptr;
 267         u32 tx_status_reg;
 268         u32 reserved;
 269         u32 status_change_reg;
 270         u32 reserved1[3];
 271         u32 *ordinal1_ptr;
 272         u32 *ordinal2_ptr;
 273 } __packed;
 274
 275 struct ipw2100_data_header {
 276         u32 host_command_reg;
 277         u32 host_command_reg1;
 278         u8 encrypted;           // BOOLEAN in win! TRUE if frame is enc by driver
 279         u8 needs_encryption;    // BOOLEAN in win! TRUE if frma need to be enc in NIC
 280         u8 wep_index;           // 0 no key, 1-4 key index, 0xff immediate key
 281         u8 key_size;            // 0 no imm key, 0x5 64bit encr, 0xd 128bit encr, 0x10 128bit encr and 128bit IV
 282         u8 key[16];
 283         u8 reserved[10];        // f/w reserved
 284         u8 src_addr[ETH_ALEN];
 285         u8 dst_addr[ETH_ALEN];
 286         u16 fragment_size;
 287 } __packed;
 288
 289 /* Host command data structure */
 290 struct host_command {
 291         u32 host_command;       // COMMAND ID
 292         u32 host_command1;      // COMMAND ID
 293         u32 host_command_sequence;      // UNIQUE COMMAND NUMBER (ID)
 294         u32 host_command_length;        // LENGTH
 295         u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN];       // COMMAND PARAMETERS
 296 } __packed;
 297
 298 typedef enum {
 299         POWER_ON_RESET,
 300         EXIT_POWER_DOWN_RESET,
 301         SW_RESET,
 302         EEPROM_RW,
 303         SW_RE_INIT
 304 } ipw2100_reset_event;
 305
 306 enum {
 307         COMMAND = 0xCAFE,
 308         DATA,
 309         RX
 310 };
 311
 312 struct ipw2100_tx_packet {
 313         int type;
 314         int index;
 315         union {
 316                 struct {        /* COMMAND */
 317                         struct ipw2100_cmd_header *cmd;
 318                         dma_addr_t cmd_phys;
 319                 } c_struct;
 320                 struct {        /* DATA */
 321                         struct ipw2100_data_header *data;
 322                         dma_addr_t data_phys;
 323                         struct libipw_txb *txb;
 324                 } d_struct;
 325         } info;
 326         int jiffy_start;
 327
 328         struct list_head list;
 329 };
 330
 331 struct ipw2100_rx_packet {
 332         struct ipw2100_rx *rxp;
 333         dma_addr_t dma_addr;
 334         int jiffy_start;
 335         struct sk_buff *skb;
 336         struct list_head list;
 337 };
 338
 339 #define FRAG_DISABLED             (1<<31)
 340 #define RTS_DISABLED              (1<<31)
 341 #define MAX_RTS_THRESHOLD         2304U
 342 #define MIN_RTS_THRESHOLD         1U
 343 #define DEFAULT_RTS_THRESHOLD     1000U
 344
 345 #define DEFAULT_BEACON_INTERVAL   100U
 346 #define DEFAULT_SHORT_RETRY_LIMIT 7U
 347 #define DEFAULT_LONG_RETRY_LIMIT  4U
 348
 349 struct ipw2100_ordinals {
 350         u32 table1_addr;
 351         u32 table2_addr;
 352         u32 table1_size;
 353         u32 table2_size;
 354 };
 355
 356 /* Host Notification header */
 357 struct ipw2100_notification {
 358         u32 hnhdr_subtype;      /* type of host notification */
 359         u32 hnhdr_size;         /* size in bytes of data
 360                                    or number of entries, if table.
 361                                    Does NOT include header */
 362 } __packed;
 363
 364 #define MAX_KEY_SIZE    16
 365 #define MAX_KEYS        8
 366
 367 #define IPW2100_WEP_ENABLE     (1<<1)
 368 #define IPW2100_WEP_DROP_CLEAR (1<<2)
 369
 370 #define IPW_NONE_CIPHER   (1<<0)
 371 #define IPW_WEP40_CIPHER  (1<<1)
 372 #define IPW_TKIP_CIPHER   (1<<2)
 373 #define IPW_CCMP_CIPHER   (1<<4)
 374 #define IPW_WEP104_CIPHER (1<<5)
 375 #define IPW_CKIP_CIPHER   (1<<6)
 376
 377 #define IPW_AUTH_OPEN           0
 378 #define IPW_AUTH_SHARED         1
 379 #define IPW_AUTH_LEAP           2
 380 #define IPW_AUTH_LEAP_CISCO_ID  0x80
 381
 382 struct statistic {
 383         int value;
 384         int hi;
 385         int lo;
 386 };
 387
 388 #define INIT_STAT(x) do {  \
 389   (x)->value = (x)->hi = 0; \
 390   (x)->lo = 0x7fffffff; \
 391 } while (0)
 392 #define SET_STAT(x,y) do { \
 393   (x)->value = y; \
 394   if ((x)->value > (x)->hi) (x)->hi = (x)->value; \
 395   if ((x)->value < (x)->lo) (x)->lo = (x)->value; \
 396 } while (0)
 397 #define INC_STAT(x) do { if (++(x)->value > (x)->hi) (x)->hi = (x)->value; } \
 398 while (0)
 399 #define DEC_STAT(x) do { if (--(x)->value < (x)->lo) (x)->lo = (x)->value; } \
 400 while (0)
 401
 402 #define IPW2100_ERROR_QUEUE 5
 403
 404 /* Power management code: enable or disable? */
 405 enum {
 406 #ifdef CONFIG_PM
 407         IPW2100_PM_DISABLED = 0,
 408         PM_STATE_SIZE = 16,
 409 #else
 410         IPW2100_PM_DISABLED = 1,
 411         PM_STATE_SIZE = 0,
 412 #endif
 413 };
 414
 415 #define STATUS_POWERED          (1<<0)
 416 #define STATUS_CMD_ACTIVE       (1<<1)  /**< host command in progress */
 417 #define STATUS_RUNNING          (1<<2)  /* Card initialized, but not enabled */
 418 #define STATUS_ENABLED          (1<<3)  /* Card enabled -- can scan,Tx,Rx */
 419 #define STATUS_STOPPING         (1<<4)  /* Card is in shutdown phase */
 420 #define STATUS_INITIALIZED      (1<<5)  /* Card is ready for external calls */
 421 #define STATUS_ASSOCIATING      (1<<9)  /* Associated, but no BSSID yet */
 422 #define STATUS_ASSOCIATED       (1<<10) /* Associated and BSSID valid */
 423 #define STATUS_INT_ENABLED      (1<<11)
 424 #define STATUS_RF_KILL_HW       (1<<12)
 425 #define STATUS_RF_KILL_SW       (1<<13)
 426 #define STATUS_RF_KILL_MASK     (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW)
 427 #define STATUS_EXIT_PENDING     (1<<14)
 428
 429 #define STATUS_SCAN_PENDING     (1<<23)
 430 #define STATUS_SCANNING         (1<<24)
 431 #define STATUS_SCAN_ABORTING    (1<<25)
 432 #define STATUS_SCAN_COMPLETE    (1<<26)
 433 #define STATUS_WX_EVENT_PENDING (1<<27)
 434 #define STATUS_RESET_PENDING    (1<<29)
 435 #define STATUS_SECURITY_UPDATED (1<<30) /* Security sync needed */
 436
 437 /* Internal NIC states */
 438 #define IPW_STATE_INITIALIZED   (1<<0)
 439 #define IPW_STATE_COUNTRY_FOUND (1<<1)
 440 #define IPW_STATE_ASSOCIATED    (1<<2)
 441 #define IPW_STATE_ASSN_LOST     (1<<3)
 442 #define IPW_STATE_ASSN_CHANGED  (1<<4)
 443 #define IPW_STATE_SCAN_COMPLETE (1<<5)
 444 #define IPW_STATE_ENTERED_PSP   (1<<6)
 445 #define IPW_STATE_LEFT_PSP      (1<<7)
 446 #define IPW_STATE_RF_KILL       (1<<8)
 447 #define IPW_STATE_DISABLED      (1<<9)
 448 #define IPW_STATE_POWER_DOWN    (1<<10)
 449 #define IPW_STATE_SCANNING      (1<<11)
 450
 451 #define CFG_STATIC_CHANNEL      (1<<0)  /* Restrict assoc. to single channel */
 452 #define CFG_STATIC_ESSID        (1<<1)  /* Restrict assoc. to single SSID */
 453 #define CFG_STATIC_BSSID        (1<<2)  /* Restrict assoc. to single BSSID */
 454 #define CFG_CUSTOM_MAC          (1<<3)
 455 #define CFG_LONG_PREAMBLE       (1<<4)
 456 #define CFG_ASSOCIATE           (1<<6)
 457 #define CFG_FIXED_RATE          (1<<7)
 458 #define CFG_ADHOC_CREATE        (1<<8)
 459 #define CFG_PASSIVE_SCAN        (1<<10)
 460 #ifdef CONFIG_IPW2100_MONITOR
 461 #define CFG_CRC_CHECK           (1<<11)
 462 #endif
 463
 464 #define CAP_SHARED_KEY          (1<<0)  /* Off = OPEN */
 465 #define CAP_PRIVACY_ON          (1<<1)  /* Off = No privacy */
 466
 467 struct ipw2100_priv {
 468         void __iomem *ioaddr;
 469
 470         int stop_hang_check;    /* Set 1 when shutting down to kill hang_check */
 471         int stop_rf_kill;       /* Set 1 when shutting down to kill rf_kill */
 472
 473         struct libipw_device *ieee;
 474         unsigned long status;
 475         unsigned long config;
 476         unsigned long capability;
 477
 478         /* Statistics */
 479         int resets;
 480         time64_t reset_backoff;
 481
 482         /* Context */
 483         u8 essid[IW_ESSID_MAX_SIZE];
 484         u8 essid_len;
 485         u8 bssid[ETH_ALEN];
 486         u8 channel;
 487         int last_mode;
 488
 489         time64_t connect_start;
 490         time64_t last_reset;
 491
 492         u32 channel_mask;
 493         u32 fatal_error;
 494         u32 fatal_errors[IPW2100_ERROR_QUEUE];
 495         u32 fatal_index;
 496         int eeprom_version;
 497         int firmware_version;
 498         unsigned long hw_features;
 499         int hangs;
 500         u32 last_rtc;
 501         int dump_raw;           /* 1 to dump raw bytes in /sys/.../memory */
 502         u8 *snapshot[0x30];
 503
 504         u8 mandatory_bssid_mac[ETH_ALEN];
 505         u8 mac_addr[ETH_ALEN];
 506
 507         int power_mode;
 508
 509         int messages_sent;
 510
 511         int short_retry_limit;
 512         int long_retry_limit;
 513
 514         u32 rts_threshold;
 515         u32 frag_threshold;
 516
 517         int in_isr;
 518
 519         u32 tx_rates;
 520         int tx_power;
 521         u32 beacon_interval;
 522
 523         char nick[IW_ESSID_MAX_SIZE + 1];
 524
 525         struct ipw2100_status_queue status_queue;
 526
 527         struct statistic txq_stat;
 528         struct statistic rxq_stat;
 529         struct ipw2100_bd_queue rx_queue;
 530         struct ipw2100_bd_queue tx_queue;
 531         struct ipw2100_rx_packet *rx_buffers;
 532
 533         struct statistic fw_pend_stat;
 534         struct list_head fw_pend_list;
 535
 536         struct statistic msg_free_stat;
 537         struct statistic msg_pend_stat;
 538         struct list_head msg_free_list;
 539         struct list_head msg_pend_list;
 540         struct ipw2100_tx_packet *msg_buffers;
 541
 542         struct statistic tx_free_stat;
 543         struct statistic tx_pend_stat;
 544         struct list_head tx_free_list;
 545         struct list_head tx_pend_list;
 546         struct ipw2100_tx_packet *tx_buffers;
 547
 548         struct ipw2100_ordinals ordinals;
 549
 550         struct pci_dev *pci_dev;
 551
 552         struct proc_dir_entry *dir_dev;
 553
 554         struct net_device *net_dev;
 555         struct iw_statistics wstats;
 556
 557         struct tasklet_struct irq_tasklet;
 558
 559         struct delayed_work reset_work;
 560         struct delayed_work security_work;
 561         struct delayed_work wx_event_work;
 562         struct delayed_work hang_check;
 563         struct delayed_work rf_kill;
 564         struct delayed_work scan_event;
 565
 566         int user_requested_scan;
 567
 568         /* Track time in suspend, using CLOCK_BOOTTIME */
 569         time64_t suspend_at;
 570         time64_t suspend_time;
 571
 572         u32 interrupts;
 573         int tx_interrupts;
 574         int rx_interrupts;
 575         int inta_other;
 576
 577         spinlock_t low_lock;
 578         struct mutex action_mutex;
 579         struct mutex adapter_mutex;
 580
 581         wait_queue_head_t wait_command_queue;
 582 };
 583
 584 /*********************************************************
 585  * Host Command -> From Driver to FW
 586  *********************************************************/
 587
 588 /**
 589  * Host command identifiers
 590  */
 591 #define HOST_COMPLETE           2
 592 #define SYSTEM_CONFIG           6
 593 #define SSID                    8
 594 #define MANDATORY_BSSID         9
 595 #define AUTHENTICATION_TYPE    10
 596 #define ADAPTER_ADDRESS        11
 597 #define PORT_TYPE              12
 598 #define INTERNATIONAL_MODE     13
 599 #define CHANNEL                14
 600 #define RTS_THRESHOLD          15
 601 #define FRAG_THRESHOLD         16
 602 #define POWER_MODE             17
 603 #define TX_RATES               18
 604 #define BASIC_TX_RATES         19
 605 #define WEP_KEY_INFO           20
 606 #define WEP_KEY_INDEX          25
 607 #define WEP_FLAGS              26
 608 #define ADD_MULTICAST          27
 609 #define CLEAR_ALL_MULTICAST    28
 610 #define BEACON_INTERVAL        29
 611 #define ATIM_WINDOW            30
 612 #define CLEAR_STATISTICS       31
 613 #define SEND                   33
 614 #define TX_POWER_INDEX         36
 615 #define BROADCAST_SCAN         43
 616 #define CARD_DISABLE           44
 617 #define PREFERRED_BSSID        45
 618 #define SET_SCAN_OPTIONS       46
 619 #define SCAN_DWELL_TIME        47
 620 #define SWEEP_TABLE            48
 621 #define AP_OR_STATION_TABLE    49
 622 #define GROUP_ORDINALS         50
 623 #define SHORT_RETRY_LIMIT      51
 624 #define LONG_RETRY_LIMIT       52
 625
 626 #define HOST_PRE_POWER_DOWN    58
 627 #define CARD_DISABLE_PHY_OFF   61
 628 #define MSDU_TX_RATES          62
 629
 630 /* Rogue AP Detection */
 631 #define SET_STATION_STAT_BITS      64
 632 #define CLEAR_STATIONS_STAT_BITS   65
 633 #define LEAP_ROGUE_MODE            66   //TODO tbw replaced by CFG_LEAP_ROGUE_AP
 634 #define SET_SECURITY_INFORMATION   67
 635 #define DISASSOCIATION_BSSID       68
 636 #define SET_WPA_IE                 69
 637
 638 /* system configuration bit mask: */
 639 #define IPW_CFG_MONITOR               0x00004
 640 #define IPW_CFG_PREAMBLE_AUTO        0x00010
 641 #define IPW_CFG_IBSS_AUTO_START     0x00020
 642 #define IPW_CFG_LOOPBACK            0x00100
 643 #define IPW_CFG_ANSWER_BCSSID_PROBE 0x00800
 644 #define IPW_CFG_BT_SIDEBAND_SIGNAL      0x02000
 645 #define IPW_CFG_802_1x_ENABLE       0x04000
 646 #define IPW_CFG_BSS_MASK                0x08000
 647 #define IPW_CFG_IBSS_MASK               0x10000
 648
 649 #define IPW_SCAN_NOASSOCIATE (1<<0)
 650 #define IPW_SCAN_MIXED_CELL (1<<1)
 651 /* RESERVED (1<<2) */
 652 #define IPW_SCAN_PASSIVE (1<<3)
 653
 654 #define IPW_NIC_FATAL_ERROR 0x2A7F0
 655 #define IPW_ERROR_ADDR(x) (x & 0x3FFFF)
 656 #define IPW_ERROR_CODE(x) ((x & 0xFF000000) >> 24)
 657 #define IPW2100_ERR_C3_CORRUPTION (0x10 << 24)
 658 #define IPW2100_ERR_MSG_TIMEOUT   (0x11 << 24)
 659 #define IPW2100_ERR_FW_LOAD       (0x12 << 24)
 660
 661 #define IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND                    0x200
 662 #define IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND    IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0D80
 663
 664 #define IPW_MEM_HOST_SHARED_RX_BD_BASE                  (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x40)
 665 #define IPW_MEM_HOST_SHARED_RX_STATUS_BASE              (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x44)
 666 #define IPW_MEM_HOST_SHARED_RX_BD_SIZE                  (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x48)
 667 #define IPW_MEM_HOST_SHARED_RX_READ_INDEX               (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0xa0)
 668
 669 #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE          (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)
 670 #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE          (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)
 671 #define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX       (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)
 672
 673 #define IPW_MEM_HOST_SHARED_RX_WRITE_INDEX \
 674     (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x20)
 675
 676 #define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \
 677     (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND)
 678
 679 #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1   (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180)
 680 #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2   (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184)
 681
 682 #define IPW2100_INTA_TX_TRANSFER               (0x00000001)     // Bit 0 (LSB)
 683 #define IPW2100_INTA_RX_TRANSFER               (0x00000002)     // Bit 1
 684 #define IPW2100_INTA_TX_COMPLETE               (0x00000004)     // Bit 2
 685 #define IPW2100_INTA_EVENT_INTERRUPT           (0x00000008)     // Bit 3
 686 #define IPW2100_INTA_STATUS_CHANGE             (0x00000010)     // Bit 4
 687 #define IPW2100_INTA_BEACON_PERIOD_EXPIRED     (0x00000020)     // Bit 5
 688 #define IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE  (0x00010000) // Bit 16
 689 #define IPW2100_INTA_FW_INIT_DONE              (0x01000000)     // Bit 24
 690 #define IPW2100_INTA_FW_CALIBRATION_CALC       (0x02000000)     // Bit 25
 691 #define IPW2100_INTA_FATAL_ERROR               (0x40000000)     // Bit 30
 692 #define IPW2100_INTA_PARITY_ERROR              (0x80000000)     // Bit 31 (MSB)
 693
 694 #define IPW_AUX_HOST_RESET_REG_PRINCETON_RESET              (0x00000001)
 695 #define IPW_AUX_HOST_RESET_REG_FORCE_NMI                    (0x00000002)
 696 #define IPW_AUX_HOST_RESET_REG_PCI_HOST_CLUSTER_FATAL_NMI   (0x00000004)
 697 #define IPW_AUX_HOST_RESET_REG_CORE_FATAL_NMI               (0x00000008)
 698 #define IPW_AUX_HOST_RESET_REG_SW_RESET                     (0x00000080)
 699 #define IPW_AUX_HOST_RESET_REG_MASTER_DISABLED              (0x00000100)
 700 #define IPW_AUX_HOST_RESET_REG_STOP_MASTER                  (0x00000200)
 701
 702 #define IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY           (0x00000001)    // Bit 0 (LSB)
 703 #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY   (0x00000002)    // Bit 1
 704 #define IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE             (0x00000004)    // Bit 2
 705 #define IPW_AUX_HOST_GP_CNTRL_BITS_SYS_CONFIG           (0x000007c0)    // Bits 6-10
 706 #define IPW_AUX_HOST_GP_CNTRL_BIT_BUS_TYPE              (0x00000200)    // Bit 9
 707 #define IPW_AUX_HOST_GP_CNTRL_BIT_BAR0_BLOCK_SIZE       (0x00000400)    // Bit 10
 708 #define IPW_AUX_HOST_GP_CNTRL_BIT_USB_MODE              (0x20000000)    // Bit 29
 709 #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_FORCES_SYS_CLK   (0x40000000)    // Bit 30
 710 #define IPW_AUX_HOST_GP_CNTRL_BIT_FW_FORCES_SYS_CLK     (0x80000000)    // Bit 31 (MSB)
 711
 712 #define IPW_BIT_GPIO_GPIO1_MASK         0x0000000C
 713 #define IPW_BIT_GPIO_GPIO3_MASK         0x000000C0
 714 #define IPW_BIT_GPIO_GPIO1_ENABLE       0x00000008
 715 #define IPW_BIT_GPIO_RF_KILL            0x00010000
 716
 717 #define IPW_BIT_GPIO_LED_OFF            0x00002000      // Bit 13 = 1
 718
 719 #define IPW_REG_DOMAIN_0_OFFSET         0x0000
 720 #define IPW_REG_DOMAIN_1_OFFSET         IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND
 721
 722 #define IPW_REG_INTA                    IPW_REG_DOMAIN_0_OFFSET + 0x0008
 723 #define IPW_REG_INTA_MASK               IPW_REG_DOMAIN_0_OFFSET + 0x000C
 724 #define IPW_REG_INDIRECT_ACCESS_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0010
 725 #define IPW_REG_INDIRECT_ACCESS_DATA    IPW_REG_DOMAIN_0_OFFSET + 0x0014
 726 #define IPW_REG_AUTOINCREMENT_ADDRESS   IPW_REG_DOMAIN_0_OFFSET + 0x0018
 727 #define IPW_REG_AUTOINCREMENT_DATA      IPW_REG_DOMAIN_0_OFFSET + 0x001C
 728 #define IPW_REG_RESET_REG               IPW_REG_DOMAIN_0_OFFSET + 0x0020
 729 #define IPW_REG_GP_CNTRL                IPW_REG_DOMAIN_0_OFFSET + 0x0024
 730 #define IPW_REG_GPIO                    IPW_REG_DOMAIN_0_OFFSET + 0x0030
 731 #define IPW_REG_FW_TYPE                 IPW_REG_DOMAIN_1_OFFSET + 0x0188
 732 #define IPW_REG_FW_VERSION              IPW_REG_DOMAIN_1_OFFSET + 0x018C
 733 #define IPW_REG_FW_COMPATIBILITY_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x0190
 734
 735 #define IPW_REG_INDIRECT_ADDR_MASK      0x00FFFFFC
 736
 737 #define IPW_INTERRUPT_MASK              0xC1010013
 738
 739 #define IPW2100_CONTROL_REG             0x220000
 740 #define IPW2100_CONTROL_PHY_OFF         0x8
 741
 742 #define IPW2100_COMMAND                 0x00300004
 743 #define IPW2100_COMMAND_PHY_ON          0x0
 744 #define IPW2100_COMMAND_PHY_OFF         0x1
 745
 746 /* in DEBUG_AREA, values of memory always 0xd55555d5 */
 747 #define IPW_REG_DOA_DEBUG_AREA_START    IPW_REG_DOMAIN_0_OFFSET + 0x0090
 748 #define IPW_REG_DOA_DEBUG_AREA_END      IPW_REG_DOMAIN_0_OFFSET + 0x00FF
 749 #define IPW_DATA_DOA_DEBUG_VALUE        0xd55555d5
 750
 751 #define IPW_INTERNAL_REGISTER_HALT_AND_RESET    0x003000e0
 752
 753 #define IPW_WAIT_CLOCK_STABILIZATION_DELAY          50  // micro seconds
 754 #define IPW_WAIT_RESET_ARC_COMPLETE_DELAY           10  // micro seconds
 755 #define IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY 10  // micro seconds
 756
 757 // BD ring queue read/write difference
 758 #define IPW_BD_QUEUE_W_R_MIN_SPARE 2
 759
 760 #define IPW_CACHE_LINE_LENGTH_DEFAULT               0x80
 761
 762 #define IPW_CARD_DISABLE_PHY_OFF_COMPLETE_WAIT      100 // 100 milli
 763 #define IPW_PREPARE_POWER_DOWN_COMPLETE_WAIT        100 // 100 milli
 764
 765 #define IPW_HEADER_802_11_SIZE           sizeof(struct libipw_hdr_3addr)
 766 #define IPW_MAX_80211_PAYLOAD_SIZE              2304U
 767 #define IPW_MAX_802_11_PAYLOAD_LENGTH           2312
 768 #define IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH      1536
 769 #define IPW_MIN_ACCEPTABLE_RX_FRAME_LENGTH      60
 770 #define IPW_MAX_ACCEPTABLE_RX_FRAME_LENGTH \
 771         (IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH + IPW_HEADER_802_11_SIZE - \
 772         sizeof(struct ethhdr))
 773
 774 #define IPW_802_11_FCS_LENGTH 4
 775 #define IPW_RX_NIC_BUFFER_LENGTH \
 776         (IPW_MAX_802_11_PAYLOAD_LENGTH + IPW_HEADER_802_11_SIZE + \
 777                 IPW_802_11_FCS_LENGTH)
 778
 779 #define IPW_802_11_PAYLOAD_OFFSET \
 780         (sizeof(struct libipw_hdr_3addr) + \
 781          sizeof(struct libipw_snap_hdr))
 782
 783 struct ipw2100_rx {
 784         union {
 785                 unsigned char payload[IPW_RX_NIC_BUFFER_LENGTH];
 786                 struct libipw_hdr_4addr header;
 787                 u32 status;
 788                 struct ipw2100_notification notification;
 789                 struct ipw2100_cmd_header command;
 790         } rx_data;
 791 } __packed;
 792
 793 /* Bit 0-7 are for 802.11b tx rates - .  Bit 5-7 are reserved */
 794 #define TX_RATE_1_MBIT              0x0001
 795 #define TX_RATE_2_MBIT              0x0002
 796 #define TX_RATE_5_5_MBIT            0x0004
 797 #define TX_RATE_11_MBIT             0x0008
 798 #define TX_RATE_MASK                0x000F
 799 #define DEFAULT_TX_RATES            0x000F
 800
 801 #define IPW_POWER_MODE_CAM           0x00       //(always on)
 802 #define IPW_POWER_INDEX_1            0x01
 803 #define IPW_POWER_INDEX_2            0x02
 804 #define IPW_POWER_INDEX_3            0x03
 805 #define IPW_POWER_INDEX_4            0x04
 806 #define IPW_POWER_INDEX_5            0x05
 807 #define IPW_POWER_AUTO               0x06
 808 #define IPW_POWER_MASK               0x0F
 809 #define IPW_POWER_ENABLED            0x10
 810 #define IPW_POWER_LEVEL(x)           ((x) & IPW_POWER_MASK)
 811
 812 #define IPW_TX_POWER_AUTO            0
 813 #define IPW_TX_POWER_ENHANCED        1
 814
 815 #define IPW_TX_POWER_DEFAULT         32
 816 #define IPW_TX_POWER_MIN             0
 817 #define IPW_TX_POWER_MAX             16
 818 #define IPW_TX_POWER_MIN_DBM         (-12)
 819 #define IPW_TX_POWER_MAX_DBM         16
 820
 821 #define FW_SCAN_DONOT_ASSOCIATE     0x0001      // Dont Attempt to Associate after Scan
 822 #define FW_SCAN_PASSIVE             0x0008      // Force PASSSIVE Scan
 823
 824 #define REG_MIN_CHANNEL             0
 825 #define REG_MAX_CHANNEL             14
 826
 827 #define REG_CHANNEL_MASK            0x00003FFF
 828 #define IPW_IBSS_11B_DEFAULT_MASK   0x87ff
 829
 830 #define DIVERSITY_EITHER            0   // Use both antennas
 831 #define DIVERSITY_ANTENNA_A         1   // Use antenna A
 832 #define DIVERSITY_ANTENNA_B         2   // Use antenna B
 833
 834 #define HOST_COMMAND_WAIT 0
 835 #define HOST_COMMAND_NO_WAIT 1
 836
 837 #define LOCK_NONE 0
 838 #define LOCK_DRIVER 1
 839 #define LOCK_FW 2
 840
 841 #define TYPE_SWEEP_ORD                  0x000D
 842 #define TYPE_IBSS_STTN_ORD              0x000E
 843 #define TYPE_BSS_AP_ORD                 0x000F
 844 #define TYPE_RAW_BEACON_ENTRY           0x0010
 845 #define TYPE_CALIBRATION_DATA           0x0011
 846 #define TYPE_ROGUE_AP_DATA              0x0012
 847 #define TYPE_ASSOCIATION_REQUEST        0x0013
 848 #define TYPE_REASSOCIATION_REQUEST      0x0014
 849
 850 #define HW_FEATURE_RFKILL 0x0001
 851 #define RF_KILLSWITCH_OFF 1
 852 #define RF_KILLSWITCH_ON  0
 853
 854 #define IPW_COMMAND_POOL_SIZE        40
 855
 856 #define IPW_START_ORD_TAB_1                     1
 857 #define IPW_START_ORD_TAB_2                     1000
 858
 859 #define IPW_ORD_TAB_1_ENTRY_SIZE                sizeof(u32)
 860
 861 #define IS_ORDINAL_TABLE_ONE(mgr,id) \
 862     ((id >= IPW_START_ORD_TAB_1) && (id < mgr->table1_size))
 863 #define IS_ORDINAL_TABLE_TWO(mgr,id) \
 864     ((id >= IPW_START_ORD_TAB_2) && (id < (mgr->table2_size + IPW_START_ORD_TAB_2)))
 865
 866 #define BSS_ID_LENGTH               6
 867
 868 // Fixed size data: Ordinal Table 1
 869 typedef enum _ORDINAL_TABLE_1 { // NS - means Not Supported by FW
 870 // Transmit statistics
 871         IPW_ORD_STAT_TX_HOST_REQUESTS = 1,      // # of requested Host Tx's (MSDU)
 872         IPW_ORD_STAT_TX_HOST_COMPLETE,  // # of successful Host Tx's (MSDU)
 873         IPW_ORD_STAT_TX_DIR_DATA,       // # of successful Directed Tx's (MSDU)
 874
 875         IPW_ORD_STAT_TX_DIR_DATA1 = 4,  // # of successful Directed Tx's (MSDU) @ 1MB
 876         IPW_ORD_STAT_TX_DIR_DATA2,      // # of successful Directed Tx's (MSDU) @ 2MB
 877         IPW_ORD_STAT_TX_DIR_DATA5_5,    // # of successful Directed Tx's (MSDU) @ 5_5MB
 878         IPW_ORD_STAT_TX_DIR_DATA11,     // # of successful Directed Tx's (MSDU) @ 11MB
 879         IPW_ORD_STAT_TX_DIR_DATA22,     // # of successful Directed Tx's (MSDU) @ 22MB
 880
 881         IPW_ORD_STAT_TX_NODIR_DATA1 = 13,       // # of successful Non_Directed Tx's (MSDU) @ 1MB
 882         IPW_ORD_STAT_TX_NODIR_DATA2,    // # of successful Non_Directed Tx's (MSDU) @ 2MB
 883         IPW_ORD_STAT_TX_NODIR_DATA5_5,  // # of successful Non_Directed Tx's (MSDU) @ 5.5MB
 884         IPW_ORD_STAT_TX_NODIR_DATA11,   // # of successful Non_Directed Tx's (MSDU) @ 11MB
 885
 886         IPW_ORD_STAT_NULL_DATA = 21,    // # of successful NULL data Tx's
 887         IPW_ORD_STAT_TX_RTS,    // # of successful Tx RTS
 888         IPW_ORD_STAT_TX_CTS,    // # of successful Tx CTS
 889         IPW_ORD_STAT_TX_ACK,    // # of successful Tx ACK
 890         IPW_ORD_STAT_TX_ASSN,   // # of successful Association Tx's
 891         IPW_ORD_STAT_TX_ASSN_RESP,      // # of successful Association response Tx's
 892         IPW_ORD_STAT_TX_REASSN, // # of successful Reassociation Tx's
 893         IPW_ORD_STAT_TX_REASSN_RESP,    // # of successful Reassociation response Tx's
 894         IPW_ORD_STAT_TX_PROBE,  // # of probes successfully transmitted
 895         IPW_ORD_STAT_TX_PROBE_RESP,     // # of probe responses successfully transmitted
 896         IPW_ORD_STAT_TX_BEACON, // # of tx beacon
 897         IPW_ORD_STAT_TX_ATIM,   // # of Tx ATIM
 898         IPW_ORD_STAT_TX_DISASSN,        // # of successful Disassociation TX
 899         IPW_ORD_STAT_TX_AUTH,   // # of successful Authentication Tx
 900         IPW_ORD_STAT_TX_DEAUTH, // # of successful Deauthentication TX
 901
 902         IPW_ORD_STAT_TX_TOTAL_BYTES = 41,       // Total successful Tx data bytes
 903         IPW_ORD_STAT_TX_RETRIES,        // # of Tx retries
 904         IPW_ORD_STAT_TX_RETRY1, // # of Tx retries at 1MBPS
 905         IPW_ORD_STAT_TX_RETRY2, // # of Tx retries at 2MBPS
 906         IPW_ORD_STAT_TX_RETRY5_5,       // # of Tx retries at 5.5MBPS
 907         IPW_ORD_STAT_TX_RETRY11,        // # of Tx retries at 11MBPS
 908
 909         IPW_ORD_STAT_TX_FAILURES = 51,  // # of Tx Failures
 910         IPW_ORD_STAT_TX_ABORT_AT_HOP,   //NS // # of Tx's aborted at hop time
 911         IPW_ORD_STAT_TX_MAX_TRIES_IN_HOP,       // # of times max tries in a hop failed
 912         IPW_ORD_STAT_TX_ABORT_LATE_DMA, //NS // # of times tx aborted due to late dma setup
 913         IPW_ORD_STAT_TX_ABORT_STX,      //NS // # of times backoff aborted
 914         IPW_ORD_STAT_TX_DISASSN_FAIL,   // # of times disassociation failed
 915         IPW_ORD_STAT_TX_ERR_CTS,        // # of missed/bad CTS frames
 916         IPW_ORD_STAT_TX_BPDU,   //NS // # of spanning tree BPDUs sent
 917         IPW_ORD_STAT_TX_ERR_ACK,        // # of tx err due to acks
 918
 919         // Receive statistics
 920         IPW_ORD_STAT_RX_HOST = 61,      // # of packets passed to host
 921         IPW_ORD_STAT_RX_DIR_DATA,       // # of directed packets
 922         IPW_ORD_STAT_RX_DIR_DATA1,      // # of directed packets at 1MB
 923         IPW_ORD_STAT_RX_DIR_DATA2,      // # of directed packets at 2MB
 924         IPW_ORD_STAT_RX_DIR_DATA5_5,    // # of directed packets at 5.5MB
 925         IPW_ORD_STAT_RX_DIR_DATA11,     // # of directed packets at 11MB
 926         IPW_ORD_STAT_RX_DIR_DATA22,     // # of directed packets at 22MB
 927
 928         IPW_ORD_STAT_RX_NODIR_DATA = 71,        // # of nondirected packets
 929         IPW_ORD_STAT_RX_NODIR_DATA1,    // # of nondirected packets at 1MB
 930         IPW_ORD_STAT_RX_NODIR_DATA2,    // # of nondirected packets at 2MB
 931         IPW_ORD_STAT_RX_NODIR_DATA5_5,  // # of nondirected packets at 5.5MB
 932         IPW_ORD_STAT_RX_NODIR_DATA11,   // # of nondirected packets at 11MB
 933
 934         IPW_ORD_STAT_RX_NULL_DATA = 80, // # of null data rx's
 935         IPW_ORD_STAT_RX_POLL,   //NS // # of poll rx
 936         IPW_ORD_STAT_RX_RTS,    // # of Rx RTS
 937         IPW_ORD_STAT_RX_CTS,    // # of Rx CTS
 938         IPW_ORD_STAT_RX_ACK,    // # of Rx ACK
 939         IPW_ORD_STAT_RX_CFEND,  // # of Rx CF End
 940         IPW_ORD_STAT_RX_CFEND_ACK,      // # of Rx CF End + CF Ack
 941         IPW_ORD_STAT_RX_ASSN,   // # of Association Rx's
 942         IPW_ORD_STAT_RX_ASSN_RESP,      // # of Association response Rx's
 943         IPW_ORD_STAT_RX_REASSN, // # of Reassociation Rx's
 944         IPW_ORD_STAT_RX_REASSN_RESP,    // # of Reassociation response Rx's
 945         IPW_ORD_STAT_RX_PROBE,  // # of probe Rx's
 946         IPW_ORD_STAT_RX_PROBE_RESP,     // # of probe response Rx's
 947         IPW_ORD_STAT_RX_BEACON, // # of Rx beacon
 948         IPW_ORD_STAT_RX_ATIM,   // # of Rx ATIM
 949         IPW_ORD_STAT_RX_DISASSN,        // # of disassociation Rx
 950         IPW_ORD_STAT_RX_AUTH,   // # of authentication Rx
 951         IPW_ORD_STAT_RX_DEAUTH, // # of deauthentication Rx
 952
 953         IPW_ORD_STAT_RX_TOTAL_BYTES = 101,      // Total rx data bytes received
 954         IPW_ORD_STAT_RX_ERR_CRC,        // # of packets with Rx CRC error
 955         IPW_ORD_STAT_RX_ERR_CRC1,       // # of Rx CRC errors at 1MB
 956         IPW_ORD_STAT_RX_ERR_CRC2,       // # of Rx CRC errors at 2MB
 957         IPW_ORD_STAT_RX_ERR_CRC5_5,     // # of Rx CRC errors at 5.5MB
 958         IPW_ORD_STAT_RX_ERR_CRC11,      // # of Rx CRC errors at 11MB
 959
 960         IPW_ORD_STAT_RX_DUPLICATE1 = 112,       // # of duplicate rx packets at 1MB
 961         IPW_ORD_STAT_RX_DUPLICATE2,     // # of duplicate rx packets at 2MB
 962         IPW_ORD_STAT_RX_DUPLICATE5_5,   // # of duplicate rx packets at 5.5MB
 963         IPW_ORD_STAT_RX_DUPLICATE11,    // # of duplicate rx packets at 11MB
 964         IPW_ORD_STAT_RX_DUPLICATE = 119,        // # of duplicate rx packets
 965
 966         IPW_ORD_PERS_DB_LOCK = 120,     // # locking fw permanent  db
 967         IPW_ORD_PERS_DB_SIZE,   // # size of fw permanent  db
 968         IPW_ORD_PERS_DB_ADDR,   // # address of fw permanent  db
 969         IPW_ORD_STAT_RX_INVALID_PROTOCOL,       // # of rx frames with invalid protocol
 970         IPW_ORD_SYS_BOOT_TIME,  // # Boot time
 971         IPW_ORD_STAT_RX_NO_BUFFER,      // # of rx frames rejected due to no buffer
 972         IPW_ORD_STAT_RX_ABORT_LATE_DMA, //NS // # of rx frames rejected due to dma setup too late
 973         IPW_ORD_STAT_RX_ABORT_AT_HOP,   //NS // # of rx frames aborted due to hop
 974         IPW_ORD_STAT_RX_MISSING_FRAG,   // # of rx frames dropped due to missing fragment
 975         IPW_ORD_STAT_RX_ORPHAN_FRAG,    // # of rx frames dropped due to non-sequential fragment
 976         IPW_ORD_STAT_RX_ORPHAN_FRAME,   // # of rx frames dropped due to unmatched 1st frame
 977         IPW_ORD_STAT_RX_FRAG_AGEOUT,    // # of rx frames dropped due to uncompleted frame
 978         IPW_ORD_STAT_RX_BAD_SSID,       //NS // Bad SSID (unused)
 979         IPW_ORD_STAT_RX_ICV_ERRORS,     // # of ICV errors during decryption
 980
 981 // PSP Statistics
 982         IPW_ORD_STAT_PSP_SUSPENSION = 137,      // # of times adapter suspended
 983         IPW_ORD_STAT_PSP_BCN_TIMEOUT,   // # of beacon timeout
 984         IPW_ORD_STAT_PSP_POLL_TIMEOUT,  // # of poll response timeouts
 985         IPW_ORD_STAT_PSP_NONDIR_TIMEOUT,        // # of timeouts waiting for last broadcast/muticast pkt
 986         IPW_ORD_STAT_PSP_RX_DTIMS,      // # of PSP DTIMs received
 987         IPW_ORD_STAT_PSP_RX_TIMS,       // # of PSP TIMs received
 988         IPW_ORD_STAT_PSP_STATION_ID,    // PSP Station ID
 989
 990 // Association and roaming
 991         IPW_ORD_LAST_ASSN_TIME = 147,   // RTC time of last association
 992         IPW_ORD_STAT_PERCENT_MISSED_BCNS,       // current calculation of % missed beacons
 993         IPW_ORD_STAT_PERCENT_RETRIES,   // current calculation of % missed tx retries
 994         IPW_ORD_ASSOCIATED_AP_PTR,      // If associated, this is ptr to the associated
 995         // AP table entry. set to 0 if not associated
 996         IPW_ORD_AVAILABLE_AP_CNT,       // # of AP's described in the AP table
 997         IPW_ORD_AP_LIST_PTR,    // Ptr to list of available APs
 998         IPW_ORD_STAT_AP_ASSNS,  // # of associations
 999         IPW_ORD_STAT_ASSN_FAIL, // # of association failures
1000         IPW_ORD_STAT_ASSN_RESP_FAIL,    // # of failuresdue to response fail
1001         IPW_ORD_STAT_FULL_SCANS,        // # of full scans
1002
1003         IPW_ORD_CARD_DISABLED,  // # Card Disabled
1004         IPW_ORD_STAT_ROAM_INHIBIT,      // # of times roaming was inhibited due to ongoing activity
1005         IPW_FILLER_40,
1006         IPW_ORD_RSSI_AT_ASSN = 160,     // RSSI of associated AP at time of association
1007         IPW_ORD_STAT_ASSN_CAUSE1,       // # of reassociations due to no tx from AP in last N
1008         // hops or no prob_ responses in last 3 minutes
1009         IPW_ORD_STAT_ASSN_CAUSE2,       // # of reassociations due to poor tx/rx quality
1010         IPW_ORD_STAT_ASSN_CAUSE3,       // # of reassociations due to tx/rx quality with excessive
1011         // load at the AP
1012         IPW_ORD_STAT_ASSN_CAUSE4,       // # of reassociations due to AP RSSI level fell below
1013         // eligible group
1014         IPW_ORD_STAT_ASSN_CAUSE5,       // # of reassociations due to load leveling
1015         IPW_ORD_STAT_ASSN_CAUSE6,       //NS // # of reassociations due to dropped by Ap
1016         IPW_FILLER_41,
1017         IPW_FILLER_42,
1018         IPW_FILLER_43,
1019         IPW_ORD_STAT_AUTH_FAIL, // # of times authentication failed
1020         IPW_ORD_STAT_AUTH_RESP_FAIL,    // # of times authentication response failed
1021         IPW_ORD_STATION_TABLE_CNT,      // # of entries in association table
1022
1023 // Other statistics
1024         IPW_ORD_RSSI_AVG_CURR = 173,    // Current avg RSSI
1025         IPW_ORD_STEST_RESULTS_CURR,     //NS // Current self test results word
1026         IPW_ORD_STEST_RESULTS_CUM,      //NS // Cummulative self test results word
1027         IPW_ORD_SELF_TEST_STATUS,       //NS //
1028         IPW_ORD_POWER_MGMT_MODE,        // Power mode - 0=CAM, 1=PSP
1029         IPW_ORD_POWER_MGMT_INDEX,       //NS //
1030         IPW_ORD_COUNTRY_CODE,   // IEEE country code as recv'd from beacon
1031         IPW_ORD_COUNTRY_CHANNELS,       // channels supported by country
1032 // IPW_ORD_COUNTRY_CHANNELS:
1033 // For 11b the lower 2-byte are used for channels from 1-14
1034 //   and the higher 2-byte are not used.
1035         IPW_ORD_RESET_CNT,      // # of adapter resets (warm)
1036         IPW_ORD_BEACON_INTERVAL,        // Beacon interval
1037
1038         IPW_ORD_PRINCETON_VERSION = 184,        //NS // Princeton Version
1039         IPW_ORD_ANTENNA_DIVERSITY,      // TRUE if antenna diversity is disabled
1040         IPW_ORD_CCA_RSSI,       //NS // CCA RSSI value (factory programmed)
1041         IPW_ORD_STAT_EEPROM_UPDATE,     //NS // # of times config EEPROM updated
1042         IPW_ORD_DTIM_PERIOD,    // # of beacon intervals between DTIMs
1043         IPW_ORD_OUR_FREQ,       // current radio freq lower digits - channel ID
1044
1045         IPW_ORD_RTC_TIME = 190, // current RTC time
1046         IPW_ORD_PORT_TYPE,      // operating mode
1047         IPW_ORD_CURRENT_TX_RATE,        // current tx rate
1048         IPW_ORD_SUPPORTED_RATES,        // Bitmap of supported tx rates
1049         IPW_ORD_ATIM_WINDOW,    // current ATIM Window
1050         IPW_ORD_BASIC_RATES,    // bitmap of basic tx rates
1051         IPW_ORD_NIC_HIGHEST_RATE,       // bitmap of basic tx rates
1052         IPW_ORD_AP_HIGHEST_RATE,        // bitmap of basic tx rates
1053         IPW_ORD_CAPABILITIES,   // Management frame capability field
1054         IPW_ORD_AUTH_TYPE,      // Type of authentication
1055         IPW_ORD_RADIO_TYPE,     // Adapter card platform type
1056         IPW_ORD_RTS_THRESHOLD = 201,    // Min length of packet after which RTS handshaking is used
1057         IPW_ORD_INT_MODE,       // International mode
1058         IPW_ORD_FRAGMENTATION_THRESHOLD,        // protocol frag threshold
1059         IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS,     // EEPROM offset in SRAM
1060         IPW_ORD_EEPROM_SRAM_DB_BLOCK_SIZE,      // EEPROM size in SRAM
1061         IPW_ORD_EEPROM_SKU_CAPABILITY,  // EEPROM SKU Capability    206 =
1062         IPW_ORD_EEPROM_IBSS_11B_CHANNELS,       // EEPROM IBSS 11b channel set
1063
1064         IPW_ORD_MAC_VERSION = 209,      // MAC Version
1065         IPW_ORD_MAC_REVISION,   // MAC Revision
1066         IPW_ORD_RADIO_VERSION,  // Radio Version
1067         IPW_ORD_NIC_MANF_DATE_TIME,     // MANF Date/Time STAMP
1068         IPW_ORD_UCODE_VERSION,  // Ucode Version
1069         IPW_ORD_HW_RF_SWITCH_STATE = 214,       // HW RF Kill Switch State
1070 } ORDINALTABLE1;
1071
1072 // ordinal table 2
1073 // Variable length data:
1074 #define IPW_FIRST_VARIABLE_LENGTH_ORDINAL   1001
1075
1076 typedef enum _ORDINAL_TABLE_2 { // NS - means Not Supported by FW
1077         IPW_ORD_STAT_BASE = 1000,       // contains number of variable ORDs
1078         IPW_ORD_STAT_ADAPTER_MAC = 1001,        // 6 bytes: our adapter MAC address
1079         IPW_ORD_STAT_PREFERRED_BSSID = 1002,    // 6 bytes: BSSID of the preferred AP
1080         IPW_ORD_STAT_MANDATORY_BSSID = 1003,    // 6 bytes: BSSID of the mandatory AP
1081         IPW_FILL_1,             //NS //
1082         IPW_ORD_STAT_COUNTRY_TEXT = 1005,       // 36 bytes: Country name text, First two bytes are Country code
1083         IPW_ORD_STAT_ASSN_SSID = 1006,  // 32 bytes: ESSID String
1084         IPW_ORD_STATION_TABLE = 1007,   // ? bytes: Station/AP table (via Direct SSID Scans)
1085         IPW_ORD_STAT_SWEEP_TABLE = 1008,        // ? bytes: Sweep/Host Table table (via Broadcast Scans)
1086         IPW_ORD_STAT_ROAM_LOG = 1009,   // ? bytes: Roaming log
1087         IPW_ORD_STAT_RATE_LOG = 1010,   //NS // 0 bytes: Rate log
1088         IPW_ORD_STAT_FIFO = 1011,       //NS // 0 bytes: Fifo buffer data structures
1089         IPW_ORD_STAT_FW_VER_NUM = 1012, // 14 bytes: fw version ID string as in (a.bb.ccc; "0.08.011")
1090         IPW_ORD_STAT_FW_DATE = 1013,    // 14 bytes: fw date string (mmm dd yyyy; "Mar 13 2002")
1091         IPW_ORD_STAT_ASSN_AP_BSSID = 1014,      // 6 bytes: MAC address of associated AP
1092         IPW_ORD_STAT_DEBUG = 1015,      //NS // ? bytes:
1093         IPW_ORD_STAT_NIC_BPA_NUM = 1016,        // 11 bytes: NIC BPA number in ASCII
1094         IPW_ORD_STAT_UCODE_DATE = 1017, // 5 bytes: uCode date
1095         IPW_ORD_SECURITY_NGOTIATION_RESULT = 1018,
1096 } ORDINALTABLE2;                // NS - means Not Supported by FW
1097
1098 #define IPW_LAST_VARIABLE_LENGTH_ORDINAL   1018
1099
1100 #ifndef WIRELESS_SPY
1101 #define WIRELESS_SPY            // enable iwspy support
1102 #endif
1103
1104 #define IPW_HOST_FW_SHARED_AREA0        0x0002f200
1105 #define IPW_HOST_FW_SHARED_AREA0_END    0x0002f510      // 0x310 bytes
1106
1107 #define IPW_HOST_FW_SHARED_AREA1        0x0002f610
1108 #define IPW_HOST_FW_SHARED_AREA1_END    0x0002f630      // 0x20 bytes
1109
1110 #define IPW_HOST_FW_SHARED_AREA2        0x0002fa00
1111 #define IPW_HOST_FW_SHARED_AREA2_END    0x0002fa20      // 0x20 bytes
1112
1113 #define IPW_HOST_FW_SHARED_AREA3        0x0002fc00
1114 #define IPW_HOST_FW_SHARED_AREA3_END    0x0002fc10      // 0x10 bytes
1115
1116 #define IPW_HOST_FW_INTERRUPT_AREA      0x0002ff80
1117 #define IPW_HOST_FW_INTERRUPT_AREA_END  0x00030000      // 0x80 bytes
1118
1119 struct ipw2100_fw_chunk {
1120         unsigned char *buf;
1121         long len;
1122         long pos;
1123         struct list_head list;
1124 };
1125
1126 struct ipw2100_fw_chunk_set {
1127         const void *data;
1128         unsigned long size;
1129 };
1130
1131 struct ipw2100_fw {
1132         int version;
1133         struct ipw2100_fw_chunk_set fw;
1134         struct ipw2100_fw_chunk_set uc;
1135         const struct firmware *fw_entry;
1136 };
1137
1138 #define MAX_FW_VERSION_LEN 14
1139
1140 #endif                          /* _IPW2100_H */