drivers/net/wireless/intel/iwlwifi/iwl-config.h

   1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
   2 /*
   3  * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
   4  * Copyright (C) 2016-2017 Intel Deutschland GmbH
   5  * Copyright (C) 2018-2024 Intel Corporation
   6  */
   7 #ifndef __IWL_CONFIG_H__
   8 #define __IWL_CONFIG_H__
   9
  10 #include <linux/types.h>
  11 #include <linux/netdevice.h>
  12 #include <linux/ieee80211.h>
  13 #include <linux/nl80211.h>
  14 #include <linux/mod_devicetable.h>
  15 #include "iwl-csr.h"
  16 #include "iwl-drv.h"
  17
  18 enum iwl_device_family {
  19         IWL_DEVICE_FAMILY_UNDEFINED,
  20         IWL_DEVICE_FAMILY_1000,
  21         IWL_DEVICE_FAMILY_100,
  22         IWL_DEVICE_FAMILY_2000,
  23         IWL_DEVICE_FAMILY_2030,
  24         IWL_DEVICE_FAMILY_105,
  25         IWL_DEVICE_FAMILY_135,
  26         IWL_DEVICE_FAMILY_5000,
  27         IWL_DEVICE_FAMILY_5150,
  28         IWL_DEVICE_FAMILY_6000,
  29         IWL_DEVICE_FAMILY_6000i,
  30         IWL_DEVICE_FAMILY_6005,
  31         IWL_DEVICE_FAMILY_6030,
  32         IWL_DEVICE_FAMILY_6050,
  33         IWL_DEVICE_FAMILY_6150,
  34         IWL_DEVICE_FAMILY_7000,
  35         IWL_DEVICE_FAMILY_8000,
  36         IWL_DEVICE_FAMILY_9000,
  37         IWL_DEVICE_FAMILY_22000,
  38         IWL_DEVICE_FAMILY_AX210,
  39         IWL_DEVICE_FAMILY_BZ,
  40         IWL_DEVICE_FAMILY_SC,
  41 };
  42
  43 /*
  44  * LED mode
  45  *    IWL_LED_DEFAULT:  use device default
  46  *    IWL_LED_RF_STATE: turn LED on/off based on RF state
  47  *                      LED ON  = RF ON
  48  *                      LED OFF = RF OFF
  49  *    IWL_LED_BLINK:    adjust led blink rate based on blink table
  50  *    IWL_LED_DISABLE:  led disabled
  51  */
  52 enum iwl_led_mode {
  53         IWL_LED_DEFAULT,
  54         IWL_LED_RF_STATE,
  55         IWL_LED_BLINK,
  56         IWL_LED_DISABLE,
  57 };
  58
  59 /**
  60  * enum iwl_nvm_type - nvm formats
  61  * @IWL_NVM: the regular format
  62  * @IWL_NVM_EXT: extended NVM format
  63  * @IWL_NVM_SDP: NVM format used by 3168 series
  64  */
  65 enum iwl_nvm_type {
  66         IWL_NVM,
  67         IWL_NVM_EXT,
  68         IWL_NVM_SDP,
  69 };
  70
  71 /*
  72  * This is the threshold value of plcp error rate per 100mSecs.  It is
  73  * used to set and check for the validity of plcp_delta.
  74  */
  75 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN          1
  76 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF          50
  77 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF     100
  78 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF 200
  79 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX          255
  80 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE      0
  81
  82 /* TX queue watchdog timeouts in mSecs */
  83 #define IWL_WATCHDOG_DISABLED   0
  84 #define IWL_DEF_WD_TIMEOUT      2500
  85 #define IWL_LONG_WD_TIMEOUT     10000
  86 #define IWL_MAX_WD_TIMEOUT      120000
  87
  88 #define IWL_DEFAULT_MAX_TX_POWER 22
  89 #define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\
  90                                  NETIF_F_TSO | NETIF_F_TSO6)
  91 #define IWL_CSUM_NETIF_FLAGS_MASK (IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM)
  92
  93 /* Antenna presence definitions */
  94 #define ANT_NONE        0x0
  95 #define ANT_INVALID     0xff
  96 #define ANT_A           BIT(0)
  97 #define ANT_B           BIT(1)
  98 #define ANT_C           BIT(2)
  99 #define ANT_AB          (ANT_A | ANT_B)
 100 #define ANT_AC          (ANT_A | ANT_C)
 101 #define ANT_BC          (ANT_B | ANT_C)
 102 #define ANT_ABC         (ANT_A | ANT_B | ANT_C)
 103
 104
 105 static inline u8 num_of_ant(u8 mask)
 106 {
 107         return  !!((mask) & ANT_A) +
 108                 !!((mask) & ANT_B) +
 109                 !!((mask) & ANT_C);
 110 }
 111
 112 /**
 113  * struct iwl_base_params - params not likely to change within a device family
 114  * @max_ll_items: max number of OTP blocks
 115  * @shadow_ram_support: shadow support for OTP memory
 116  * @led_compensation: compensate on the led on/off time per HW according
 117  *      to the deviation to achieve the desired led frequency.
 118  *      The detail algorithm is described in iwl-led.c
 119  * @wd_timeout: TX queues watchdog timeout
 120  * @max_event_log_size: size of event log buffer size for ucode event logging
 121  * @shadow_reg_enable: HW shadow register support
 122  * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command
 123  *      is in flight. This is due to a HW bug in 7260, 3160 and 7265.
 124  * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled.
 125  * @max_tfd_queue_size: max number of entries in tfd queue.
 126  */
 127 struct iwl_base_params {
 128         unsigned int wd_timeout;
 129
 130         u16 eeprom_size;
 131         u16 max_event_log_size;
 132
 133         u8 pll_cfg:1, /* for iwl_pcie_apm_init() */
 134            shadow_ram_support:1,
 135            shadow_reg_enable:1,
 136            pcie_l1_allowed:1,
 137            apmg_wake_up_wa:1,
 138            scd_chain_ext_wa:1;
 139
 140         u16 num_of_queues;      /* def: HW dependent */
 141         u32 max_tfd_queue_size; /* def: HW dependent */
 142
 143         u8 max_ll_items;
 144         u8 led_compensation;
 145 };
 146
 147 /*
 148  * @stbc: support Tx STBC and 1*SS Rx STBC
 149  * @ldpc: support Tx/Rx with LDPC
 150  * @use_rts_for_aggregation: use rts/cts protection for HT traffic
 151  * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40
 152  */
 153 struct iwl_ht_params {
 154         u8 ht_greenfield_support:1,
 155            stbc:1,
 156            ldpc:1,
 157            use_rts_for_aggregation:1;
 158         u8 ht40_bands;
 159 };
 160
 161 /*
 162  * Tx-backoff threshold
 163  * @temperature: The threshold in Celsius
 164  * @backoff: The tx-backoff in uSec
 165  */
 166 struct iwl_tt_tx_backoff {
 167         s32 temperature;
 168         u32 backoff;
 169 };
 170
 171 #define TT_TX_BACKOFF_SIZE 6
 172
 173 /**
 174  * struct iwl_tt_params - thermal throttling parameters
 175  * @ct_kill_entry: CT Kill entry threshold
 176  * @ct_kill_exit: CT Kill exit threshold
 177  * @ct_kill_duration: The time  intervals (in uSec) in which the driver needs
 178  *      to checks whether to exit CT Kill.
 179  * @dynamic_smps_entry: Dynamic SMPS entry threshold
 180  * @dynamic_smps_exit: Dynamic SMPS exit threshold
 181  * @tx_protection_entry: TX protection entry threshold
 182  * @tx_protection_exit: TX protection exit threshold
 183  * @tx_backoff: Array of thresholds for tx-backoff , in ascending order.
 184  * @support_ct_kill: Support CT Kill?
 185  * @support_dynamic_smps: Support dynamic SMPS?
 186  * @support_tx_protection: Support tx protection?
 187  * @support_tx_backoff: Support tx-backoff?
 188  */
 189 struct iwl_tt_params {
 190         u32 ct_kill_entry;
 191         u32 ct_kill_exit;
 192         u32 ct_kill_duration;
 193         u32 dynamic_smps_entry;
 194         u32 dynamic_smps_exit;
 195         u32 tx_protection_entry;
 196         u32 tx_protection_exit;
 197         struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE];
 198         u8 support_ct_kill:1,
 199            support_dynamic_smps:1,
 200            support_tx_protection:1,
 201            support_tx_backoff:1;
 202 };
 203
 204 /*
 205  * information on how to parse the EEPROM
 206  */
 207 #define EEPROM_REG_BAND_1_CHANNELS              0x08
 208 #define EEPROM_REG_BAND_2_CHANNELS              0x26
 209 #define EEPROM_REG_BAND_3_CHANNELS              0x42
 210 #define EEPROM_REG_BAND_4_CHANNELS              0x5C
 211 #define EEPROM_REG_BAND_5_CHANNELS              0x74
 212 #define EEPROM_REG_BAND_24_HT40_CHANNELS        0x82
 213 #define EEPROM_REG_BAND_52_HT40_CHANNELS        0x92
 214 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS   0x80
 215 #define EEPROM_REGULATORY_BAND_NO_HT40          0
 216
 217 /* lower blocks contain EEPROM image and calibration data */
 218 #define OTP_LOW_IMAGE_SIZE_2K           (2 * 512 * sizeof(u16))  /*  2 KB */
 219 #define OTP_LOW_IMAGE_SIZE_16K          (16 * 512 * sizeof(u16)) /* 16 KB */
 220 #define OTP_LOW_IMAGE_SIZE_32K          (32 * 512 * sizeof(u16)) /* 32 KB */
 221
 222 struct iwl_eeprom_params {
 223         const u8 regulatory_bands[7];
 224         bool enhanced_txpower;
 225 };
 226
 227 /* Tx-backoff power threshold
 228  * @pwr: The power limit in mw
 229  * @backoff: The tx-backoff in uSec
 230  */
 231 struct iwl_pwr_tx_backoff {
 232         u32 pwr;
 233         u32 backoff;
 234 };
 235
 236 enum iwl_cfg_trans_ltr_delay {
 237         IWL_CFG_TRANS_LTR_DELAY_NONE    = 0,
 238         IWL_CFG_TRANS_LTR_DELAY_200US   = 1,
 239         IWL_CFG_TRANS_LTR_DELAY_2500US  = 2,
 240         IWL_CFG_TRANS_LTR_DELAY_1820US  = 3,
 241 };
 242
 243 /**
 244  * struct iwl_cfg_trans_params - information needed to start the trans
 245  *
 246  * These values are specific to the device ID and do not change when
 247  * multiple configs are used for a single device ID.  They values are
 248  * used, among other things, to boot the NIC so that the HW REV or
 249  * RFID can be read before deciding the remaining parameters to use.
 250  *
 251  * @base_params: pointer to basic parameters
 252  * @device_family: the device family
 253  * @umac_prph_offset: offset to add to UMAC periphery address
 254  * @xtal_latency: power up latency to get the xtal stabilized
 255  * @extra_phy_cfg_flags: extra configuration flags to pass to the PHY
 256  * @rf_id: need to read rf_id to determine the firmware image
 257  * @gen2: 22000 and on transport operation
 258  * @mq_rx_supported: multi-queue rx support
 259  * @integrated: discrete or integrated
 260  * @low_latency_xtal: use the low latency xtal if supported
 261  * @bisr_workaround: BISR hardware workaround (for 22260 series devices)
 262  * @ltr_delay: LTR delay parameter, &enum iwl_cfg_trans_ltr_delay.
 263  * @imr_enabled: use the IMR if supported.
 264  */
 265 struct iwl_cfg_trans_params {
 266         const struct iwl_base_params *base_params;
 267         enum iwl_device_family device_family;
 268         u32 umac_prph_offset;
 269         u32 xtal_latency;
 270         u32 extra_phy_cfg_flags;
 271         u32 rf_id:1,
 272             gen2:1,
 273             mq_rx_supported:1,
 274             integrated:1,
 275             low_latency_xtal:1,
 276             bisr_workaround:1,
 277             ltr_delay:2,
 278             imr_enabled:1;
 279 };
 280
 281 /**
 282  * struct iwl_fw_mon_reg - FW monitor register info
 283  * @addr: register address
 284  * @mask: register mask
 285  */
 286 struct iwl_fw_mon_reg {
 287         u32 addr;
 288         u32 mask;
 289 };
 290
 291 /**
 292  * struct iwl_fw_mon_regs - FW monitor registers
 293  * @write_ptr: write pointer register
 294  * @cycle_cnt: cycle count register
 295  * @cur_frag: current fragment in use
 296  */
 297 struct iwl_fw_mon_regs {
 298         struct iwl_fw_mon_reg write_ptr;
 299         struct iwl_fw_mon_reg cycle_cnt;
 300         struct iwl_fw_mon_reg cur_frag;
 301 };
 302
 303 /**
 304  * struct iwl_cfg
 305  * @trans: the trans-specific configuration part
 306  * @name: Official name of the device
 307  * @fw_name_pre: Firmware filename prefix. The api version and extension
 308  *      (.ucode) will be added to filename before loading from disk. The
 309  *      filename is constructed as <fw_name_pre>-<api>.ucode.
 310  * @fw_name_mac: MAC name for this config, the remaining pieces of the
 311  *      name will be generated dynamically
 312  * @ucode_api_max: Highest version of uCode API supported by driver.
 313  * @ucode_api_min: Lowest version of uCode API supported by driver.
 314  * @max_inst_size: The maximal length of the fw inst section (only DVM)
 315  * @max_data_size: The maximal length of the fw data section (only DVM)
 316  * @valid_tx_ant: valid transmit antenna
 317  * @valid_rx_ant: valid receive antenna
 318  * @non_shared_ant: the antenna that is for WiFi only
 319  * @nvm_ver: NVM version
 320  * @nvm_calib_ver: NVM calibration version
 321  * @ht_params: point to ht parameters
 322  * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
 323  * @rx_with_siso_diversity: 1x1 device with rx antenna diversity
 324  * @tx_with_siso_diversity: 1x1 device with tx antenna diversity
 325  * @internal_wimax_coex: internal wifi/wimax combo device
 326  * @high_temp: Is this NIC is designated to be in high temperature.
 327  * @host_interrupt_operation_mode: device needs host interrupt operation
 328  *      mode set
 329  * @nvm_hw_section_num: the ID of the HW NVM section
 330  * @mac_addr_from_csr: read HW address from CSR registers at this offset
 331  * @features: hw features, any combination of feature_passlist
 332  * @pwr_tx_backoffs: translation table between power limits and backoffs
 333  * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response
 334  * @dccm_offset: offset from which DCCM begins
 335  * @dccm_len: length of DCCM (including runtime stack CCM)
 336  * @dccm2_offset: offset from which the second DCCM begins
 337  * @dccm2_len: length of the second DCCM
 338  * @smem_offset: offset from which the SMEM begins
 339  * @smem_len: the length of SMEM
 340  * @vht_mu_mimo_supported: VHT MU-MIMO support
 341  * @cdb: CDB support
 342  * @nvm_type: see &enum iwl_nvm_type
 343  * @d3_debug_data_base_addr: base address where D3 debug data is stored
 344  * @d3_debug_data_length: length of the D3 debug data
 345  * @min_txq_size: minimum number of slots required in a TX queue
 346  * @uhb_supported: ultra high band channels supported
 347  * @min_ba_txq_size: minimum number of slots required in a TX queue which
 348  *      based on hardware support (HE - 256, EHT - 1K).
 349  * @num_rbds: number of receive buffer descriptors to use
 350  *      (only used for multi-queue capable devices)
 351  *
 352  * We enable the driver to be backward compatible wrt. hardware features.
 353  * API differences in uCode shouldn't be handled here but through TLVs
 354  * and/or the uCode API version instead.
 355  */
 356 struct iwl_cfg {
 357         struct iwl_cfg_trans_params trans;
 358         /* params specific to an individual device within a device family */
 359         const char *name;
 360         const char *fw_name_pre;
 361         const char *fw_name_mac;
 362         /* params likely to change within a device family */
 363         const struct iwl_ht_params *ht_params;
 364         const struct iwl_eeprom_params *eeprom_params;
 365         const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;
 366         const char *default_nvm_file_C_step;
 367         const struct iwl_tt_params *thermal_params;
 368         enum iwl_led_mode led_mode;
 369         enum iwl_nvm_type nvm_type;
 370         u32 max_data_size;
 371         u32 max_inst_size;
 372         netdev_features_t features;
 373         u32 dccm_offset;
 374         u32 dccm_len;
 375         u32 dccm2_offset;
 376         u32 dccm2_len;
 377         u32 smem_offset;
 378         u32 smem_len;
 379         u16 nvm_ver;
 380         u16 nvm_calib_ver;
 381         u32 rx_with_siso_diversity:1,
 382             tx_with_siso_diversity:1,
 383             internal_wimax_coex:1,
 384             host_interrupt_operation_mode:1,
 385             high_temp:1,
 386             mac_addr_from_csr:10,
 387             lp_xtal_workaround:1,
 388             apmg_not_supported:1,
 389             vht_mu_mimo_supported:1,
 390             cdb:1,
 391             dbgc_supported:1,
 392             uhb_supported:1;
 393         u8 valid_tx_ant;
 394         u8 valid_rx_ant;
 395         u8 non_shared_ant;
 396         u8 nvm_hw_section_num;
 397         u8 max_tx_agg_size;
 398         u8 ucode_api_max;
 399         u8 ucode_api_min;
 400         u16 num_rbds;
 401         u32 min_umac_error_event_table;
 402         u32 d3_debug_data_base_addr;
 403         u32 d3_debug_data_length;
 404         u32 min_txq_size;
 405         u32 gp2_reg_addr;
 406         u32 min_ba_txq_size;
 407         const struct iwl_fw_mon_regs mon_dram_regs;
 408         const struct iwl_fw_mon_regs mon_smem_regs;
 409         const struct iwl_fw_mon_regs mon_dbgi_regs;
 410 };
 411
 412 #define IWL_CFG_ANY (~0)
 413
 414 #define IWL_CFG_MAC_TYPE_PU             0x31
 415 #define IWL_CFG_MAC_TYPE_TH             0x32
 416 #define IWL_CFG_MAC_TYPE_QU             0x33
 417 #define IWL_CFG_MAC_TYPE_QUZ            0x35
 418 #define IWL_CFG_MAC_TYPE_SO             0x37
 419 #define IWL_CFG_MAC_TYPE_SOF            0x43
 420 #define IWL_CFG_MAC_TYPE_MA             0x44
 421 #define IWL_CFG_MAC_TYPE_BZ             0x46
 422 #define IWL_CFG_MAC_TYPE_GL             0x47
 423 #define IWL_CFG_MAC_TYPE_SC             0x48
 424 #define IWL_CFG_MAC_TYPE_SC2            0x49
 425 #define IWL_CFG_MAC_TYPE_SC2F           0x4A
 426 #define IWL_CFG_MAC_TYPE_BZ_W           0x4B
 427
 428 #define IWL_CFG_RF_TYPE_TH              0x105
 429 #define IWL_CFG_RF_TYPE_TH1             0x108
 430 #define IWL_CFG_RF_TYPE_JF2             0x105
 431 #define IWL_CFG_RF_TYPE_JF1             0x108
 432 #define IWL_CFG_RF_TYPE_HR2             0x10A
 433 #define IWL_CFG_RF_TYPE_HR1             0x10C
 434 #define IWL_CFG_RF_TYPE_GF              0x10D
 435 #define IWL_CFG_RF_TYPE_FM              0x112
 436 #define IWL_CFG_RF_TYPE_WH              0x113
 437
 438 #define IWL_CFG_RF_ID_TH                0x1
 439 #define IWL_CFG_RF_ID_TH1               0x1
 440 #define IWL_CFG_RF_ID_JF                0x3
 441 #define IWL_CFG_RF_ID_JF1               0x6
 442 #define IWL_CFG_RF_ID_JF1_DIV           0xA
 443 #define IWL_CFG_RF_ID_HR                0x7
 444 #define IWL_CFG_RF_ID_HR1               0x4
 445
 446 #define IWL_CFG_NO_160                  0x1
 447 #define IWL_CFG_160                     0x0
 448
 449 #define IWL_CFG_NO_320                  0x1
 450 #define IWL_CFG_320                     0x0
 451
 452 #define IWL_CFG_CORES_BT                0x0
 453 #define IWL_CFG_CORES_BT_GNSS           0x5
 454
 455 #define IWL_CFG_NO_CDB                  0x0
 456 #define IWL_CFG_CDB                     0x1
 457
 458 #define IWL_CFG_NO_JACKET               0x0
 459 #define IWL_CFG_IS_JACKET               0x1
 460
 461 #define IWL_SUBDEVICE_RF_ID(subdevice)  ((u16)((subdevice) & 0x00F0) >> 4)
 462 #define IWL_SUBDEVICE_NO_160(subdevice) ((u16)((subdevice) & 0x0200) >> 9)
 463 #define IWL_SUBDEVICE_CORES(subdevice)  ((u16)((subdevice) & 0x1C00) >> 10)
 464
 465 struct iwl_dev_info {
 466         u16 device;
 467         u16 subdevice;
 468         u16 mac_type;
 469         u16 rf_type;
 470         u8 mac_step;
 471         u8 rf_step;
 472         u8 rf_id;
 473         u8 no_160;
 474         u8 cores;
 475         u8 cdb;
 476         u8 jacket;
 477         const struct iwl_cfg *cfg;
 478         const char *name;
 479 };
 480
 481 #if IS_ENABLED(CONFIG_IWLWIFI_KUNIT_TESTS)
 482 extern const struct iwl_dev_info iwl_dev_info_table[];
 483 extern const unsigned int iwl_dev_info_table_size;
 484 const struct iwl_dev_info *
 485 iwl_pci_find_dev_info(u16 device, u16 subsystem_device,
 486                       u16 mac_type, u8 mac_step, u16 rf_type, u8 cdb,
 487                       u8 jacket, u8 rf_id, u8 no_160, u8 cores, u8 rf_step);
 488 extern const struct pci_device_id iwl_hw_card_ids[];
 489 #endif
 490
 491 /*
 492  * This list declares the config structures for all devices.
 493  */
 494 extern const struct iwl_cfg_trans_params iwl9000_trans_cfg;
 495 extern const struct iwl_cfg_trans_params iwl9560_trans_cfg;
 496 extern const struct iwl_cfg_trans_params iwl9560_long_latency_trans_cfg;
 497 extern const struct iwl_cfg_trans_params iwl9560_shared_clk_trans_cfg;
 498 extern const struct iwl_cfg_trans_params iwl_qu_trans_cfg;
 499 extern const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg;
 500 extern const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg;
 501 extern const struct iwl_cfg_trans_params iwl_ax200_trans_cfg;
 502 extern const struct iwl_cfg_trans_params iwl_so_trans_cfg;
 503 extern const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg;
 504 extern const struct iwl_cfg_trans_params iwl_so_long_latency_imr_trans_cfg;
 505 extern const struct iwl_cfg_trans_params iwl_ma_trans_cfg;
 506 extern const struct iwl_cfg_trans_params iwl_bz_trans_cfg;
 507 extern const struct iwl_cfg_trans_params iwl_gl_trans_cfg;
 508 extern const struct iwl_cfg_trans_params iwl_sc_trans_cfg;
 509 extern const char iwl9162_name[];
 510 extern const char iwl9260_name[];
 511 extern const char iwl9260_1_name[];
 512 extern const char iwl9270_name[];
 513 extern const char iwl9461_name[];
 514 extern const char iwl9462_name[];
 515 extern const char iwl9560_name[];
 516 extern const char iwl9162_160_name[];
 517 extern const char iwl9260_160_name[];
 518 extern const char iwl9270_160_name[];
 519 extern const char iwl9461_160_name[];
 520 extern const char iwl9462_160_name[];
 521 extern const char iwl9560_160_name[];
 522 extern const char iwl9260_killer_1550_name[];
 523 extern const char iwl9560_killer_1550i_name[];
 524 extern const char iwl9560_killer_1550s_name[];
 525 extern const char iwl_ax200_name[];
 526 extern const char iwl_ax203_name[];
 527 extern const char iwl_ax204_name[];
 528 extern const char iwl_ax201_name[];
 529 extern const char iwl_ax101_name[];
 530 extern const char iwl_ax200_killer_1650w_name[];
 531 extern const char iwl_ax200_killer_1650x_name[];
 532 extern const char iwl_ax201_killer_1650s_name[];
 533 extern const char iwl_ax201_killer_1650i_name[];
 534 extern const char iwl_ax210_killer_1675w_name[];
 535 extern const char iwl_ax210_killer_1675x_name[];
 536 extern const char iwl9560_killer_1550i_160_name[];
 537 extern const char iwl9560_killer_1550s_160_name[];
 538 extern const char iwl_ax211_killer_1675s_name[];
 539 extern const char iwl_ax211_killer_1675i_name[];
 540 extern const char iwl_ax411_killer_1690s_name[];
 541 extern const char iwl_ax411_killer_1690i_name[];
 542 extern const char iwl_ax211_name[];
 543 extern const char iwl_ax221_name[];
 544 extern const char iwl_ax231_name[];
 545 extern const char iwl_ax411_name[];
 546 extern const char iwl_bz_name[];
 547 extern const char iwl_fm_name[];
 548 extern const char iwl_gl_name[];
 549 extern const char iwl_mtp_name[];
 550 extern const char iwl_sc_name[];
 551 extern const char iwl_sc2_name[];
 552 extern const char iwl_sc2f_name[];
 553 #if IS_ENABLED(CONFIG_IWLDVM)
 554 extern const struct iwl_cfg iwl5300_agn_cfg;
 555 extern const struct iwl_cfg iwl5100_agn_cfg;
 556 extern const struct iwl_cfg iwl5350_agn_cfg;
 557 extern const struct iwl_cfg iwl5100_bgn_cfg;
 558 extern const struct iwl_cfg iwl5100_abg_cfg;
 559 extern const struct iwl_cfg iwl5150_agn_cfg;
 560 extern const struct iwl_cfg iwl5150_abg_cfg;
 561 extern const struct iwl_cfg iwl6005_2agn_cfg;
 562 extern const struct iwl_cfg iwl6005_2abg_cfg;
 563 extern const struct iwl_cfg iwl6005_2bg_cfg;
 564 extern const struct iwl_cfg iwl6005_2agn_sff_cfg;
 565 extern const struct iwl_cfg iwl6005_2agn_d_cfg;
 566 extern const struct iwl_cfg iwl6005_2agn_mow1_cfg;
 567 extern const struct iwl_cfg iwl6005_2agn_mow2_cfg;
 568 extern const struct iwl_cfg iwl1030_bgn_cfg;
 569 extern const struct iwl_cfg iwl1030_bg_cfg;
 570 extern const struct iwl_cfg iwl6030_2agn_cfg;
 571 extern const struct iwl_cfg iwl6030_2abg_cfg;
 572 extern const struct iwl_cfg iwl6030_2bgn_cfg;
 573 extern const struct iwl_cfg iwl6030_2bg_cfg;
 574 extern const struct iwl_cfg iwl6000i_2agn_cfg;
 575 extern const struct iwl_cfg iwl6000i_2abg_cfg;
 576 extern const struct iwl_cfg iwl6000i_2bg_cfg;
 577 extern const struct iwl_cfg iwl6000_3agn_cfg;
 578 extern const struct iwl_cfg iwl6050_2agn_cfg;
 579 extern const struct iwl_cfg iwl6050_2abg_cfg;
 580 extern const struct iwl_cfg iwl6150_bgn_cfg;
 581 extern const struct iwl_cfg iwl6150_bg_cfg;
 582 extern const struct iwl_cfg iwl1000_bgn_cfg;
 583 extern const struct iwl_cfg iwl1000_bg_cfg;
 584 extern const struct iwl_cfg iwl100_bgn_cfg;
 585 extern const struct iwl_cfg iwl100_bg_cfg;
 586 extern const struct iwl_cfg iwl130_bgn_cfg;
 587 extern const struct iwl_cfg iwl130_bg_cfg;
 588 extern const struct iwl_cfg iwl2000_2bgn_cfg;
 589 extern const struct iwl_cfg iwl2000_2bgn_d_cfg;
 590 extern const struct iwl_cfg iwl2030_2bgn_cfg;
 591 extern const struct iwl_cfg iwl6035_2agn_cfg;
 592 extern const struct iwl_cfg iwl6035_2agn_sff_cfg;
 593 extern const struct iwl_cfg iwl105_bgn_cfg;
 594 extern const struct iwl_cfg iwl105_bgn_d_cfg;
 595 extern const struct iwl_cfg iwl135_bgn_cfg;
 596 #endif /* CONFIG_IWLDVM */
 597 #if IS_ENABLED(CONFIG_IWLMVM)
 598 extern const struct iwl_ht_params iwl_22000_ht_params;
 599 extern const struct iwl_cfg iwl7260_2ac_cfg;
 600 extern const struct iwl_cfg iwl7260_2ac_cfg_high_temp;
 601 extern const struct iwl_cfg iwl7260_2n_cfg;
 602 extern const struct iwl_cfg iwl7260_n_cfg;
 603 extern const struct iwl_cfg iwl3160_2ac_cfg;
 604 extern const struct iwl_cfg iwl3160_2n_cfg;
 605 extern const struct iwl_cfg iwl3160_n_cfg;
 606 extern const struct iwl_cfg iwl3165_2ac_cfg;
 607 extern const struct iwl_cfg iwl3168_2ac_cfg;
 608 extern const struct iwl_cfg iwl7265_2ac_cfg;
 609 extern const struct iwl_cfg iwl7265_2n_cfg;
 610 extern const struct iwl_cfg iwl7265_n_cfg;
 611 extern const struct iwl_cfg iwl7265d_2ac_cfg;
 612 extern const struct iwl_cfg iwl7265d_2n_cfg;
 613 extern const struct iwl_cfg iwl7265d_n_cfg;
 614 extern const struct iwl_cfg iwl8260_2n_cfg;
 615 extern const struct iwl_cfg iwl8260_2ac_cfg;
 616 extern const struct iwl_cfg iwl8265_2ac_cfg;
 617 extern const struct iwl_cfg iwl8275_2ac_cfg;
 618 extern const struct iwl_cfg iwl4165_2ac_cfg;
 619 extern const struct iwl_cfg iwl9260_2ac_cfg;
 620 extern const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg;
 621 extern const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg;
 622 extern const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg;
 623 extern const struct iwl_cfg iwl9560_2ac_cfg_soc;
 624 extern const struct iwl_cfg iwl_qu_b0_hr1_b0;
 625 extern const struct iwl_cfg iwl_qu_c0_hr1_b0;
 626 extern const struct iwl_cfg iwl_quz_a0_hr1_b0;
 627 extern const struct iwl_cfg iwl_qu_b0_hr_b0;
 628 extern const struct iwl_cfg iwl_qu_c0_hr_b0;
 629 extern const struct iwl_cfg iwl_ax200_cfg_cc;
 630 extern const struct iwl_cfg iwl_ax201_cfg_qu_hr;
 631 extern const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0;
 632 extern const struct iwl_cfg iwl_ax201_cfg_quz_hr;
 633 extern const struct iwl_cfg iwl_ax1650i_cfg_quz_hr;
 634 extern const struct iwl_cfg iwl_ax1650s_cfg_quz_hr;
 635 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0;
 636 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0;
 637 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0;
 638 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0;
 639 extern const struct iwl_cfg killer1650x_2ax_cfg;
 640 extern const struct iwl_cfg killer1650w_2ax_cfg;
 641 extern const struct iwl_cfg iwlax210_2ax_cfg_so_jf_b0;
 642 extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0;
 643 extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long;
 644 extern const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0;
 645 extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0;
 646 extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long;
 647
 648 extern const struct iwl_cfg iwl_cfg_ma;
 649
 650 extern const struct iwl_cfg iwl_cfg_so_a0_hr_a0;
 651 extern const struct iwl_cfg iwl_cfg_so_a0_ms_a0;
 652 extern const struct iwl_cfg iwl_cfg_quz_a0_hr_b0;
 653
 654 extern const struct iwl_cfg iwl_cfg_bz;
 655 extern const struct iwl_cfg iwl_cfg_gl;
 656
 657 extern const struct iwl_cfg iwl_cfg_sc;
 658 extern const struct iwl_cfg iwl_cfg_sc2;
 659 extern const struct iwl_cfg iwl_cfg_sc2f;
 660 #endif /* CONFIG_IWLMVM */
 661
 662 #endif /* __IWL_CONFIG_H__ */