1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Low-level parallel-support for PC-style hardware integrated in the
4 * LASI-Controller (on GSC-Bus) for HP-PARISC Workstations
6 * (C) 1999-2001 by Helge Deller <deller@gmx.de>
8 * based on parport_pc.c by
9 * Grant Guenther <grant@torque.net>
10 * Phil Blundell <philb@gnu.org>
11 * Tim Waugh <tim@cyberelk.demon.co.uk>
12 * Jose Renau <renau@acm.org>
17 #undef DEBUG /* undef for production */
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/errno.h>
23 #include <linux/interrupt.h>
24 #include <linux/ioport.h>
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/pci.h>
28 #include <linux/sysctl.h>
31 #include <linux/uaccess.h>
32 #include <asm/superio.h>
34 #include <linux/parport.h>
36 #include <asm/parisc-device.h>
37 #include <asm/hardware.h>
38 #include "parport_gsc.h"
41 MODULE_AUTHOR("Helge Deller <deller@gmx.de>");
42 MODULE_DESCRIPTION("HP-PARISC PC-style parallel port driver");
43 MODULE_LICENSE("GPL");
47 * Clear TIMEOUT BIT in EPP MODE
49 * This is also used in SPP detection.
51 static int clear_epp_timeout(struct parport
*pb
)
55 if (!(parport_gsc_read_status(pb
) & 0x01))
58 /* To clear timeout some chips require double read */
59 parport_gsc_read_status(pb
);
60 r
= parport_gsc_read_status(pb
);
61 parport_writeb (r
| 0x01, STATUS (pb
)); /* Some reset by writing 1 */
62 parport_writeb (r
& 0xfe, STATUS (pb
)); /* Others by writing 0 */
63 r
= parport_gsc_read_status(pb
);
71 * Most of these aren't static because they may be used by the
72 * parport_xxx_yyy macros. extern __inline__ versions of several
73 * of these are in parport_gsc.h.
76 void parport_gsc_init_state(struct pardevice
*dev
, struct parport_state
*s
)
78 s
->u
.pc
.ctr
= 0xc | (dev
->irq_func
? 0x10 : 0x0);
81 void parport_gsc_save_state(struct parport
*p
, struct parport_state
*s
)
83 s
->u
.pc
.ctr
= parport_readb (CONTROL (p
));
86 void parport_gsc_restore_state(struct parport
*p
, struct parport_state
*s
)
88 parport_writeb (s
->u
.pc
.ctr
, CONTROL (p
));
91 struct parport_operations parport_gsc_ops
=
93 .write_data
= parport_gsc_write_data
,
94 .read_data
= parport_gsc_read_data
,
96 .write_control
= parport_gsc_write_control
,
97 .read_control
= parport_gsc_read_control
,
98 .frob_control
= parport_gsc_frob_control
,
100 .read_status
= parport_gsc_read_status
,
102 .enable_irq
= parport_gsc_enable_irq
,
103 .disable_irq
= parport_gsc_disable_irq
,
105 .data_forward
= parport_gsc_data_forward
,
106 .data_reverse
= parport_gsc_data_reverse
,
108 .init_state
= parport_gsc_init_state
,
109 .save_state
= parport_gsc_save_state
,
110 .restore_state
= parport_gsc_restore_state
,
112 .epp_write_data
= parport_ieee1284_epp_write_data
,
113 .epp_read_data
= parport_ieee1284_epp_read_data
,
114 .epp_write_addr
= parport_ieee1284_epp_write_addr
,
115 .epp_read_addr
= parport_ieee1284_epp_read_addr
,
117 .ecp_write_data
= parport_ieee1284_ecp_write_data
,
118 .ecp_read_data
= parport_ieee1284_ecp_read_data
,
119 .ecp_write_addr
= parport_ieee1284_ecp_write_addr
,
121 .compat_write_data
= parport_ieee1284_write_compat
,
122 .nibble_read_data
= parport_ieee1284_read_nibble
,
123 .byte_read_data
= parport_ieee1284_read_byte
,
125 .owner
= THIS_MODULE
,
128 /* --- Mode detection ------------------------------------- */
131 * Checks for port existence, all ports support SPP MODE
133 static int parport_SPP_supported(struct parport
*pb
)
138 * first clear an eventually pending EPP timeout
139 * I (sailer@ife.ee.ethz.ch) have an SMSC chipset
140 * that does not even respond to SPP cycles if an EPP
143 clear_epp_timeout(pb
);
145 /* Do a simple read-write test to make sure the port exists. */
147 parport_writeb (w
, CONTROL (pb
));
149 /* Is there a control register that we can read from? Some
150 * ports don't allow reads, so read_control just returns a
151 * software copy. Some ports _do_ allow reads, so bypass the
152 * software copy here. In addition, some bits aren't
154 r
= parport_readb (CONTROL (pb
));
155 if ((r
& 0xf) == w
) {
157 parport_writeb (w
, CONTROL (pb
));
158 r
= parport_readb (CONTROL (pb
));
159 parport_writeb (0xc, CONTROL (pb
));
161 return PARPORT_MODE_PCSPP
;
164 /* Try the data register. The data lines aren't tri-stated at
165 * this stage, so we expect back what we wrote. */
167 parport_gsc_write_data (pb
, w
);
168 r
= parport_gsc_read_data (pb
);
171 parport_gsc_write_data (pb
, w
);
172 r
= parport_gsc_read_data (pb
);
174 return PARPORT_MODE_PCSPP
;
180 /* Detect PS/2 support.
182 * Bit 5 (0x20) sets the PS/2 data direction; setting this high
183 * allows us to read data from the data lines. In theory we would get back
184 * 0xff but any peripheral attached to the port may drag some or all of the
185 * lines down to zero. So if we get back anything that isn't the contents
186 * of the data register we deem PS/2 support to be present.
188 * Some SPP ports have "half PS/2" ability - you can't turn off the line
189 * drivers, but an external peripheral with sufficiently beefy drivers of
190 * its own can overpower them and assert its own levels onto the bus, from
191 * where they can then be read back as normal. Ports with this property
192 * and the right type of device attached are likely to fail the SPP test,
193 * (as they will appear to have stuck bits) and so the fact that they might
194 * be misdetected here is rather academic.
197 static int parport_PS2_supported(struct parport
*pb
)
201 clear_epp_timeout(pb
);
203 /* try to tri-state the buffer */
204 parport_gsc_data_reverse (pb
);
206 parport_gsc_write_data(pb
, 0x55);
207 if (parport_gsc_read_data(pb
) != 0x55) ok
++;
209 parport_gsc_write_data(pb
, 0xaa);
210 if (parport_gsc_read_data(pb
) != 0xaa) ok
++;
212 /* cancel input mode */
213 parport_gsc_data_forward (pb
);
216 pb
->modes
|= PARPORT_MODE_TRISTATE
;
218 struct parport_gsc_private
*priv
= pb
->private_data
;
219 priv
->ctr_writable
&= ~0x20;
226 /* --- Initialisation code -------------------------------- */
228 static struct parport
*parport_gsc_probe_port(unsigned long base
,
229 unsigned long base_hi
, int irq
,
230 struct parisc_device
*padev
)
232 struct parport_gsc_private
*priv
;
233 struct parport_operations
*ops
;
235 struct parport
*p
= &tmp
;
237 priv
= kzalloc (sizeof (struct parport_gsc_private
), GFP_KERNEL
);
239 printk(KERN_DEBUG
"parport (0x%lx): no memory!\n", base
);
242 ops
= kmemdup(&parport_gsc_ops
, sizeof(struct parport_operations
),
245 printk(KERN_DEBUG
"parport (0x%lx): no memory for ops!\n",
251 priv
->ctr_writable
= 0xff;
253 p
->base_hi
= base_hi
;
255 p
->modes
= PARPORT_MODE_PCSPP
| PARPORT_MODE_SAFEININT
;
257 p
->private_data
= priv
;
259 if (!parport_SPP_supported (p
)) {
265 parport_PS2_supported (p
);
267 if (!(p
= parport_register_port(base
, PARPORT_IRQ_NONE
,
268 PARPORT_DMA_NONE
, ops
))) {
274 p
->dev
= &padev
->dev
;
275 p
->base_hi
= base_hi
;
276 p
->modes
= tmp
.modes
;
277 p
->size
= (p
->modes
& PARPORT_MODE_EPP
)?8:3;
278 p
->private_data
= priv
;
280 pr_info("%s: PC-style at 0x%lx", p
->name
, p
->base
);
282 if (p
->irq
== PARPORT_IRQ_AUTO
) {
283 p
->irq
= PARPORT_IRQ_NONE
;
285 if (p
->irq
!= PARPORT_IRQ_NONE
)
286 pr_cont(", irq %d", p
->irq
);
289 #define printmode(x) \
291 if (p->modes & PARPORT_MODE_##x) \
292 pr_cont("%s%s", f++ ? "," : "", #x); \
306 if (p
->irq
!= PARPORT_IRQ_NONE
) {
307 if (request_irq (p
->irq
, parport_irq_handler
,
309 pr_warn("%s: irq %d in use, resorting to polled operation\n",
311 p
->irq
= PARPORT_IRQ_NONE
;
315 /* Done probing. Now put the port into a sensible start-up state. */
317 parport_gsc_write_data(p
, 0);
318 parport_gsc_data_forward (p
);
320 /* Now that we've told the sharing engine about the port, and
321 found out its characteristics, let the high-level drivers
323 parport_announce_port (p
);
329 #define PARPORT_GSC_OFFSET 0x800
331 static int parport_count
;
333 static int __init
parport_init_chip(struct parisc_device
*dev
)
339 pr_warn("IRQ not found for parallel device at 0x%llx\n",
340 (unsigned long long)dev
->hpa
.start
);
344 port
= dev
->hpa
.start
+ PARPORT_GSC_OFFSET
;
346 /* some older machines with ASP-chip don't support
347 * the enhanced parport modes.
349 if (boot_cpu_data
.cpu_type
> pcxt
&& !pdc_add_valid(port
+4)) {
351 /* Initialize bidirectional-mode (0x10) & data-tranfer-mode #1 (0x20) */
352 pr_info("%s: initialize bidirectional-mode\n", __func__
);
353 parport_writeb ( (0x10 + 0x20), port
+ 4);
356 pr_info("%s: enhanced parport-modes not supported\n", __func__
);
359 p
= parport_gsc_probe_port(port
, 0, dev
->irq
, dev
);
362 dev_set_drvdata(&dev
->dev
, p
);
367 static void __exit
parport_remove_chip(struct parisc_device
*dev
)
369 struct parport
*p
= dev_get_drvdata(&dev
->dev
);
371 struct parport_operations
*ops
= p
->ops
;
372 parport_remove_port(p
);
373 if (p
->irq
!= PARPORT_IRQ_NONE
)
375 kfree (p
->private_data
);
377 kfree (ops
); /* hope no-one cached it */
381 static const struct parisc_device_id parport_tbl
[] __initconst
= {
382 { HPHW_FIO
, HVERSION_REV_ANY_ID
, HVERSION_ANY_ID
, 0x74 },
386 MODULE_DEVICE_TABLE(parisc
, parport_tbl
);
388 static struct parisc_driver parport_driver __refdata
= {
390 .id_table
= parport_tbl
,
391 .probe
= parport_init_chip
,
392 .remove
= __exit_p(parport_remove_chip
),
395 static int parport_gsc_init(void)
397 return register_parisc_driver(&parport_driver
);
400 static void parport_gsc_exit(void)
402 unregister_parisc_driver(&parport_driver
);
405 module_init(parport_gsc_init
);
406 module_exit(parport_gsc_exit
);