drivers/pinctrl/nomadik/pinctrl-abx500.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) ST-Ericsson SA 2013
   4  *
   5  * Author: Patrice Chotard <patrice.chotard@st.com>
   6  *
   7  * Driver allows to use AxB5xx unused pins to be used as GPIO
   8  */
   9
  10 #include <linux/bitops.h>
  11 #include <linux/cleanup.h>
  12 #include <linux/err.h>
  13 #include <linux/gpio/driver.h>
  14 #include <linux/init.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/irq.h>
  17 #include <linux/irqdomain.h>
  18 #include <linux/kernel.h>
  19 #include <linux/of.h>
  20 #include <linux/of_device.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/property.h>
  23 #include <linux/seq_file.h>
  24 #include <linux/slab.h>
  25 #include <linux/types.h>
  26
  27 #include <linux/mfd/abx500.h>
  28 #include <linux/mfd/abx500/ab8500.h>
  29
  30 #include <linux/pinctrl/consumer.h>
  31 #include <linux/pinctrl/machine.h>
  32 #include <linux/pinctrl/pinconf-generic.h>
  33 #include <linux/pinctrl/pinconf.h>
  34 #include <linux/pinctrl/pinctrl.h>
  35 #include <linux/pinctrl/pinmux.h>
  36
  37 #include "../core.h"
  38 #include "../pinconf.h"
  39 #include "../pinctrl-utils.h"
  40
  41 #include "pinctrl-abx500.h"
  42
  43 /*
  44  * GPIO registers offset
  45  * Bank: 0x10
  46  */
  47 #define AB8500_GPIO_SEL1_REG    0x00
  48 #define AB8500_GPIO_SEL2_REG    0x01
  49 #define AB8500_GPIO_SEL3_REG    0x02
  50 #define AB8500_GPIO_SEL4_REG    0x03
  51 #define AB8500_GPIO_SEL5_REG    0x04
  52 #define AB8500_GPIO_SEL6_REG    0x05
  53
  54 #define AB8500_GPIO_DIR1_REG    0x10
  55 #define AB8500_GPIO_DIR2_REG    0x11
  56 #define AB8500_GPIO_DIR3_REG    0x12
  57 #define AB8500_GPIO_DIR4_REG    0x13
  58 #define AB8500_GPIO_DIR5_REG    0x14
  59 #define AB8500_GPIO_DIR6_REG    0x15
  60
  61 #define AB8500_GPIO_OUT1_REG    0x20
  62 #define AB8500_GPIO_OUT2_REG    0x21
  63 #define AB8500_GPIO_OUT3_REG    0x22
  64 #define AB8500_GPIO_OUT4_REG    0x23
  65 #define AB8500_GPIO_OUT5_REG    0x24
  66 #define AB8500_GPIO_OUT6_REG    0x25
  67
  68 #define AB8500_GPIO_PUD1_REG    0x30
  69 #define AB8500_GPIO_PUD2_REG    0x31
  70 #define AB8500_GPIO_PUD3_REG    0x32
  71 #define AB8500_GPIO_PUD4_REG    0x33
  72 #define AB8500_GPIO_PUD5_REG    0x34
  73 #define AB8500_GPIO_PUD6_REG    0x35
  74
  75 #define AB8500_GPIO_IN1_REG     0x40
  76 #define AB8500_GPIO_IN2_REG     0x41
  77 #define AB8500_GPIO_IN3_REG     0x42
  78 #define AB8500_GPIO_IN4_REG     0x43
  79 #define AB8500_GPIO_IN5_REG     0x44
  80 #define AB8500_GPIO_IN6_REG     0x45
  81 #define AB8500_GPIO_ALTFUN_REG  0x50
  82
  83 #define ABX500_GPIO_INPUT       0
  84 #define ABX500_GPIO_OUTPUT      1
  85
  86 struct abx500_pinctrl {
  87         struct device *dev;
  88         struct pinctrl_dev *pctldev;
  89         struct abx500_pinctrl_soc_data *soc;
  90         struct gpio_chip chip;
  91         struct ab8500 *parent;
  92         struct abx500_gpio_irq_cluster *irq_cluster;
  93         int irq_cluster_size;
  94 };
  95
  96 static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg,
  97                                unsigned offset, bool *bit)
  98 {
  99         struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 100         u8 pos = offset % 8;
 101         u8 val;
 102         int ret;
 103
 104         reg += offset / 8;
 105         ret = abx500_get_register_interruptible(pct->dev,
 106                                                 AB8500_MISC, reg, &val);
 107         if (ret < 0) {
 108                 dev_err(pct->dev,
 109                         "%s read reg =%x, offset=%x failed (%d)\n",
 110                         __func__, reg, offset, ret);
 111                 return ret;
 112         }
 113
 114         *bit = !!(val & BIT(pos));
 115
 116         return 0;
 117 }
 118
 119 static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
 120                                 unsigned offset, int val)
 121 {
 122         struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 123         u8 pos = offset % 8;
 124         int ret;
 125
 126         reg += offset / 8;
 127         ret = abx500_mask_and_set_register_interruptible(pct->dev,
 128                                 AB8500_MISC, reg, BIT(pos), val << pos);
 129         if (ret < 0)
 130                 dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n",
 131                                 __func__, reg, offset, ret);
 132
 133         return ret;
 134 }
 135
 136 /**
 137  * abx500_gpio_get() - Get the particular GPIO value
 138  * @chip:       Gpio device
 139  * @offset:     GPIO number to read
 140  */
 141 static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset)
 142 {
 143         struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 144         bool bit;
 145         bool is_out;
 146         u8 gpio_offset = offset - 1;
 147         int ret;
 148
 149         ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
 150                         gpio_offset, &is_out);
 151         if (ret < 0)
 152                 goto out;
 153
 154         if (is_out)
 155                 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG,
 156                                 gpio_offset, &bit);
 157         else
 158                 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG,
 159                                 gpio_offset, &bit);
 160 out:
 161         if (ret < 0) {
 162                 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 163                 return ret;
 164         }
 165
 166         return bit;
 167 }
 168
 169 static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
 170 {
 171         struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 172         int ret;
 173
 174         ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
 175         if (ret < 0)
 176                 dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret);
 177 }
 178
 179 static int abx500_gpio_direction_output(struct gpio_chip *chip,
 180                                         unsigned offset,
 181                                         int val)
 182 {
 183         struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 184         int ret;
 185
 186         /* set direction as output */
 187         ret = abx500_gpio_set_bits(chip,
 188                                 AB8500_GPIO_DIR1_REG,
 189                                 offset,
 190                                 ABX500_GPIO_OUTPUT);
 191         if (ret < 0)
 192                 goto out;
 193
 194         /* disable pull down */
 195         ret = abx500_gpio_set_bits(chip,
 196                                 AB8500_GPIO_PUD1_REG,
 197                                 offset,
 198                                 ABX500_GPIO_PULL_NONE);
 199
 200 out:
 201         if (ret < 0) {
 202                 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 203                 return ret;
 204         }
 205
 206         /* set the output as 1 or 0 */
 207         return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
 208 }
 209
 210 static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 211 {
 212         /* set the register as input */
 213         return abx500_gpio_set_bits(chip,
 214                                 AB8500_GPIO_DIR1_REG,
 215                                 offset,
 216                                 ABX500_GPIO_INPUT);
 217 }
 218
 219 static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
 220 {
 221         struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 222         /* The AB8500 GPIO numbers are off by one */
 223         int gpio = offset + 1;
 224         int hwirq;
 225         int i;
 226
 227         for (i = 0; i < pct->irq_cluster_size; i++) {
 228                 struct abx500_gpio_irq_cluster *cluster =
 229                         &pct->irq_cluster[i];
 230
 231                 if (gpio >= cluster->start && gpio <= cluster->end) {
 232                         /*
 233                          * The ABx500 GPIO's associated IRQs are clustered together
 234                          * throughout the interrupt numbers at irregular intervals.
 235                          * To solve this quandry, we have placed the read-in values
 236                          * into the cluster information table.
 237                          */
 238                         hwirq = gpio - cluster->start + cluster->to_irq;
 239                         return irq_create_mapping(pct->parent->domain, hwirq);
 240                 }
 241         }
 242
 243         return -EINVAL;
 244 }
 245
 246 static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
 247                            unsigned gpio, int alt_setting)
 248 {
 249         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 250         struct alternate_functions af = pct->soc->alternate_functions[gpio];
 251         int ret;
 252         int val;
 253         unsigned offset;
 254
 255         const char *modes[] = {
 256                 [ABX500_DEFAULT]        = "default",
 257                 [ABX500_ALT_A]          = "altA",
 258                 [ABX500_ALT_B]          = "altB",
 259                 [ABX500_ALT_C]          = "altC",
 260         };
 261
 262         /* sanity check */
 263         if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) ||
 264             ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) ||
 265             ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) {
 266                 dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio,
 267                                 modes[alt_setting]);
 268                 return -EINVAL;
 269         }
 270
 271         /* on ABx5xx, there is no GPIO0, so adjust the offset */
 272         offset = gpio - 1;
 273
 274         switch (alt_setting) {
 275         case ABX500_DEFAULT:
 276                 /*
 277                  * for ABx5xx family, default mode is always selected by
 278                  * writing 0 to GPIOSELx register, except for pins which
 279                  * support at least ALT_B mode, default mode is selected
 280                  * by writing 1 to GPIOSELx register
 281                  */
 282                 val = 0;
 283                 if (af.alt_bit1 != UNUSED)
 284                         val++;
 285
 286                 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 287                                            offset, val);
 288                 break;
 289
 290         case ABX500_ALT_A:
 291                 /*
 292                  * for ABx5xx family, alt_a mode is always selected by
 293                  * writing 1 to GPIOSELx register, except for pins which
 294                  * support at least ALT_B mode, alt_a mode is selected
 295                  * by writing 0 to GPIOSELx register and 0 in ALTFUNC
 296                  * register
 297                  */
 298                 if (af.alt_bit1 != UNUSED) {
 299                         ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 300                                         offset, 0);
 301                         if (ret < 0)
 302                                 goto out;
 303
 304                         ret = abx500_gpio_set_bits(chip,
 305                                         AB8500_GPIO_ALTFUN_REG,
 306                                         af.alt_bit1,
 307                                         !!(af.alta_val & BIT(0)));
 308                         if (ret < 0)
 309                                 goto out;
 310
 311                         if (af.alt_bit2 != UNUSED)
 312                                 ret = abx500_gpio_set_bits(chip,
 313                                         AB8500_GPIO_ALTFUN_REG,
 314                                         af.alt_bit2,
 315                                         !!(af.alta_val & BIT(1)));
 316                 } else
 317                         ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 318                                         offset, 1);
 319                 break;
 320
 321         case ABX500_ALT_B:
 322                 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 323                                 offset, 0);
 324                 if (ret < 0)
 325                         goto out;
 326
 327                 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 328                                 af.alt_bit1, !!(af.altb_val & BIT(0)));
 329                 if (ret < 0)
 330                         goto out;
 331
 332                 if (af.alt_bit2 != UNUSED)
 333                         ret = abx500_gpio_set_bits(chip,
 334                                         AB8500_GPIO_ALTFUN_REG,
 335                                         af.alt_bit2,
 336                                         !!(af.altb_val & BIT(1)));
 337                 break;
 338
 339         case ABX500_ALT_C:
 340                 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 341                                 offset, 0);
 342                 if (ret < 0)
 343                         goto out;
 344
 345                 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 346                                 af.alt_bit2, !!(af.altc_val & BIT(0)));
 347                 if (ret < 0)
 348                         goto out;
 349
 350                 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 351                                 af.alt_bit2, !!(af.altc_val & BIT(1)));
 352                 break;
 353
 354         default:
 355                 dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting);
 356
 357                 return -EINVAL;
 358         }
 359 out:
 360         if (ret < 0)
 361                 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 362
 363         return ret;
 364 }
 365
 366 #ifdef CONFIG_DEBUG_FS
 367 static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
 368                           unsigned gpio)
 369 {
 370         u8 mode;
 371         bool bit_mode;
 372         bool alt_bit1;
 373         bool alt_bit2;
 374         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 375         struct alternate_functions af = pct->soc->alternate_functions[gpio];
 376         /* on ABx5xx, there is no GPIO0, so adjust the offset */
 377         unsigned offset = gpio - 1;
 378         int ret;
 379
 380         /*
 381          * if gpiosel_bit is set to unused,
 382          * it means no GPIO or special case
 383          */
 384         if (af.gpiosel_bit == UNUSED)
 385                 return ABX500_DEFAULT;
 386
 387         /* read GpioSelx register */
 388         ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8),
 389                         af.gpiosel_bit, &bit_mode);
 390         if (ret < 0)
 391                 goto out;
 392
 393         mode = bit_mode;
 394
 395         /* sanity check */
 396         if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) ||
 397             (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) {
 398                 dev_err(pct->dev,
 399                         "alt_bitX value not in correct range (-1 to 7)\n");
 400                 return -EINVAL;
 401         }
 402
 403         /* if alt_bit2 is used, alt_bit1 must be used too */
 404         if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) {
 405                 dev_err(pct->dev,
 406                         "if alt_bit2 is used, alt_bit1 can't be unused\n");
 407                 return -EINVAL;
 408         }
 409
 410         /* check if pin use AlternateFunction register */
 411         if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED))
 412                 return mode;
 413         /*
 414          * if pin GPIOSEL bit is set and pin supports alternate function,
 415          * it means DEFAULT mode
 416          */
 417         if (mode)
 418                 return ABX500_DEFAULT;
 419
 420         /*
 421          * pin use the AlternatFunction register
 422          * read alt_bit1 value
 423          */
 424         ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
 425                             af.alt_bit1, &alt_bit1);
 426         if (ret < 0)
 427                 goto out;
 428
 429         if (af.alt_bit2 != UNUSED) {
 430                 /* read alt_bit2 value */
 431                 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
 432                                 af.alt_bit2,
 433                                 &alt_bit2);
 434                 if (ret < 0)
 435                         goto out;
 436         } else
 437                 alt_bit2 = 0;
 438
 439         mode = (alt_bit2 << 1) + alt_bit1;
 440         if (mode == af.alta_val)
 441                 return ABX500_ALT_A;
 442         else if (mode == af.altb_val)
 443                 return ABX500_ALT_B;
 444         else
 445                 return ABX500_ALT_C;
 446
 447 out:
 448         dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 449         return ret;
 450 }
 451
 452 static void abx500_gpio_dbg_show_one(struct seq_file *s,
 453                                      struct pinctrl_dev *pctldev,
 454                                      struct gpio_chip *chip,
 455                                      unsigned offset, unsigned gpio)
 456 {
 457         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 458         u8 gpio_offset = offset - 1;
 459         int mode = -1;
 460         bool is_out;
 461         bool pd;
 462         int ret = -ENOMEM;
 463
 464         const char *modes[] = {
 465                 [ABX500_DEFAULT]        = "default",
 466                 [ABX500_ALT_A]          = "altA",
 467                 [ABX500_ALT_B]          = "altB",
 468                 [ABX500_ALT_C]          = "altC",
 469         };
 470
 471         const char *pull_up_down[] = {
 472                 [ABX500_GPIO_PULL_DOWN]         = "pull down",
 473                 [ABX500_GPIO_PULL_NONE]         = "pull none",
 474                 [ABX500_GPIO_PULL_NONE + 1]     = "pull none",
 475                 [ABX500_GPIO_PULL_UP]           = "pull up",
 476         };
 477
 478         char *label __free(kfree) = gpiochip_dup_line_label(chip, offset - 1);
 479         if (IS_ERR(label))
 480                 goto out;
 481
 482         ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
 483                         gpio_offset, &is_out);
 484         if (ret < 0)
 485                 goto out;
 486
 487         seq_printf(s, " gpio-%-3d (%-20.20s) %-3s",
 488                    gpio, label ?: "(none)",
 489                    is_out ? "out" : "in ");
 490
 491         if (!is_out) {
 492                 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
 493                                 gpio_offset, &pd);
 494                 if (ret < 0)
 495                         goto out;
 496
 497                 seq_printf(s, " %-9s", pull_up_down[pd]);
 498         } else
 499                 seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo");
 500
 501         mode = abx500_get_mode(pctldev, chip, offset);
 502
 503         seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]);
 504
 505 out:
 506         if (ret < 0)
 507                 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 508 }
 509
 510 static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
 511 {
 512         unsigned i;
 513         unsigned gpio = chip->base;
 514         struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 515         struct pinctrl_dev *pctldev = pct->pctldev;
 516
 517         for (i = 0; i < chip->ngpio; i++, gpio++) {
 518                 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
 519                 abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio);
 520                 seq_putc(s, '\n');
 521         }
 522 }
 523
 524 #else
 525 static inline void abx500_gpio_dbg_show_one(struct seq_file *s,
 526                                             struct pinctrl_dev *pctldev,
 527                                             struct gpio_chip *chip,
 528                                             unsigned offset, unsigned gpio)
 529 {
 530 }
 531 #define abx500_gpio_dbg_show    NULL
 532 #endif
 533
 534 static const struct gpio_chip abx500gpio_chip = {
 535         .label                  = "abx500-gpio",
 536         .owner                  = THIS_MODULE,
 537         .request                = gpiochip_generic_request,
 538         .free                   = gpiochip_generic_free,
 539         .direction_input        = abx500_gpio_direction_input,
 540         .get                    = abx500_gpio_get,
 541         .direction_output       = abx500_gpio_direction_output,
 542         .set                    = abx500_gpio_set,
 543         .to_irq                 = abx500_gpio_to_irq,
 544         .dbg_show               = abx500_gpio_dbg_show,
 545 };
 546
 547 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
 548 {
 549         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 550
 551         return pct->soc->nfunctions;
 552 }
 553
 554 static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev,
 555                                          unsigned function)
 556 {
 557         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 558
 559         return pct->soc->functions[function].name;
 560 }
 561
 562 static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev,
 563                                       unsigned function,
 564                                       const char * const **groups,
 565                                       unsigned * const num_groups)
 566 {
 567         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 568
 569         *groups = pct->soc->functions[function].groups;
 570         *num_groups = pct->soc->functions[function].ngroups;
 571
 572         return 0;
 573 }
 574
 575 static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function,
 576                           unsigned group)
 577 {
 578         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 579         struct gpio_chip *chip = &pct->chip;
 580         const struct abx500_pingroup *g;
 581         int i;
 582         int ret = 0;
 583
 584         g = &pct->soc->groups[group];
 585         if (g->altsetting < 0)
 586                 return -EINVAL;
 587
 588         dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins);
 589
 590         for (i = 0; i < g->npins; i++) {
 591                 dev_dbg(pct->dev, "setting pin %d to altsetting %d\n",
 592                         g->pins[i], g->altsetting);
 593
 594                 ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting);
 595         }
 596
 597         if (ret < 0)
 598                 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 599
 600         return ret;
 601 }
 602
 603 static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev,
 604                                struct pinctrl_gpio_range *range,
 605                                unsigned offset)
 606 {
 607         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 608         const struct abx500_pinrange *p;
 609         int ret;
 610         int i;
 611
 612         /*
 613          * Different ranges have different ways to enable GPIO function on a
 614          * pin, so refer back to our local range type, where we handily define
 615          * what altfunc enables GPIO for a certain pin.
 616          */
 617         for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
 618                 p = &pct->soc->gpio_ranges[i];
 619                 if ((offset >= p->offset) &&
 620                     (offset < (p->offset + p->npins)))
 621                   break;
 622         }
 623
 624         if (i == pct->soc->gpio_num_ranges) {
 625                 dev_err(pct->dev, "%s failed to locate range\n", __func__);
 626                 return -ENODEV;
 627         }
 628
 629         dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n",
 630                 p->altfunc, offset);
 631
 632         ret = abx500_set_mode(pct->pctldev, &pct->chip,
 633                               offset, p->altfunc);
 634         if (ret < 0)
 635                 dev_err(pct->dev, "%s setting altfunc failed\n", __func__);
 636
 637         return ret;
 638 }
 639
 640 static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev,
 641                                      struct pinctrl_gpio_range *range,
 642                                      unsigned offset)
 643 {
 644 }
 645
 646 static const struct pinmux_ops abx500_pinmux_ops = {
 647         .get_functions_count = abx500_pmx_get_funcs_cnt,
 648         .get_function_name = abx500_pmx_get_func_name,
 649         .get_function_groups = abx500_pmx_get_func_groups,
 650         .set_mux = abx500_pmx_set,
 651         .gpio_request_enable = abx500_gpio_request_enable,
 652         .gpio_disable_free = abx500_gpio_disable_free,
 653 };
 654
 655 static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev)
 656 {
 657         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 658
 659         return pct->soc->ngroups;
 660 }
 661
 662 static const char *abx500_get_group_name(struct pinctrl_dev *pctldev,
 663                                          unsigned selector)
 664 {
 665         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 666
 667         return pct->soc->groups[selector].name;
 668 }
 669
 670 static int abx500_get_group_pins(struct pinctrl_dev *pctldev,
 671                                  unsigned selector,
 672                                  const unsigned **pins,
 673                                  unsigned *num_pins)
 674 {
 675         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 676
 677         *pins = pct->soc->groups[selector].pins;
 678         *num_pins = pct->soc->groups[selector].npins;
 679
 680         return 0;
 681 }
 682
 683 static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev,
 684                                 struct seq_file *s, unsigned offset)
 685 {
 686         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 687         struct gpio_chip *chip = &pct->chip;
 688
 689         abx500_gpio_dbg_show_one(s, pctldev, chip, offset,
 690                                  chip->base + offset - 1);
 691 }
 692
 693 static int abx500_dt_add_map_mux(struct pinctrl_map **map,
 694                 unsigned *reserved_maps,
 695                 unsigned *num_maps, const char *group,
 696                 const char *function)
 697 {
 698         if (*num_maps == *reserved_maps)
 699                 return -ENOSPC;
 700
 701         (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
 702         (*map)[*num_maps].data.mux.group = group;
 703         (*map)[*num_maps].data.mux.function = function;
 704         (*num_maps)++;
 705
 706         return 0;
 707 }
 708
 709 static int abx500_dt_add_map_configs(struct pinctrl_map **map,
 710                 unsigned *reserved_maps,
 711                 unsigned *num_maps, const char *group,
 712                 unsigned long *configs, unsigned num_configs)
 713 {
 714         unsigned long *dup_configs;
 715
 716         if (*num_maps == *reserved_maps)
 717                 return -ENOSPC;
 718
 719         dup_configs = kmemdup_array(configs, num_configs, sizeof(*dup_configs), GFP_KERNEL);
 720         if (!dup_configs)
 721                 return -ENOMEM;
 722
 723         (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN;
 724
 725         (*map)[*num_maps].data.configs.group_or_pin = group;
 726         (*map)[*num_maps].data.configs.configs = dup_configs;
 727         (*map)[*num_maps].data.configs.num_configs = num_configs;
 728         (*num_maps)++;
 729
 730         return 0;
 731 }
 732
 733 static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev,
 734                                         const char *pin_name)
 735 {
 736         int i, pin_number;
 737         struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
 738
 739         if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1)
 740                 for (i = 0; i < npct->soc->npins; i++)
 741                         if (npct->soc->pins[i].number == pin_number)
 742                                 return npct->soc->pins[i].name;
 743         return NULL;
 744 }
 745
 746 static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev,
 747                 struct device_node *np,
 748                 struct pinctrl_map **map,
 749                 unsigned *reserved_maps,
 750                 unsigned *num_maps)
 751 {
 752         int ret;
 753         const char *function = NULL;
 754         unsigned long *configs;
 755         unsigned int nconfigs = 0;
 756         struct property *prop;
 757
 758         ret = of_property_read_string(np, "function", &function);
 759         if (ret >= 0) {
 760                 const char *group;
 761
 762                 ret = of_property_count_strings(np, "groups");
 763                 if (ret < 0)
 764                         goto exit;
 765
 766                 ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps,
 767                                                 num_maps, ret);
 768                 if (ret < 0)
 769                         goto exit;
 770
 771                 of_property_for_each_string(np, "groups", prop, group) {
 772                         ret = abx500_dt_add_map_mux(map, reserved_maps,
 773                                         num_maps, group, function);
 774                         if (ret < 0)
 775                                 goto exit;
 776                 }
 777         }
 778
 779         ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, &nconfigs);
 780         if (nconfigs) {
 781                 const char *gpio_name;
 782                 const char *pin;
 783
 784                 ret = of_property_count_strings(np, "pins");
 785                 if (ret < 0)
 786                         goto exit;
 787
 788                 ret = pinctrl_utils_reserve_map(pctldev, map,
 789                                                 reserved_maps,
 790                                                 num_maps, ret);
 791                 if (ret < 0)
 792                         goto exit;
 793
 794                 of_property_for_each_string(np, "pins", prop, pin) {
 795                         gpio_name = abx500_find_pin_name(pctldev, pin);
 796
 797                         ret = abx500_dt_add_map_configs(map, reserved_maps,
 798                                         num_maps, gpio_name, configs, 1);
 799                         if (ret < 0)
 800                                 goto exit;
 801                 }
 802         }
 803
 804 exit:
 805         return ret;
 806 }
 807
 808 static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev,
 809                                  struct device_node *np_config,
 810                                  struct pinctrl_map **map, unsigned *num_maps)
 811 {
 812         unsigned reserved_maps;
 813         int ret;
 814
 815         reserved_maps = 0;
 816         *map = NULL;
 817         *num_maps = 0;
 818
 819         for_each_child_of_node_scoped(np_config, np) {
 820                 ret = abx500_dt_subnode_to_map(pctldev, np, map,
 821                                 &reserved_maps, num_maps);
 822                 if (ret < 0) {
 823                         pinctrl_utils_free_map(pctldev, *map, *num_maps);
 824                         return ret;
 825                 }
 826         }
 827
 828         return 0;
 829 }
 830
 831 static const struct pinctrl_ops abx500_pinctrl_ops = {
 832         .get_groups_count = abx500_get_groups_cnt,
 833         .get_group_name = abx500_get_group_name,
 834         .get_group_pins = abx500_get_group_pins,
 835         .pin_dbg_show = abx500_pin_dbg_show,
 836         .dt_node_to_map = abx500_dt_node_to_map,
 837         .dt_free_map = pinctrl_utils_free_map,
 838 };
 839
 840 static int abx500_pin_config_get(struct pinctrl_dev *pctldev,
 841                           unsigned pin,
 842                           unsigned long *config)
 843 {
 844         return -ENOSYS;
 845 }
 846
 847 static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
 848                           unsigned pin,
 849                           unsigned long *configs,
 850                           unsigned num_configs)
 851 {
 852         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 853         struct gpio_chip *chip = &pct->chip;
 854         unsigned offset;
 855         int ret = -EINVAL;
 856         int i;
 857         enum pin_config_param param;
 858         enum pin_config_param argument;
 859
 860         for (i = 0; i < num_configs; i++) {
 861                 param = pinconf_to_config_param(configs[i]);
 862                 argument = pinconf_to_config_argument(configs[i]);
 863
 864                 dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n",
 865                         pin, configs[i],
 866                         (param == PIN_CONFIG_OUTPUT) ? "output " : "input",
 867                         (param == PIN_CONFIG_OUTPUT) ?
 868                         (argument ? "high" : "low") :
 869                         (argument ? "pull up" : "pull down"));
 870
 871                 /* on ABx500, there is no GPIO0, so adjust the offset */
 872                 offset = pin - 1;
 873
 874                 switch (param) {
 875                 case PIN_CONFIG_BIAS_DISABLE:
 876                         ret = abx500_gpio_direction_input(chip, offset);
 877                         if (ret < 0)
 878                                 goto out;
 879
 880                         /* Chip only supports pull down */
 881                         ret = abx500_gpio_set_bits(chip,
 882                                 AB8500_GPIO_PUD1_REG, offset,
 883                                 ABX500_GPIO_PULL_NONE);
 884                         break;
 885
 886                 case PIN_CONFIG_BIAS_PULL_DOWN:
 887                         ret = abx500_gpio_direction_input(chip, offset);
 888                         if (ret < 0)
 889                                 goto out;
 890                         /*
 891                          * if argument = 1 set the pull down
 892                          * else clear the pull down
 893                          * Chip only supports pull down
 894                          */
 895                         ret = abx500_gpio_set_bits(chip,
 896                         AB8500_GPIO_PUD1_REG,
 897                                 offset,
 898                                 argument ? ABX500_GPIO_PULL_DOWN :
 899                                 ABX500_GPIO_PULL_NONE);
 900                         break;
 901
 902                 case PIN_CONFIG_BIAS_PULL_UP:
 903                         ret = abx500_gpio_direction_input(chip, offset);
 904                         if (ret < 0)
 905                                 goto out;
 906                         /*
 907                          * if argument = 1 set the pull up
 908                          * else clear the pull up
 909                          */
 910                         ret = abx500_gpio_direction_input(chip, offset);
 911                         break;
 912
 913                 case PIN_CONFIG_OUTPUT:
 914                         ret = abx500_gpio_direction_output(chip, offset,
 915                                 argument);
 916                         break;
 917
 918                 default:
 919                         dev_err(chip->parent,
 920                                 "illegal configuration requested\n");
 921                 }
 922         } /* for each config */
 923 out:
 924         if (ret < 0)
 925                 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 926
 927         return ret;
 928 }
 929
 930 static const struct pinconf_ops abx500_pinconf_ops = {
 931         .pin_config_get = abx500_pin_config_get,
 932         .pin_config_set = abx500_pin_config_set,
 933         .is_generic = true,
 934 };
 935
 936 static struct pinctrl_desc abx500_pinctrl_desc = {
 937         .name = "pinctrl-abx500",
 938         .pctlops = &abx500_pinctrl_ops,
 939         .pmxops = &abx500_pinmux_ops,
 940         .confops = &abx500_pinconf_ops,
 941         .owner = THIS_MODULE,
 942 };
 943
 944 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc)
 945 {
 946         unsigned int lowest = 0;
 947         unsigned int highest = 0;
 948         unsigned int npins = 0;
 949         int i;
 950
 951         /*
 952          * Compute number of GPIOs from the last SoC gpio range descriptors
 953          * These ranges may include "holes" but the GPIO number space shall
 954          * still be homogeneous, so we need to detect and account for any
 955          * such holes so that these are included in the number of GPIO pins.
 956          */
 957         for (i = 0; i < soc->gpio_num_ranges; i++) {
 958                 unsigned gstart;
 959                 unsigned gend;
 960                 const struct abx500_pinrange *p;
 961
 962                 p = &soc->gpio_ranges[i];
 963                 gstart = p->offset;
 964                 gend = p->offset + p->npins - 1;
 965
 966                 if (i == 0) {
 967                         /* First iteration, set start values */
 968                         lowest = gstart;
 969                         highest = gend;
 970                 } else {
 971                         if (gstart < lowest)
 972                                 lowest = gstart;
 973                         if (gend > highest)
 974                                 highest = gend;
 975                 }
 976         }
 977         /* this gives the absolute number of pins */
 978         npins = highest - lowest + 1;
 979         return npins;
 980 }
 981
 982 static const struct of_device_id abx500_gpio_match[] = {
 983         { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, },
 984         { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, },
 985         { }
 986 };
 987
 988 static int abx500_gpio_probe(struct platform_device *pdev)
 989 {
 990         struct device_node *np = pdev->dev.of_node;
 991         struct abx500_pinctrl *pct;
 992         unsigned int id = -1;
 993         int ret;
 994         int i;
 995
 996         if (!np) {
 997                 dev_err(&pdev->dev, "gpio dt node missing\n");
 998                 return -ENODEV;
 999         }
1000
1001         pct = devm_kzalloc(&pdev->dev, sizeof(*pct), GFP_KERNEL);
1002         if (!pct)
1003                 return -ENOMEM;
1004
1005         pct->dev = &pdev->dev;
1006         pct->parent = dev_get_drvdata(pdev->dev.parent);
1007         pct->chip = abx500gpio_chip;
1008         pct->chip.parent = &pdev->dev;
1009         pct->chip.base = -1; /* Dynamic allocation */
1010
1011         id = (unsigned long)device_get_match_data(&pdev->dev);
1012
1013         /* Poke in other ASIC variants here */
1014         switch (id) {
1015         case PINCTRL_AB8500:
1016                 abx500_pinctrl_ab8500_init(&pct->soc);
1017                 break;
1018         case PINCTRL_AB8505:
1019                 abx500_pinctrl_ab8505_init(&pct->soc);
1020                 break;
1021         default:
1022                 dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id);
1023                 return -EINVAL;
1024         }
1025
1026         if (!pct->soc) {
1027                 dev_err(&pdev->dev, "Invalid SOC data\n");
1028                 return -EINVAL;
1029         }
1030
1031         pct->chip.ngpio = abx500_get_gpio_num(pct->soc);
1032         pct->irq_cluster = pct->soc->gpio_irq_cluster;
1033         pct->irq_cluster_size = pct->soc->ngpio_irq_cluster;
1034
1035         ret = gpiochip_add_data(&pct->chip, pct);
1036         if (ret) {
1037                 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
1038                 return ret;
1039         }
1040         dev_info(&pdev->dev, "added gpiochip\n");
1041
1042         abx500_pinctrl_desc.pins = pct->soc->pins;
1043         abx500_pinctrl_desc.npins = pct->soc->npins;
1044         pct->pctldev = devm_pinctrl_register(&pdev->dev, &abx500_pinctrl_desc,
1045                                              pct);
1046         if (IS_ERR(pct->pctldev)) {
1047                 dev_err(&pdev->dev,
1048                         "could not register abx500 pinctrl driver\n");
1049                 ret = PTR_ERR(pct->pctldev);
1050                 goto out_rem_chip;
1051         }
1052         dev_info(&pdev->dev, "registered pin controller\n");
1053
1054         /* We will handle a range of GPIO pins */
1055         for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
1056                 const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i];
1057
1058                 ret = gpiochip_add_pin_range(&pct->chip,
1059                                         dev_name(&pdev->dev),
1060                                         p->offset - 1, p->offset, p->npins);
1061                 if (ret < 0)
1062                         goto out_rem_chip;
1063         }
1064
1065         platform_set_drvdata(pdev, pct);
1066         dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n");
1067
1068         return 0;
1069
1070 out_rem_chip:
1071         gpiochip_remove(&pct->chip);
1072         return ret;
1073 }
1074
1075 /**
1076  * abx500_gpio_remove() - remove Ab8500-gpio driver
1077  * @pdev:       Platform device registered
1078  */
1079 static void abx500_gpio_remove(struct platform_device *pdev)
1080 {
1081         struct abx500_pinctrl *pct = platform_get_drvdata(pdev);
1082
1083         gpiochip_remove(&pct->chip);
1084 }
1085
1086 static struct platform_driver abx500_gpio_driver = {
1087         .driver = {
1088                 .name = "abx500-gpio",
1089                 .of_match_table = abx500_gpio_match,
1090         },
1091         .probe = abx500_gpio_probe,
1092         .remove = abx500_gpio_remove,
1093 };
1094
1095 static int __init abx500_gpio_init(void)
1096 {
1097         return platform_driver_register(&abx500_gpio_driver);
1098 }
1099 core_initcall(abx500_gpio_init);