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Merge tag 'trace-printf-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/trace...
[drm/drm-misc.git] / drivers / pinctrl / pinctrl-ep93xx.c
blobabafbbb8fd6a50b6d3e848a397b7c1f7941d6561
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Driver for the EP93xx pin controller
4 * based on linux/drivers/pinctrl/pinmux-gemini.c
5 *
6 * Copyright (C) 2022 Nikita Shubin <nikita.shubin@maquefel.me>
7 *
8 * This is a group-only pin controller.
9 */
10 #include <linux/array_size.h>
11 #include <linux/err.h>
12 #include <linux/init.h>
13 #include <linux/io.h>
14 #include <linux/mfd/syscon.h>
15 #include <linux/property.h>
16 #include <linux/regmap.h>
17 #include <linux/seq_file.h>
18 #include <linux/slab.h>
19
20 #include <linux/soc/cirrus/ep93xx.h>
21
22 #include <linux/pinctrl/machine.h>
23 #include <linux/pinctrl/pinconf-generic.h>
24 #include <linux/pinctrl/pinconf.h>
25 #include <linux/pinctrl/pinctrl.h>
26 #include <linux/pinctrl/pinmux.h>
27
28 #include "pinctrl-utils.h"
29
30 #define DRIVER_NAME "pinctrl-ep93xx"
31
32 enum ep93xx_pinctrl_model {
33 EP93XX_9301_PINCTRL,
34 EP93XX_9307_PINCTRL,
35 EP93XX_9312_PINCTRL,
36 };
37
38 struct ep93xx_pmx {
39 struct device *dev;
40 struct pinctrl_dev *pctl;
41 struct ep93xx_regmap_adev *aux_dev;
42 struct regmap *map;
43 enum ep93xx_pinctrl_model model;
44 };
45
46 static void ep93xx_pinctrl_update_bits(struct ep93xx_pmx *pmx, unsigned int reg,
47 unsigned int mask, unsigned int val)
48 {
49 struct ep93xx_regmap_adev *aux = pmx->aux_dev;
50
51 aux->update_bits(aux->map, aux->lock, reg, mask, val);
52 }
53
54 struct ep93xx_pin_group {
55 struct pingroup grp;
56 u32 mask;
57 u32 value;
58 };
59
60 #define PMX_GROUP(_name, _pins, _mask, _value) \
61 { \
62 .grp = PINCTRL_PINGROUP(_name, _pins, ARRAY_SIZE(_pins)), \
63 .mask = _mask, \
64 .value = _value, \
65 }
66
67 #define EP93XX_SYSCON_DEVCFG 0x80
68
69 /*
70 * There are several system configuration options selectable by the DeviceCfg and SysCfg
71 * registers. These registers provide the selection of several pin multiplexing options and also
72 * provide software access to the system reset configuration options. Please refer to the
73 * descriptions of the registers, “DeviceCfg” on page 5-25 and “SysCfg” on page 5-34, for a
74 * detailed explanation.
75 */
76 #define EP93XX_SYSCON_DEVCFG_D1ONG BIT(30)
77 #define EP93XX_SYSCON_DEVCFG_D0ONG BIT(29)
78 #define EP93XX_SYSCON_DEVCFG_IONU2 BIT(28)
79 #define EP93XX_SYSCON_DEVCFG_GONK BIT(27)
80 #define EP93XX_SYSCON_DEVCFG_TONG BIT(26)
81 #define EP93XX_SYSCON_DEVCFG_MONG BIT(25)
82 #define EP93XX_SYSCON_DEVCFG_A2ONG BIT(22)
83 #define EP93XX_SYSCON_DEVCFG_A1ONG BIT(21)
84 #define EP93XX_SYSCON_DEVCFG_HONIDE BIT(11)
85 #define EP93XX_SYSCON_DEVCFG_GONIDE BIT(10)
86 #define EP93XX_SYSCON_DEVCFG_PONG BIT(9)
87 #define EP93XX_SYSCON_DEVCFG_EONIDE BIT(8)
88 #define EP93XX_SYSCON_DEVCFG_I2SONSSP BIT(7)
89 #define EP93XX_SYSCON_DEVCFG_I2SONAC97 BIT(6)
90 #define EP93XX_SYSCON_DEVCFG_RASONP3 BIT(4)
91
92 #define PADS_MASK (GENMASK(30, 25) | BIT(22) | BIT(21) | GENMASK(11, 6) | BIT(4))
93 #define PADS_MAXBIT 30
94
95 /* Ordered by bit index */
96 static const char * const ep93xx_padgroups[] = {
97 NULL, NULL, NULL, NULL,
98 "RasOnP3",
99 NULL,
100 "I2SonAC97",
101 "I2SonSSP",
102 "EonIDE",
103 "PonG",
104 "GonIDE",
105 "HonIDE",
106 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
107 "A1onG",
108 "A2onG",
109 NULL, NULL,
110 "MonG",
111 "TonG",
112 "GonK",
113 "IonU2",
114 "D0onG",
115 "D1onG",
116 };
117
118 /* ep9301, ep9302 */
119 static const struct pinctrl_pin_desc ep9301_pins[] = {
120 PINCTRL_PIN(1, "CSn[7]"),
121 PINCTRL_PIN(2, "CSn[6]"),
122 PINCTRL_PIN(3, "CSn[3]"),
123 PINCTRL_PIN(4, "CSn[2]"),
124 PINCTRL_PIN(5, "CSn[1]"),
125 PINCTRL_PIN(6, "AD[25]"),
126 PINCTRL_PIN(7, "vdd_ring"),
127 PINCTRL_PIN(8, "gnd_ring"),
128 PINCTRL_PIN(9, "AD[24]"),
129 PINCTRL_PIN(10, "SDCLK"),
130 PINCTRL_PIN(11, "AD[23]"),
131 PINCTRL_PIN(12, "vdd_core"),
132 PINCTRL_PIN(13, "gnd_core"),
133 PINCTRL_PIN(14, "SDWEn"),
134 PINCTRL_PIN(15, "SDCSn[3]"),
135 PINCTRL_PIN(16, "SDCSn[2]"),
136 PINCTRL_PIN(17, "SDCSn[1]"),
137 PINCTRL_PIN(18, "SDCSn[0]"),
138 PINCTRL_PIN(19, "vdd_ring"),
139 PINCTRL_PIN(20, "gnd_ring"),
140 PINCTRL_PIN(21, "RASn"),
141 PINCTRL_PIN(22, "CASn"),
142 PINCTRL_PIN(23, "DQMn[1]"),
143 PINCTRL_PIN(24, "DQMn[0]"),
144 PINCTRL_PIN(25, "AD[22]"),
145 PINCTRL_PIN(26, "AD[21]"),
146 PINCTRL_PIN(27, "vdd_ring"),
147 PINCTRL_PIN(28, "gnd_ring"),
148 PINCTRL_PIN(29, "DA[15]"),
149 PINCTRL_PIN(30, "AD[7]"),
150 PINCTRL_PIN(31, "DA[14]"),
151 PINCTRL_PIN(32, "AD[6]"),
152 PINCTRL_PIN(33, "DA[13]"),
153 PINCTRL_PIN(34, "vdd_core"),
154 PINCTRL_PIN(35, "gnd_core"),
155 PINCTRL_PIN(36, "AD[5]"),
156 PINCTRL_PIN(37, "DA[12]"),
157 PINCTRL_PIN(38, "AD[4]"),
158 PINCTRL_PIN(39, "DA[11]"),
159 PINCTRL_PIN(40, "AD[3]"),
160 PINCTRL_PIN(41, "vdd_ring"),
161 PINCTRL_PIN(42, "gnd_ring"),
162 PINCTRL_PIN(43, "DA[10]"),
163 PINCTRL_PIN(44, "AD[2]"),
164 PINCTRL_PIN(45, "DA[9]"),
165 PINCTRL_PIN(46, "AD[1]"),
166 PINCTRL_PIN(47, "DA[8]"),
167 PINCTRL_PIN(48, "AD[0]"),
168 PINCTRL_PIN(49, "vdd_ring"),
169 PINCTRL_PIN(50, "gnd_ring"),
170 PINCTRL_PIN(51, "NC"),
171 PINCTRL_PIN(52, "NC"),
172 PINCTRL_PIN(53, "vdd_ring"),
173 PINCTRL_PIN(54, "gnd_ring"),
174 PINCTRL_PIN(55, "AD[15]"),
175 PINCTRL_PIN(56, "DA[7]"),
176 PINCTRL_PIN(57, "vdd_core"),
177 PINCTRL_PIN(58, "gnd_core"),
178 PINCTRL_PIN(59, "AD[14]"),
179 PINCTRL_PIN(60, "DA[6]"),
180 PINCTRL_PIN(61, "AD[13]"),
181 PINCTRL_PIN(62, "DA[5]"),
182 PINCTRL_PIN(63, "AD[12]"),
183 PINCTRL_PIN(64, "DA[4]"),
184 PINCTRL_PIN(65, "AD[11]"),
185 PINCTRL_PIN(66, "vdd_ring"),
186 PINCTRL_PIN(67, "gnd_ring"),
187 PINCTRL_PIN(68, "DA[3]"),
188 PINCTRL_PIN(69, "AD[10]"),
189 PINCTRL_PIN(70, "DA[2]"),
190 PINCTRL_PIN(71, "AD[9]"),
191 PINCTRL_PIN(72, "DA[1]"),
192 PINCTRL_PIN(73, "AD[8]"),
193 PINCTRL_PIN(74, "DA[0]"),
194 PINCTRL_PIN(75, "DSRn"),
195 PINCTRL_PIN(76, "DTRn"),
196 PINCTRL_PIN(77, "TCK"),
197 PINCTRL_PIN(78, "TDI"),
198 PINCTRL_PIN(79, "TDO"),
199 PINCTRL_PIN(80, "TMS"),
200 PINCTRL_PIN(81, "vdd_ring"),
201 PINCTRL_PIN(82, "gnd_ring"),
202 PINCTRL_PIN(83, "BOOT[1]"),
203 PINCTRL_PIN(84, "BOOT[0]"),
204 PINCTRL_PIN(85, "gnd_ring"),
205 PINCTRL_PIN(86, "NC"),
206 PINCTRL_PIN(87, "EECLK"),
207 PINCTRL_PIN(88, "EEDAT"),
208 PINCTRL_PIN(89, "ASYNC"),
209 PINCTRL_PIN(90, "vdd_core"),
210 PINCTRL_PIN(91, "gnd_core"),
211 PINCTRL_PIN(92, "ASDO"),
212 PINCTRL_PIN(93, "SCLK1"),
213 PINCTRL_PIN(94, "SFRM1"),
214 PINCTRL_PIN(95, "SSPRX1"),
215 PINCTRL_PIN(96, "SSPTX1"),
216 PINCTRL_PIN(97, "GRLED"),
217 PINCTRL_PIN(98, "RDLED"),
218 PINCTRL_PIN(99, "vdd_ring"),
219 PINCTRL_PIN(100, "gnd_ring"),
220 PINCTRL_PIN(101, "INT[3]"),
221 PINCTRL_PIN(102, "INT[1]"),
222 PINCTRL_PIN(103, "INT[0]"),
223 PINCTRL_PIN(104, "RTSn"),
224 PINCTRL_PIN(105, "USBm[0]"),
225 PINCTRL_PIN(106, "USBp[0]"),
226 PINCTRL_PIN(107, "ABITCLK"),
227 PINCTRL_PIN(108, "CTSn"),
228 PINCTRL_PIN(109, "RXD[0]"),
229 PINCTRL_PIN(110, "RXD[1]"),
230 PINCTRL_PIN(111, "vdd_ring"),
231 PINCTRL_PIN(112, "gnd_ring"),
232 PINCTRL_PIN(113, "TXD[0]"),
233 PINCTRL_PIN(114, "TXD[1]"),
234 PINCTRL_PIN(115, "CGPIO[0]"),
235 PINCTRL_PIN(116, "gnd_core"),
236 PINCTRL_PIN(117, "PLL_GND"),
237 PINCTRL_PIN(118, "XTALI"),
238 PINCTRL_PIN(119, "XTALO"),
239 PINCTRL_PIN(120, "PLL_VDD"),
240 PINCTRL_PIN(121, "vdd_core"),
241 PINCTRL_PIN(122, "gnd_ring"),
242 PINCTRL_PIN(123, "vdd_ring"),
243 PINCTRL_PIN(124, "RSTOn"),
244 PINCTRL_PIN(125, "PRSTn"),
245 PINCTRL_PIN(126, "CSn[0]"),
246 PINCTRL_PIN(127, "gnd_core"),
247 PINCTRL_PIN(128, "vdd_core"),
248 PINCTRL_PIN(129, "gnd_ring"),
249 PINCTRL_PIN(130, "vdd_ring"),
250 PINCTRL_PIN(131, "ADC[4]"),
251 PINCTRL_PIN(132, "ADC[3]"),
252 PINCTRL_PIN(133, "ADC[2]"),
253 PINCTRL_PIN(134, "ADC[1]"),
254 PINCTRL_PIN(135, "ADC[0]"),
255 PINCTRL_PIN(136, "ADC_VDD"),
256 PINCTRL_PIN(137, "RTCXTALI"),
257 PINCTRL_PIN(138, "RTCXTALO"),
258 PINCTRL_PIN(139, "ADC_GND"),
259 PINCTRL_PIN(140, "EGPIO[11]"),
260 PINCTRL_PIN(141, "EGPIO[10]"),
261 PINCTRL_PIN(142, "EGPIO[9]"),
262 PINCTRL_PIN(143, "EGPIO[8]"),
263 PINCTRL_PIN(144, "EGPIO[7]"),
264 PINCTRL_PIN(145, "EGPIO[6]"),
265 PINCTRL_PIN(146, "EGPIO[5]"),
266 PINCTRL_PIN(147, "EGPIO[4]"),
267 PINCTRL_PIN(148, "EGPIO[3]"),
268 PINCTRL_PIN(149, "gnd_ring"),
269 PINCTRL_PIN(150, "vdd_ring"),
270 PINCTRL_PIN(151, "EGPIO[2]"),
271 PINCTRL_PIN(152, "EGPIO[1]"),
272 PINCTRL_PIN(153, "EGPIO[0]"),
273 PINCTRL_PIN(154, "ARSTn"),
274 PINCTRL_PIN(155, "TRSTn"),
275 PINCTRL_PIN(156, "ASDI"),
276 PINCTRL_PIN(157, "USBm[2]"),
277 PINCTRL_PIN(158, "USBp[2]"),
278 PINCTRL_PIN(159, "WAITn"),
279 PINCTRL_PIN(160, "EGPIO[15]"),
280 PINCTRL_PIN(161, "gnd_ring"),
281 PINCTRL_PIN(162, "vdd_ring"),
282 PINCTRL_PIN(163, "EGPIO[14]"),
283 PINCTRL_PIN(164, "EGPIO[13]"),
284 PINCTRL_PIN(165, "EGPIO[12]"),
285 PINCTRL_PIN(166, "gnd_core"),
286 PINCTRL_PIN(167, "vdd_core"),
287 PINCTRL_PIN(168, "FGPIO[3]"),
288 PINCTRL_PIN(169, "FGPIO[2]"),
289 PINCTRL_PIN(170, "FGPIO[1]"),
290 PINCTRL_PIN(171, "gnd_ring"),
291 PINCTRL_PIN(172, "vdd_ring"),
292 PINCTRL_PIN(173, "CLD"),
293 PINCTRL_PIN(174, "CRS"),
294 PINCTRL_PIN(175, "TXERR"),
295 PINCTRL_PIN(176, "TXEN"),
296 PINCTRL_PIN(177, "MIITXD[0]"),
297 PINCTRL_PIN(178, "MIITXD[1]"),
298 PINCTRL_PIN(179, "MIITXD[2]"),
299 PINCTRL_PIN(180, "MIITXD[3]"),
300 PINCTRL_PIN(181, "TXCLK"),
301 PINCTRL_PIN(182, "RXERR"),
302 PINCTRL_PIN(183, "RXDVAL"),
303 PINCTRL_PIN(184, "MIIRXD[0]"),
304 PINCTRL_PIN(185, "MIIRXD[1]"),
305 PINCTRL_PIN(186, "MIIRXD[2]"),
306 PINCTRL_PIN(187, "gnd_ring"),
307 PINCTRL_PIN(188, "vdd_ring"),
308 PINCTRL_PIN(189, "MIIRXD[3]"),
309 PINCTRL_PIN(190, "RXCLK"),
310 PINCTRL_PIN(191, "MDIO"),
311 PINCTRL_PIN(192, "MDC"),
312 PINCTRL_PIN(193, "RDn"),
313 PINCTRL_PIN(194, "WRn"),
314 PINCTRL_PIN(195, "AD[16]"),
315 PINCTRL_PIN(196, "AD[17]"),
316 PINCTRL_PIN(197, "gnd_core"),
317 PINCTRL_PIN(198, "vdd_core"),
318 PINCTRL_PIN(199, "HGPIO[2]"),
319 PINCTRL_PIN(200, "HGPIO[3]"),
320 PINCTRL_PIN(201, "HGPIO[4]"),
321 PINCTRL_PIN(202, "HGPIO[5]"),
322 PINCTRL_PIN(203, "gnd_ring"),
323 PINCTRL_PIN(204, "vdd_ring"),
324 PINCTRL_PIN(205, "AD[18]"),
325 PINCTRL_PIN(206, "AD[19]"),
326 PINCTRL_PIN(207, "AD[20]"),
327 PINCTRL_PIN(208, "SDCLKEN"),
328 };
329
330 static const unsigned int ssp_ep9301_pins[] = {
331 93, 94, 95, 96,
332 };
333
334 static const unsigned int ac97_ep9301_pins[] = {
335 89, 92, 107, 154, 156,
336 };
337
338 /*
339 * Note: The EP9307 processor has one PWM with one output, PWMOUT.
340 * Note: The EP9301, EP9302, EP9312, and EP9315 processors each have two PWMs with
341 * two outputs, PWMOUT and PWMO1. PWMO1 is an alternate function for EGPIO14.
342 */
343 /* The GPIO14E (14) pin overlap with pwm1 */
344 static const unsigned int pwm_9301_pins[] = { 163 };
345
346 static const unsigned int gpio1a_9301_pins[] = { 163 };
347
348 /* ep9301/9302 have only 0 pin of GPIO C Port exposed */
349 static const unsigned int gpio2a_9301_pins[] = { 115 };
350
351 /* ep9301/9302 have only 4,5 pin of GPIO E Port exposed */
352 static const unsigned int gpio4a_9301_pins[] = { 97, 98 };
353
354 /* ep9301/9302 have only 4,5 pin of GPIO G Port exposed */
355 static const unsigned int gpio6a_9301_pins[] = { 87, 88 };
356
357 static const unsigned int gpio7a_9301_pins[] = { 199, 200, 201, 202 };
358
359 /* Groups for the ep9301/ep9302 SoC/package */
360 static const struct ep93xx_pin_group ep9301_pin_groups[] = {
361 PMX_GROUP("ssp", ssp_ep9301_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP, 0),
362 PMX_GROUP("i2s_on_ssp", ssp_ep9301_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP,
363 EP93XX_SYSCON_DEVCFG_I2SONSSP),
364 PMX_GROUP("ac97", ac97_ep9301_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97, 0),
365 PMX_GROUP("i2s_on_ac97", ac97_ep9301_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97,
366 EP93XX_SYSCON_DEVCFG_I2SONAC97),
367 PMX_GROUP("pwm1", pwm_9301_pins, EP93XX_SYSCON_DEVCFG_PONG, EP93XX_SYSCON_DEVCFG_PONG),
368 PMX_GROUP("gpio1agrp", gpio1a_9301_pins, EP93XX_SYSCON_DEVCFG_PONG, 0),
369 PMX_GROUP("gpio2agrp", gpio2a_9301_pins, EP93XX_SYSCON_DEVCFG_GONK,
370 EP93XX_SYSCON_DEVCFG_GONK),
371 PMX_GROUP("gpio4agrp", gpio4a_9301_pins, EP93XX_SYSCON_DEVCFG_EONIDE,
372 EP93XX_SYSCON_DEVCFG_EONIDE),
373 PMX_GROUP("gpio6agrp", gpio6a_9301_pins, EP93XX_SYSCON_DEVCFG_GONIDE,
374 EP93XX_SYSCON_DEVCFG_GONIDE),
375 PMX_GROUP("gpio7agrp", gpio7a_9301_pins, EP93XX_SYSCON_DEVCFG_HONIDE,
376 EP93XX_SYSCON_DEVCFG_HONIDE),
377 };
378
379 static const struct pinctrl_pin_desc ep9307_pins[] = {
380 /* Row A */
381 PINCTRL_PIN(0, "CSn[1]"), /* A1 */
382 PINCTRL_PIN(1, "CSn[7]"), /* A2 */
383 PINCTRL_PIN(2, "SDCLKEN"), /* A3 */
384 PINCTRL_PIN(3, "DA[31]"), /* A4 */
385 PINCTRL_PIN(4, "DA[29]"), /* A5 */
386 PINCTRL_PIN(5, "DA[27]"), /* A6 */
387 PINCTRL_PIN(6, "HGPIO[2]"), /* A7 */
388 PINCTRL_PIN(7, "RDn"), /* A8 */
389 PINCTRL_PIN(8, "MIIRXD[3]"), /* A9 */
390 PINCTRL_PIN(9, "RXDVAL"), /* A10 */
391 PINCTRL_PIN(10, "MIITXD[1]"), /* A11 */
392 PINCTRL_PIN(11, "CRS"), /* A12 */
393 PINCTRL_PIN(12, "FGPIO[7]"), /* A13 */
394 PINCTRL_PIN(13, "FGPIO[0]"), /* A14 */
395 PINCTRL_PIN(14, "WAITn"), /* A15 */
396 PINCTRL_PIN(15, "USBm[2]"), /* A16 */
397 PINCTRL_PIN(16, "ASDI"), /* A17 */
398 /* Row B */
399 PINCTRL_PIN(17, "AD[25]"), /* B1 */
400 PINCTRL_PIN(18, "CSn[2]"), /* B2 */
401 PINCTRL_PIN(19, "CSn[6]"), /* B3 */
402 PINCTRL_PIN(20, "AD[20]"), /* B4 */
403 PINCTRL_PIN(21, "DA[30]"), /* B5 */
404 PINCTRL_PIN(22, "AD[18]"), /* B6 */
405 PINCTRL_PIN(23, "HGPIO[3]"), /* B7 */
406 PINCTRL_PIN(24, "AD[17]"), /* B8 */
407 PINCTRL_PIN(25, "RXCLK"), /* B9 */
408 PINCTRL_PIN(26, "MIIRXD[1]"), /* B10 */
409 PINCTRL_PIN(27, "MIITXD[2]"), /* B11 */
410 PINCTRL_PIN(28, "TXEN"), /* B12 */
411 PINCTRL_PIN(29, "FGPIO[5]"), /* B13 */
412 PINCTRL_PIN(30, "EGPIO[15]"), /* B14 */
413 PINCTRL_PIN(31, "USBp[2]"), /* B15 */
414 PINCTRL_PIN(32, "ARSTn"), /* B16 */
415 PINCTRL_PIN(33, "ADC_VDD"), /* B17 */
416 /* Row C */
417 PINCTRL_PIN(34, "AD[23]"), /* C1 */
418 PINCTRL_PIN(35, "DA[26]"), /* C2 */
419 PINCTRL_PIN(36, "CSn[3]"), /* C3 */
420 PINCTRL_PIN(37, "DA[25]"), /* C4 */
421 PINCTRL_PIN(38, "AD[24]"), /* C5 */
422 PINCTRL_PIN(39, "AD[19]"), /* C6 */
423 PINCTRL_PIN(40, "HGPIO[5]"), /* C7 */
424 PINCTRL_PIN(41, "WRn"), /* C8 */
425 PINCTRL_PIN(42, "MDIO"), /* C9 */
426 PINCTRL_PIN(43, "MIIRXD[2]"), /* C10 */
427 PINCTRL_PIN(44, "TXCLK"), /* C11 */
428 PINCTRL_PIN(45, "MIITXD[0]"), /* C12 */
429 PINCTRL_PIN(46, "CLD"), /* C13 */
430 PINCTRL_PIN(47, "EGPIO[13]"), /* C14 */
431 PINCTRL_PIN(48, "TRSTn"), /* C15 */
432 PINCTRL_PIN(49, "Xp"), /* C16 */
433 PINCTRL_PIN(50, "Xm"), /* C17 */
434 /* Row D */
435 PINCTRL_PIN(51, "SDCSn[3]"), /* D1 */
436 PINCTRL_PIN(52, "DA[23]"), /* D2 */
437 PINCTRL_PIN(53, "SDCLK"), /* D3 */
438 PINCTRL_PIN(54, "DA[24]"), /* D4 */
439 PINCTRL_PIN(55, "HGPIO[7]"), /* D5 */
440 PINCTRL_PIN(56, "HGPIO[6]"), /* D6 */
441 PINCTRL_PIN(57, "A[28]"), /* D7 */
442 PINCTRL_PIN(58, "HGPIO[4]"), /* D8 */
443 PINCTRL_PIN(59, "AD[16]"), /* D9 */
444 PINCTRL_PIN(60, "MDC"), /* D10 */
445 PINCTRL_PIN(61, "RXERR"), /* D11 */
446 PINCTRL_PIN(62, "MIITXD[3]"), /* D12 */
447 PINCTRL_PIN(63, "EGPIO[12]"), /* D13 */
448 PINCTRL_PIN(64, "EGPIO[1]"), /* D14 */
449 PINCTRL_PIN(65, "EGPIO[0]"), /* D15 */
450 PINCTRL_PIN(66, "Ym"), /* D16 */
451 PINCTRL_PIN(67, "Yp"), /* D17 */
452 /* Row E */
453 PINCTRL_PIN(68, "SDCSn[2]"), /* E1 */
454 PINCTRL_PIN(69, "SDWEN"), /* E2 */
455 PINCTRL_PIN(70, "DA[22]"), /* E3 */
456 PINCTRL_PIN(71, "AD[3]"), /* E4 */
457 PINCTRL_PIN(72, "DA[15]"), /* E5 */
458 PINCTRL_PIN(73, "AD[21]"), /* E6 */
459 PINCTRL_PIN(74, "DA[17]"), /* E7 */
460 PINCTRL_PIN(75, "vddr"), /* E8 */
461 PINCTRL_PIN(76, "vddr"), /* E9 */
462 PINCTRL_PIN(77, "vddr"), /* E10 */
463 PINCTRL_PIN(78, "MIIRXD[0]"), /* E11 */
464 PINCTRL_PIN(79, "TXERR"), /* E12 */
465 PINCTRL_PIN(80, "EGPIO[2]"), /* E13 */
466 PINCTRL_PIN(81, "EGPIO[4]"), /* E14 */
467 PINCTRL_PIN(82, "EGPIO[3]"), /* E15 */
468 PINCTRL_PIN(83, "sXp"), /* E16 */
469 PINCTRL_PIN(84, "sXm"), /* E17 */
470 /* Row F */
471 PINCTRL_PIN(85, "RASn"), /* F1 */
472 PINCTRL_PIN(86, "SDCSn[1]"), /* F2 */
473 PINCTRL_PIN(87, "SDCSn[0]"), /* F3 */
474 PINCTRL_PIN(88, "DQMn[3]"), /* F4 */
475 PINCTRL_PIN(89, "AD[5]"), /* F5 */
476 PINCTRL_PIN(90, "gndr"), /* F6 */
477 PINCTRL_PIN(91, "gndr"), /* F7 */
478 PINCTRL_PIN(92, "gndr"), /* F8 */
479 PINCTRL_PIN(93, "vddc"), /* F9 */
480 PINCTRL_PIN(94, "vddc"), /* F10 */
481 PINCTRL_PIN(95, "gndr"), /* F11 */
482 PINCTRL_PIN(96, "EGPIO[7]"), /* F12 */
483 PINCTRL_PIN(97, "EGPIO[5]"), /* F13 */
484 PINCTRL_PIN(98, "ADC GND"), /* F14 */
485 PINCTRL_PIN(99, "EGPIO[6]"), /* F15 */
486 PINCTRL_PIN(100, "sYm"), /* F16 */
487 PINCTRL_PIN(101, "syp"), /* F17 */
488 /* Row G */
489 PINCTRL_PIN(102, "DQMn[0]"), /* G1 */
490 PINCTRL_PIN(103, "CASn"), /* G2 */
491 PINCTRL_PIN(104, "DA[21]"), /* G3 */
492 PINCTRL_PIN(105, "AD[22]"), /* G4 */
493 PINCTRL_PIN(106, "vddr"), /* G5 */
494 PINCTRL_PIN(107, "gndr"), /* G6 */
495 PINCTRL_PIN(108, "gndr"), /* G12 */
496 PINCTRL_PIN(109, "EGPIO[9]"), /* G13 */
497 PINCTRL_PIN(110, "EGPIO[10]"), /* G14 */
498 PINCTRL_PIN(111, "EGPIO[11]"), /* G15 */
499 PINCTRL_PIN(112, "RTCXTALO"), /* G16 */
500 PINCTRL_PIN(113, "RTCXTALI"), /* G17 */
501 /* Row H */
502 PINCTRL_PIN(114, "DA[18]"), /* H1 */
503 PINCTRL_PIN(115, "DA[20]"), /* H2 */
504 PINCTRL_PIN(116, "DA[19]"), /* H3 */
505 PINCTRL_PIN(117, "DA[16]"), /* H4 */
506 PINCTRL_PIN(118, "vddr"), /* H5 */
507 PINCTRL_PIN(119, "vddc"), /* H6 */
508 PINCTRL_PIN(120, "gndc"), /* H7 */
509 PINCTRL_PIN(121, "gndc"), /* H9 */
510 PINCTRL_PIN(122, "gndc"), /* H10 */
511 PINCTRL_PIN(123, "gndr"), /* H12 */
512 PINCTRL_PIN(124, "vddr"), /* H13 */
513 PINCTRL_PIN(125, "EGPIO[8]"), /* H14 */
514 PINCTRL_PIN(126, "PRSTN"), /* H15 */
515 PINCTRL_PIN(127, "COL[7]"), /* H16 */
516 PINCTRL_PIN(128, "RSTON"), /* H17 */
517 /* Row J */
518 PINCTRL_PIN(129, "AD[6]"), /* J1 */
519 PINCTRL_PIN(130, "DA[14]"), /* J2 */
520 PINCTRL_PIN(131, "AD[7]"), /* J3 */
521 PINCTRL_PIN(132, "DA[13]"), /* J4 */
522 PINCTRL_PIN(133, "vddr"), /* J5 */
523 PINCTRL_PIN(134, "vddc"), /* J6 */
524 PINCTRL_PIN(135, "gndc"), /* J8 */
525 PINCTRL_PIN(136, "gndc"), /* J10 */
526 PINCTRL_PIN(137, "vddc"), /* J12 */
527 PINCTRL_PIN(138, "vddr"), /* J13 */
528 PINCTRL_PIN(139, "COL[5]"), /* J14 */
529 PINCTRL_PIN(140, "COL[6]"), /* J15 */
530 PINCTRL_PIN(141, "CSn[0]"), /* J16 */
531 PINCTRL_PIN(142, "COL[3]"), /* J17 */
532 /* Row K */
533 PINCTRL_PIN(143, "AD[4]"), /* K1 */
534 PINCTRL_PIN(144, "DA[12]"), /* K2 */
535 PINCTRL_PIN(145, "DA[10]"), /* K3 */
536 PINCTRL_PIN(146, "DA[11]"), /* K4 */
537 PINCTRL_PIN(147, "vddr"), /* K5 */
538 PINCTRL_PIN(148, "gndr"), /* K6 */
539 PINCTRL_PIN(149, "gndc"), /* K8 */
540 PINCTRL_PIN(150, "gndc"), /* K9 */
541 PINCTRL_PIN(151, "gndc"), /* K10 */
542 PINCTRL_PIN(152, "vddc"), /* K12 */
543 PINCTRL_PIN(153, "COL[4]"), /* K13 */
544 PINCTRL_PIN(154, "PLL_VDD"), /* K14 */
545 PINCTRL_PIN(155, "COL[2]"), /* K15 */
546 PINCTRL_PIN(156, "COL[1]"), /* K16 */
547 PINCTRL_PIN(157, "COL[0]"), /* K17 */
548 /* Row L */
549 PINCTRL_PIN(158, "DA[9]"), /* L1 */
550 PINCTRL_PIN(159, "AD[2]"), /* L2 */
551 PINCTRL_PIN(160, "AD[1]"), /* L3 */
552 PINCTRL_PIN(161, "DA[8]"), /* L4 */
553 PINCTRL_PIN(162, "BLANK"), /* L5 */
554 PINCTRL_PIN(163, "gndr"), /* L6 */
555 PINCTRL_PIN(164, "gndr"), /* L7 */
556 PINCTRL_PIN(165, "ROW[7]"), /* L8 */
557 PINCTRL_PIN(166, "ROW[5]"), /* L9 */
558 PINCTRL_PIN(167, "PLL GND"), /* L10 */
559 PINCTRL_PIN(168, "XTALI"), /* L11 */
560 PINCTRL_PIN(169, "XTALO"), /* L12 */
561 /* Row M */
562 PINCTRL_PIN(170, "BRIGHT"), /* M1 */
563 PINCTRL_PIN(171, "AD[0]"), /* M2 */
564 PINCTRL_PIN(172, "DQMn[1]"), /* M3 */
565 PINCTRL_PIN(173, "DQMn[2]"), /* M4 */
566 PINCTRL_PIN(174, "P[17]"), /* M5 */
567 PINCTRL_PIN(175, "gndr"), /* M6 */
568 PINCTRL_PIN(176, "gndr"), /* M7 */
569 PINCTRL_PIN(177, "vddc"), /* M8 */
570 PINCTRL_PIN(178, "vddc"), /* M9 */
571 PINCTRL_PIN(179, "gndr"), /* M10 */
572 PINCTRL_PIN(180, "gndr"), /* M11 */
573 PINCTRL_PIN(181, "ROW[6]"), /* M12 */
574 PINCTRL_PIN(182, "ROW[4]"), /* M13 */
575 PINCTRL_PIN(183, "ROW[1]"), /* M14 */
576 PINCTRL_PIN(184, "ROW[0]"), /* M15 */
577 PINCTRL_PIN(185, "ROW[3]"), /* M16 */
578 PINCTRL_PIN(186, "ROW[2]"), /* M17 */
579 /* Row N */
580 PINCTRL_PIN(187, "P[14]"), /* N1 */
581 PINCTRL_PIN(188, "P[16]"), /* N2 */
582 PINCTRL_PIN(189, "P[15]"), /* N3 */
583 PINCTRL_PIN(190, "P[13]"), /* N4 */
584 PINCTRL_PIN(191, "P[12]"), /* N5 */
585 PINCTRL_PIN(192, "DA[5]"), /* N6 */
586 PINCTRL_PIN(193, "vddr"), /* N7 */
587 PINCTRL_PIN(194, "vddr"), /* N8 */
588 PINCTRL_PIN(195, "vddr"), /* N9 */
589 PINCTRL_PIN(196, "vddr"), /* N10 */
590 PINCTRL_PIN(197, "EECLK"), /* N11 */
591 PINCTRL_PIN(198, "ASDO"), /* N12 */
592 PINCTRL_PIN(199, "CTSn"), /* N13 */
593 PINCTRL_PIN(200, "RXD[0]"), /* N14 */
594 PINCTRL_PIN(201, "TXD[0]"), /* N15 */
595 PINCTRL_PIN(202, "TXD[1]"), /* N16 */
596 PINCTRL_PIN(203, "TXD[2]"), /* N17 */
597 /* Row P */
598 PINCTRL_PIN(204, "SPCLK"), /* P1 */
599 PINCTRL_PIN(205, "P[10]"), /* P2 */
600 PINCTRL_PIN(206, "P[11]"), /* P3 */
601 PINCTRL_PIN(207, "P[3]"), /* P4 */
602 PINCTRL_PIN(208, "AD[15]"), /* P5 */
603 PINCTRL_PIN(209, "AD[13]"), /* P6 */
604 PINCTRL_PIN(210, "AD[12]"), /* P7 */
605 PINCTRL_PIN(211, "DA[2]"), /* P8 */
606 PINCTRL_PIN(212, "AD[8]"), /* P9 */
607 PINCTRL_PIN(213, "TCK"), /* P10 */
608 PINCTRL_PIN(214, "BOOT[1]"), /* P11 */
609 PINCTRL_PIN(215, "EEDAT"), /* P12 */
610 PINCTRL_PIN(216, "GRLED"), /* P13 */
611 PINCTRL_PIN(217, "RDLED"), /* P14 */
612 PINCTRL_PIN(218, "GGPIO[2]"), /* P15 */
613 PINCTRL_PIN(219, "RXD[1]"), /* P16 */
614 PINCTRL_PIN(220, "RXD[2]"), /* P17 */
615 /* Row R */
616 PINCTRL_PIN(221, "P[9]"), /* R1 */
617 PINCTRL_PIN(222, "HSYNC"), /* R2 */
618 PINCTRL_PIN(223, "P[6]"), /* R3 */
619 PINCTRL_PIN(224, "P[5]"), /* R4 */
620 PINCTRL_PIN(225, "P[0]"), /* R5 */
621 PINCTRL_PIN(226, "AD[14]"), /* R6 */
622 PINCTRL_PIN(227, "DA[4]"), /* R7 */
623 PINCTRL_PIN(228, "DA[1]"), /* R8 */
624 PINCTRL_PIN(229, "DTRn"), /* R9 */
625 PINCTRL_PIN(230, "TDI"), /* R10 */
626 PINCTRL_PIN(231, "BOOT[0]"), /* R11 */
627 PINCTRL_PIN(232, "ASYNC"), /* R12 */
628 PINCTRL_PIN(233, "SSPTX[1]"), /* R13 */
629 PINCTRL_PIN(234, "PWMOUT"), /* R14 */
630 PINCTRL_PIN(235, "USBm[0]"), /* R15 */
631 PINCTRL_PIN(236, "ABITCLK"), /* R16 */
632 PINCTRL_PIN(237, "USBp[0]"), /* R17 */
633 /* Row T */
634 PINCTRL_PIN(238, "NC"), /* T1 */
635 PINCTRL_PIN(239, "NC"), /* T2 */
636 PINCTRL_PIN(240, "V_CSYNC"), /* T3 */
637 PINCTRL_PIN(241, "P[7]"), /* T4 */
638 PINCTRL_PIN(242, "P[2]"), /* T5 */
639 PINCTRL_PIN(243, "DA[7]"), /* T6 */
640 PINCTRL_PIN(244, "AD[11]"), /* T7 */
641 PINCTRL_PIN(245, "AD[9]"), /* T8 */
642 PINCTRL_PIN(246, "DSRn"), /* T9 */
643 PINCTRL_PIN(247, "TMS"), /* T10 */
644 PINCTRL_PIN(248, "gndr"), /* T11 */
645 PINCTRL_PIN(249, "SFRM[1]"), /* T12 */
646 PINCTRL_PIN(250, "INT[2]"), /* T13 */
647 PINCTRL_PIN(251, "INT[0]"), /* T14 */
648 PINCTRL_PIN(252, "USBp[1]"), /* T15 */
649 PINCTRL_PIN(253, "NC"), /* T16 */
650 PINCTRL_PIN(254, "NC"), /* T17 */
651 /* Row U */
652 PINCTRL_PIN(255, "NC"), /* U1 */
653 PINCTRL_PIN(256, "NC"), /* U2 */
654 PINCTRL_PIN(257, "P[8]"), /* U3 */
655 PINCTRL_PIN(258, "P[4]"), /* U4 */
656 PINCTRL_PIN(259, "P[1]"), /* U5 */
657 PINCTRL_PIN(260, "DA[6]"), /* U6 */
658 PINCTRL_PIN(261, "DA[3]"), /* U7 */
659 PINCTRL_PIN(262, "AD[10]"), /* U8 */
660 PINCTRL_PIN(263, "DA[0]"), /* U9 */
661 PINCTRL_PIN(264, "TDO"), /* U10 */
662 PINCTRL_PIN(265, "NC"), /* U11 */
663 PINCTRL_PIN(266, "SCLK[1]"), /* U12 */
664 PINCTRL_PIN(267, "SSPRX[1]"), /* U13 */
665 PINCTRL_PIN(268, "INT[1]"), /* U14 */
666 PINCTRL_PIN(269, "RTSn"), /* U15 */
667 PINCTRL_PIN(270, "USBm[1]"), /* U16 */
668 PINCTRL_PIN(271, "NC"), /* U17 */
669 };
670
671 static const unsigned int ssp_ep9307_pins[] = {
672 233, 249, 266, 267,
673 };
674
675 static const unsigned int ac97_ep9307_pins[] = {
676 16, 32, 198, 232, 236,
677 };
678
679 /* I can't find info on those - it's some internal state */
680 static const unsigned int raster_on_sdram0_pins[] = {
681 };
682
683 static const unsigned int raster_on_sdram3_pins[] = {
684 };
685
686 /* ROW[N] */
687 static const unsigned int gpio2a_9307_pins[] = {
688 165, 166, 181, 182, 183, 184, 185, 186,
689 };
690
691 /* COL[N] */
692 static const unsigned int gpio3a_9307_pins[] = {
693 127, 139, 140, 142, 153, 155, 156, 157,
694 };
695
696 static const unsigned int keypad_9307_pins[] = {
697 127, 139, 140, 142, 153, 155, 156, 157,
698 165, 166, 181, 182, 183, 184, 185, 186,
699 };
700
701 /* ep9307 have only 4,5 pin of GPIO E Port exposed */
702 static const unsigned int gpio4a_9307_pins[] = { 216, 217 };
703
704 /* ep9307 have only 2 pin of GPIO G Port exposed */
705 static const unsigned int gpio6a_9307_pins[] = { 219 };
706
707 static const unsigned int gpio7a_9307_pins[] = { 7, 24, 41, 56, 57, 59 };
708
709 static const struct ep93xx_pin_group ep9307_pin_groups[] = {
710 PMX_GROUP("ssp", ssp_ep9307_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP, 0),
711 PMX_GROUP("i2s_on_ssp", ssp_ep9307_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP,
712 EP93XX_SYSCON_DEVCFG_I2SONSSP),
713 PMX_GROUP("ac97", ac97_ep9307_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97, 0),
714 PMX_GROUP("i2s_on_ac97", ac97_ep9301_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97,
715 EP93XX_SYSCON_DEVCFG_I2SONAC97),
716 PMX_GROUP("rasteronsdram0grp", raster_on_sdram0_pins, EP93XX_SYSCON_DEVCFG_RASONP3, 0),
717 PMX_GROUP("rasteronsdram3grp", raster_on_sdram3_pins, EP93XX_SYSCON_DEVCFG_RASONP3,
718 EP93XX_SYSCON_DEVCFG_RASONP3),
719 PMX_GROUP("gpio2agrp", gpio2a_9307_pins, EP93XX_SYSCON_DEVCFG_GONK,
720 EP93XX_SYSCON_DEVCFG_GONK),
721 PMX_GROUP("gpio3agrp", gpio3a_9307_pins, EP93XX_SYSCON_DEVCFG_GONK,
722 EP93XX_SYSCON_DEVCFG_GONK),
723 PMX_GROUP("keypadgrp", keypad_9307_pins, EP93XX_SYSCON_DEVCFG_GONK, 0),
724 PMX_GROUP("gpio4agrp", gpio4a_9307_pins, EP93XX_SYSCON_DEVCFG_EONIDE,
725 EP93XX_SYSCON_DEVCFG_EONIDE),
726 PMX_GROUP("gpio6agrp", gpio6a_9307_pins, EP93XX_SYSCON_DEVCFG_GONIDE,
727 EP93XX_SYSCON_DEVCFG_GONIDE),
728 PMX_GROUP("gpio7agrp", gpio7a_9307_pins, EP93XX_SYSCON_DEVCFG_HONIDE,
729 EP93XX_SYSCON_DEVCFG_HONIDE),
730 };
731
732 /* ep9312, ep9315 */
733 static const struct pinctrl_pin_desc ep9312_pins[] = {
734 /* Row A */
735 PINCTRL_PIN(0, "CSN[7]"), /* A1 */
736 PINCTRL_PIN(1, "DA[28]"), /* A2 */
737 PINCTRL_PIN(2, "AD[18]"), /* A3 */
738 PINCTRL_PIN(3, "DD[8]"), /* A4 */
739 PINCTRL_PIN(4, "DD[4]"), /* A5 */
740 PINCTRL_PIN(5, "AD[17]"), /* A6 */
741 PINCTRL_PIN(6, "RDN"), /* A7 */
742 PINCTRL_PIN(7, "RXCLK"), /* A8 */
743 PINCTRL_PIN(8, "MIIRXD[0]"), /* A9 */
744 PINCTRL_PIN(9, "RXDVAL"), /* A10 */
745 PINCTRL_PIN(10, "MIITXD[2]"), /* A11 */
746 PINCTRL_PIN(11, "TXERR"), /* A12 */
747 PINCTRL_PIN(12, "CLD"), /* A13 */
748 PINCTRL_PIN(13, "NC"), /* A14 */
749 PINCTRL_PIN(14, "NC"), /* A15 */
750 PINCTRL_PIN(15, "NC"), /* A16 */
751 PINCTRL_PIN(16, "EGPIO[12]"), /* A17 */
752 PINCTRL_PIN(17, "EGPIO[15]"), /* A18 */
753 PINCTRL_PIN(18, "NC"), /* A19 */
754 PINCTRL_PIN(19, "NC"), /* A20 */
755 /* Row B */
756 PINCTRL_PIN(20, "CSN[2]"), /* B1 */
757 PINCTRL_PIN(21, "DA[31]"), /* B2 */
758 PINCTRL_PIN(22, "DA[30]"), /* B3 */
759 PINCTRL_PIN(23, "DA[27]"), /* B4 */
760 PINCTRL_PIN(24, "DD[7]"), /* B5 */
761 PINCTRL_PIN(25, "DD[3]"), /* B6 */
762 PINCTRL_PIN(26, "WRN"), /* B7 */
763 PINCTRL_PIN(27, "MDIO"), /* B8 */
764 PINCTRL_PIN(28, "MIIRXD[1]"), /* B9 */
765 PINCTRL_PIN(29, "RXERR"), /* B10 */
766 PINCTRL_PIN(30, "MIITXD[1]"), /* B11 */
767 PINCTRL_PIN(31, "CRS"), /* B12 */
768 PINCTRL_PIN(32, "NC"), /* B13 */
769 PINCTRL_PIN(33, "NC"), /* B14 */
770 PINCTRL_PIN(34, "NC"), /* B15 */
771 PINCTRL_PIN(35, "NC"), /* B16 */
772 PINCTRL_PIN(36, "EGPIO[13]"), /* B17 */
773 PINCTRL_PIN(37, "NC"), /* B18 */
774 PINCTRL_PIN(38, "WAITN"), /* B19 */
775 PINCTRL_PIN(39, "TRSTN"), /* B20 */
776 /* Row C */
777 PINCTRL_PIN(40, "CSN[1]"), /* C1 */
778 PINCTRL_PIN(41, "CSN[3]"), /* C2 */
779 PINCTRL_PIN(42, "AD[20]"), /* C3 */
780 PINCTRL_PIN(43, "DA[29]"), /* C4 */
781 PINCTRL_PIN(44, "DD[10]"), /* C5 */
782 PINCTRL_PIN(45, "DD[6]"), /* C6 */
783 PINCTRL_PIN(46, "DD[2]"), /* C7 */
784 PINCTRL_PIN(47, "MDC"), /* C8 */
785 PINCTRL_PIN(48, "MIIRXD[3]"), /* C9 */
786 PINCTRL_PIN(49, "TXCLK"), /* C10 */
787 PINCTRL_PIN(50, "MIITXD[0]"), /* C11 */
788 PINCTRL_PIN(51, "NC"), /* C12 */
789 PINCTRL_PIN(52, "NC"), /* C13 */
790 PINCTRL_PIN(53, "NC"), /* C14 */
791 PINCTRL_PIN(54, "NC"), /* C15 */
792 PINCTRL_PIN(55, "NC"), /* C16 */
793 PINCTRL_PIN(56, "NC"), /* C17 */
794 PINCTRL_PIN(57, "USBP[2]"), /* C18 */
795 PINCTRL_PIN(58, "IORDY"), /* C19 */
796 PINCTRL_PIN(59, "DMACKN"), /* C20 */
797 /* Row D */
798 PINCTRL_PIN(60, "AD[24]"), /* D1 */
799 PINCTRL_PIN(61, "DA[25]"), /* D2 */
800 PINCTRL_PIN(62, "DD[11]"), /* D3 */
801 PINCTRL_PIN(63, "SDCLKEN"), /* D4 */
802 PINCTRL_PIN(64, "AD[19]"), /* D5 */
803 PINCTRL_PIN(65, "DD[9]"), /* D6 */
804 PINCTRL_PIN(66, "DD[5]"), /* D7 */
805 PINCTRL_PIN(67, "AD[16]"), /* D8 */
806 PINCTRL_PIN(68, "MIIRXD[2]"), /* D9 */
807 PINCTRL_PIN(69, "MIITXD[3]"), /* D10 */
808 PINCTRL_PIN(70, "TXEN"), /* D11 */
809 PINCTRL_PIN(71, "NC"), /* D12 */
810 PINCTRL_PIN(72, "NC"), /* D13 */
811 PINCTRL_PIN(73, "NC"), /* D14 */
812 PINCTRL_PIN(74, "EGPIO[14]"), /* D15 */
813 PINCTRL_PIN(75, "NC"), /* D16 */
814 PINCTRL_PIN(76, "USBM[2]"), /* D17 */
815 PINCTRL_PIN(77, "ARSTN"), /* D18 */
816 PINCTRL_PIN(78, "DIORN"), /* D19 */
817 PINCTRL_PIN(79, "EGPIO[1]"), /* D20 */
818 /* Row E */
819 PINCTRL_PIN(80, "AD[23]"), /* E1 */
820 PINCTRL_PIN(81, "DA[23]"), /* E2 */
821 PINCTRL_PIN(82, "DA[26]"), /* E3 */
822 PINCTRL_PIN(83, "CSN[6]"), /* E4 */
823 PINCTRL_PIN(84, "GND"), /* E5 */
824 PINCTRL_PIN(85, "GND"), /* E6 */
825 PINCTRL_PIN(86, "CVDD"), /* E7 */
826 PINCTRL_PIN(87, "CVDD"), /* E8 */
827 PINCTRL_PIN(88, "RVDD"), /* E9 */
828 PINCTRL_PIN(89, "GND"), /* E10 */
829 PINCTRL_PIN(90, "GND"), /* E11 */
830 PINCTRL_PIN(91, "RVDD"), /* E12 */
831 PINCTRL_PIN(92, "CVDD"), /* E13 */
832 PINCTRL_PIN(93, "CVDD"), /* E14 */
833 PINCTRL_PIN(94, "GND"), /* E15 */
834 PINCTRL_PIN(95, "ASDI"), /* E16 */
835 PINCTRL_PIN(96, "DIOWN"), /* E17 */
836 PINCTRL_PIN(97, "EGPIO[0]"), /* E18 */
837 PINCTRL_PIN(98, "EGPIO[3]"), /* E19 */
838 PINCTRL_PIN(99, "EGPIO[5]"), /* E20 */
839 /* Row F */
840 PINCTRL_PIN(100, "SDCSN[3]"), /* F1 */
841 PINCTRL_PIN(101, "DA[22]"), /* F2 */
842 PINCTRL_PIN(102, "DA[24]"), /* F3 */
843 PINCTRL_PIN(103, "AD[25]"), /* F4 */
844 PINCTRL_PIN(104, "RVDD"), /* F5 */
845 PINCTRL_PIN(105, "GND"), /* F6 */
846 PINCTRL_PIN(106, "CVDD"), /* F7 */
847 PINCTRL_PIN(107, "CVDD"), /* F14 */
848 PINCTRL_PIN(108, "GND"), /* F15 */
849 PINCTRL_PIN(109, "GND"), /* F16 */
850 PINCTRL_PIN(110, "EGPIO[2]"), /* F17 */
851 PINCTRL_PIN(111, "EGPIO[4]"), /* F18 */
852 PINCTRL_PIN(112, "EGPIO[6]"), /* F19 */
853 PINCTRL_PIN(113, "EGPIO[8]"), /* F20 */
854 /* Row G */
855 PINCTRL_PIN(114, "SDCSN[0]"), /* G1 */
856 PINCTRL_PIN(115, "SDCSN[1]"), /* G2 */
857 PINCTRL_PIN(116, "SDWEN"), /* G3 */
858 PINCTRL_PIN(117, "SDCLK"), /* G4 */
859 PINCTRL_PIN(118, "RVDD"), /* G5 */
860 PINCTRL_PIN(119, "RVDD"), /* G6 */
861 PINCTRL_PIN(120, "RVDD"), /* G15 */
862 PINCTRL_PIN(121, "RVDD"), /* G16 */
863 PINCTRL_PIN(122, "EGPIO[7]"), /* G17 */
864 PINCTRL_PIN(123, "EGPIO[9]"), /* G18 */
865 PINCTRL_PIN(124, "EGPIO[10]"), /* G19 */
866 PINCTRL_PIN(125, "EGPIO[11]"), /* G20 */
867 /* Row H */
868 PINCTRL_PIN(126, "DQMN[3]"), /* H1 */
869 PINCTRL_PIN(127, "CASN"), /* H2 */
870 PINCTRL_PIN(128, "RASN"), /* H3 */
871 PINCTRL_PIN(129, "SDCSN[2]"), /* H4 */
872 PINCTRL_PIN(130, "CVDD"), /* H5 */
873 PINCTRL_PIN(131, "GND"), /* H8 */
874 PINCTRL_PIN(132, "GND"), /* H9 */
875 PINCTRL_PIN(133, "GND"), /* H10 */
876 PINCTRL_PIN(134, "GND"), /* H11 */
877 PINCTRL_PIN(135, "GND"), /* H12 */
878 PINCTRL_PIN(136, "GND"), /* H13 */
879 PINCTRL_PIN(137, "RVDD"), /* H16 */
880 PINCTRL_PIN(138, "RTCXTALO"), /* H17 */
881 PINCTRL_PIN(139, "ADC_VDD"), /* H18 */
882 PINCTRL_PIN(140, "ADC_GND"), /* H19 */
883 PINCTRL_PIN(141, "XP"), /* H20 */
884 /* Row J */
885 PINCTRL_PIN(142, "DA[21]"), /* J1 */
886 PINCTRL_PIN(143, "DQMN[0]"), /* J2 */
887 PINCTRL_PIN(144, "DQMN[1]"), /* J3 */
888 PINCTRL_PIN(145, "DQMN[2]"), /* J4 */
889 PINCTRL_PIN(146, "GND"), /* J5 */
890 PINCTRL_PIN(147, "GND"), /* J8 */
891 PINCTRL_PIN(148, "GND"), /* J9 */
892 PINCTRL_PIN(149, "GND"), /* J10 */
893 PINCTRL_PIN(150, "GND"), /* J11 */
894 PINCTRL_PIN(151, "GND"), /* J12 */
895 PINCTRL_PIN(152, "GND"), /* J13 */
896 PINCTRL_PIN(153, "CVDD"), /* J16 */
897 PINCTRL_PIN(154, "RTCXTALI"), /* J17 */
898 PINCTRL_PIN(155, "XM"), /* J18 */
899 PINCTRL_PIN(156, "YP"), /* J19 */
900 PINCTRL_PIN(157, "YM"), /* J20 */
901 /* Row K */
902 PINCTRL_PIN(158, "AD[22]"), /* K1 */
903 PINCTRL_PIN(159, "DA[20]"), /* K2 */
904 PINCTRL_PIN(160, "AD[21]"), /* K3 */
905 PINCTRL_PIN(161, "DA[19]"), /* K4 */
906 PINCTRL_PIN(162, "RVDD"), /* K5 */
907 PINCTRL_PIN(163, "GND"), /* K8 */
908 PINCTRL_PIN(164, "GND"), /* K9 */
909 PINCTRL_PIN(165, "GND"), /* K10 */
910 PINCTRL_PIN(166, "GND"), /* K11 */
911 PINCTRL_PIN(167, "GND"), /* K12 */
912 PINCTRL_PIN(168, "GND"), /* K13 */
913 PINCTRL_PIN(169, "CVDD"), /* K16 */
914 PINCTRL_PIN(170, "SYM"), /* K17 */
915 PINCTRL_PIN(171, "SYP"), /* K18 */
916 PINCTRL_PIN(172, "SXM"), /* K19 */
917 PINCTRL_PIN(173, "SXP"), /* K20 */
918 /* Row L */
919 PINCTRL_PIN(174, "DA[18]"), /* L1 */
920 PINCTRL_PIN(175, "DA[17]"), /* L2 */
921 PINCTRL_PIN(176, "DA[16]"), /* L3 */
922 PINCTRL_PIN(177, "DA[15]"), /* L4 */
923 PINCTRL_PIN(178, "GND"), /* L5 */
924 PINCTRL_PIN(179, "GND"), /* L8 */
925 PINCTRL_PIN(180, "GND"), /* L9 */
926 PINCTRL_PIN(181, "GND"), /* L10 */
927 PINCTRL_PIN(182, "GND"), /* L11 */
928 PINCTRL_PIN(183, "GND"), /* L12 */
929 PINCTRL_PIN(184, "GND"), /* L13 */
930 PINCTRL_PIN(185, "CVDD"), /* L16 */
931 PINCTRL_PIN(186, "COL[5]"), /* L17 */
932 PINCTRL_PIN(187, "COL[7]"), /* L18 */
933 PINCTRL_PIN(188, "RSTON"), /* L19 */
934 PINCTRL_PIN(189, "PRSTN"), /* L20 */
935 /* Row M */
936 PINCTRL_PIN(190, "AD[7]"), /* M1 */
937 PINCTRL_PIN(191, "DA[14]"), /* M2 */
938 PINCTRL_PIN(192, "AD[6]"), /* M3 */
939 PINCTRL_PIN(193, "AD[5]"), /* M4 */
940 PINCTRL_PIN(194, "CVDD"), /* M5 */
941 PINCTRL_PIN(195, "GND"), /* M8 */
942 PINCTRL_PIN(196, "GND"), /* M9 */
943 PINCTRL_PIN(197, "GND"), /* M10 */
944 PINCTRL_PIN(198, "GND"), /* M11 */
945 PINCTRL_PIN(199, "GND"), /* M12 */
946 PINCTRL_PIN(200, "GND"), /* M13 */
947 PINCTRL_PIN(201, "GND"), /* M16 */
948 PINCTRL_PIN(202, "COL[4]"), /* M17 */
949 PINCTRL_PIN(203, "COL[3]"), /* M18 */
950 PINCTRL_PIN(204, "COL[6]"), /* M19 */
951 PINCTRL_PIN(205, "CSN[0]"), /* M20 */
952 /* Row N */
953 PINCTRL_PIN(206, "DA[13]"), /* N1 */
954 PINCTRL_PIN(207, "DA[12]"), /* N2 */
955 PINCTRL_PIN(208, "DA[11]"), /* N3 */
956 PINCTRL_PIN(209, "AD[3]"), /* N4 */
957 PINCTRL_PIN(210, "CVDD"), /* N5 */
958 PINCTRL_PIN(211, "CVDD"), /* N6 */
959 PINCTRL_PIN(212, "GND"), /* N8 */
960 PINCTRL_PIN(213, "GND"), /* N9 */
961 PINCTRL_PIN(214, "GND"), /* N10 */
962 PINCTRL_PIN(215, "GND"), /* N11 */
963 PINCTRL_PIN(216, "GND"), /* N12 */
964 PINCTRL_PIN(217, "GND"), /* N13 */
965 PINCTRL_PIN(218, "GND"), /* N15 */
966 PINCTRL_PIN(219, "GND"), /* N16 */
967 PINCTRL_PIN(220, "XTALO"), /* N17 */
968 PINCTRL_PIN(221, "COL[0]"), /* N18 */
969 PINCTRL_PIN(222, "COL[1]"), /* N19 */
970 PINCTRL_PIN(223, "COL[2]"), /* N20 */
971 /* Row P */
972 PINCTRL_PIN(224, "AD[4]"), /* P1 */
973 PINCTRL_PIN(225, "DA[10]"), /* P2 */
974 PINCTRL_PIN(226, "DA[9]"), /* P3 */
975 PINCTRL_PIN(227, "BRIGHT"), /* P4 */
976 PINCTRL_PIN(228, "RVDD"), /* P5 */
977 PINCTRL_PIN(229, "RVDD"), /* P6 */
978 PINCTRL_PIN(230, "RVDD"), /* P15 */
979 PINCTRL_PIN(231, "RVDD"), /* P16 */
980 PINCTRL_PIN(232, "XTALI"), /* P17 */
981 PINCTRL_PIN(233, "PLL_VDD"), /* P18 */
982 PINCTRL_PIN(234, "ROW[6]"), /* P19 */
983 PINCTRL_PIN(235, "ROW[7]"), /* P20 */
984 /* Row R */
985 PINCTRL_PIN(236, "AD[2]"), /* R1 */
986 PINCTRL_PIN(237, "AD[1]"), /* R2 */
987 PINCTRL_PIN(238, "P[17]"), /* R3 */
988 PINCTRL_PIN(239, "P[14]"), /* R4 */
989 PINCTRL_PIN(240, "RVDD"), /* R5 */
990 PINCTRL_PIN(241, "RVDD"), /* R6 */
991 PINCTRL_PIN(242, "GND"), /* R7 */
992 PINCTRL_PIN(243, "CVDD"), /* R8 */
993 PINCTRL_PIN(244, "CVDD"), /* R13 */
994 PINCTRL_PIN(245, "GND"), /* R14 */
995 PINCTRL_PIN(246, "RVDD"), /* R15 */
996 PINCTRL_PIN(247, "RVDD"), /* R16 */
997 PINCTRL_PIN(248, "ROW[0]"), /* R17 */
998 PINCTRL_PIN(249, "ROW[3]"), /* R18 */
999 PINCTRL_PIN(250, "PLL_GND"), /* R19 */
1000 PINCTRL_PIN(251, "ROW[5]"), /* R20 */
1001 /* Row T */
1002 PINCTRL_PIN(252, "DA[8]"), /* T1 */
1003 PINCTRL_PIN(253, "BLANK"), /* T2 */
1004 PINCTRL_PIN(254, "P[13]"), /* T3 */
1005 PINCTRL_PIN(255, "SPCLK"), /* T4 */
1006 PINCTRL_PIN(256, "V_CSYNC"), /* T5 */
1007 PINCTRL_PIN(257, "DD[14]"), /* T6 */
1008 PINCTRL_PIN(258, "GND"), /* T7 */
1009 PINCTRL_PIN(259, "CVDD"), /* T8 */
1010 PINCTRL_PIN(260, "RVDD"), /* T9 */
1011 PINCTRL_PIN(261, "GND"), /* T10 */
1012 PINCTRL_PIN(262, "GND"), /* T11 */
1013 PINCTRL_PIN(263, "RVDD"), /* T12 */
1014 PINCTRL_PIN(264, "CVDD"), /* T13 */
1015 PINCTRL_PIN(265, "GND"), /* T14 */
1016 PINCTRL_PIN(266, "INT[0]"), /* T15 */
1017 PINCTRL_PIN(267, "USBM[1]"), /* T16 */
1018 PINCTRL_PIN(268, "RXD[0]"), /* T17 */
1019 PINCTRL_PIN(269, "TXD[2]"), /* T18 */
1020 PINCTRL_PIN(270, "ROW[2]"), /* T19 */
1021 PINCTRL_PIN(271, "ROW[4]"), /* T20 */
1022 /* Row U */
1023 PINCTRL_PIN(272, "AD[0]"), /* U1 */
1024 PINCTRL_PIN(273, "P[15]"), /* U2 */
1025 PINCTRL_PIN(274, "P[10]"), /* U3 */
1026 PINCTRL_PIN(275, "P[7]"), /* U4 */
1027 PINCTRL_PIN(276, "P[6]"), /* U5 */
1028 PINCTRL_PIN(277, "P[4]"), /* U6 */
1029 PINCTRL_PIN(278, "P[0]"), /* U7 */
1030 PINCTRL_PIN(279, "AD[13]"), /* U8 */
1031 PINCTRL_PIN(280, "DA[3]"), /* U9 */
1032 PINCTRL_PIN(281, "DA[0]"), /* U10 */
1033 PINCTRL_PIN(282, "DSRN"), /* U11 */
1034 PINCTRL_PIN(283, "BOOT[1]"), /* U12 */
1035 PINCTRL_PIN(284, "NC"), /* U13 */
1036 PINCTRL_PIN(285, "SSPRX1"), /* U14 */
1037 PINCTRL_PIN(286, "INT[1]"), /* U15 */
1038 PINCTRL_PIN(287, "PWMOUT"), /* U16 */
1039 PINCTRL_PIN(288, "USBM[0]"), /* U17 */
1040 PINCTRL_PIN(289, "RXD[1]"), /* U18 */
1041 PINCTRL_PIN(290, "TXD[1]"), /* U19 */
1042 PINCTRL_PIN(291, "ROW[1]"), /* U20 */
1043 /* Row V */
1044 PINCTRL_PIN(292, "P[16]"), /* V1 */
1045 PINCTRL_PIN(293, "P[11]"), /* V2 */
1046 PINCTRL_PIN(294, "P[8]"), /* V3 */
1047 PINCTRL_PIN(295, "DD[15]"), /* V4 */
1048 PINCTRL_PIN(296, "DD[13]"), /* V5 */
1049 PINCTRL_PIN(297, "P[1]"), /* V6 */
1050 PINCTRL_PIN(298, "AD[14]"), /* V7 */
1051 PINCTRL_PIN(299, "AD[12]"), /* V8 */
1052 PINCTRL_PIN(300, "DA[2]"), /* V9 */
1053 PINCTRL_PIN(301, "IDECS0N"), /* V10 */
1054 PINCTRL_PIN(302, "IDEDA[2]"), /* V11 */
1055 PINCTRL_PIN(303, "TDI"), /* V12 */
1056 PINCTRL_PIN(304, "GND"), /* V13 */
1057 PINCTRL_PIN(305, "ASYNC"), /* V14 */
1058 PINCTRL_PIN(306, "SSPTX1"), /* V15 */
1059 PINCTRL_PIN(307, "INT[2]"), /* V16 */
1060 PINCTRL_PIN(308, "RTSN"), /* V17 */
1061 PINCTRL_PIN(309, "USBP[0]"), /* V18 */
1062 PINCTRL_PIN(310, "CTSN"), /* V19 */
1063 PINCTRL_PIN(311, "TXD[0]"), /* V20 */
1064 /* Row W */
1065 PINCTRL_PIN(312, "P[12]"), /* W1 */
1066 PINCTRL_PIN(313, "P[9]"), /* W2 */
1067 PINCTRL_PIN(314, "DD[0]"), /* W3 */
1068 PINCTRL_PIN(315, "P[5]"), /* W4 */
1069 PINCTRL_PIN(316, "P[3]"), /* W5 */
1070 PINCTRL_PIN(317, "DA[7]"), /* W6 */
1071 PINCTRL_PIN(318, "DA[5]"), /* W7 */
1072 PINCTRL_PIN(319, "AD[11]"), /* W8 */
1073 PINCTRL_PIN(320, "AD[9]"), /* W9 */
1074 PINCTRL_PIN(321, "IDECS1N"), /* W10 */
1075 PINCTRL_PIN(322, "IDEDA[1]"), /* W11 */
1076 PINCTRL_PIN(323, "TCK"), /* W12 */
1077 PINCTRL_PIN(324, "TMS"), /* W13 */
1078 PINCTRL_PIN(325, "EECLK"), /* W14 */
1079 PINCTRL_PIN(326, "SCLK1"), /* W15 */
1080 PINCTRL_PIN(327, "GRLED"), /* W16 */
1081 PINCTRL_PIN(328, "INT[3]"), /* W17 */
1082 PINCTRL_PIN(329, "SLA[1]"), /* W18 */
1083 PINCTRL_PIN(330, "SLA[0]"), /* W19 */
1084 PINCTRL_PIN(331, "RXD[2]"), /* W20 */
1085 /* Row Y */
1086 PINCTRL_PIN(332, "HSYNC"), /* Y1 */
1087 PINCTRL_PIN(333, "DD[1]"), /* Y2 */
1088 PINCTRL_PIN(334, "DD[12]"), /* Y3 */
1089 PINCTRL_PIN(335, "P[2]"), /* Y4 */
1090 PINCTRL_PIN(336, "AD[15]"), /* Y5 */
1091 PINCTRL_PIN(337, "DA[6]"), /* Y6 */
1092 PINCTRL_PIN(338, "DA[4]"), /* Y7 */
1093 PINCTRL_PIN(339, "AD[10]"), /* Y8 */
1094 PINCTRL_PIN(340, "DA[1]"), /* Y9 */
1095 PINCTRL_PIN(341, "AD[8]"), /* Y10 */
1096 PINCTRL_PIN(342, "IDEDA[0]"), /* Y11 */
1097 PINCTRL_PIN(343, "DTRN"), /* Y12 */
1098 PINCTRL_PIN(344, "TDO"), /* Y13 */
1099 PINCTRL_PIN(345, "BOOT[0]"), /* Y14 */
1100 PINCTRL_PIN(346, "EEDAT"), /* Y15 */
1101 PINCTRL_PIN(347, "ASDO"), /* Y16 */
1102 PINCTRL_PIN(348, "SFRM1"), /* Y17 */
1103 PINCTRL_PIN(349, "RDLED"), /* Y18 */
1104 PINCTRL_PIN(350, "USBP[1]"), /* Y19 */
1105 PINCTRL_PIN(351, "ABITCLK"), /* Y20 */
1106 };
1107
1108 static const unsigned int ssp_ep9312_pins[] = {
1109 285, 306, 326, 348,
1110 };
1111
1112 static const unsigned int ac97_ep9312_pins[] = {
1113 77, 95, 305, 347, 351,
1114 };
1115
1116 static const unsigned int pwm_ep9312_pins[] = { 74 };
1117
1118 static const unsigned int gpio1a_ep9312_pins[] = { 74 };
1119
1120 static const unsigned int gpio2a_9312_pins[] = {
1121 234, 235, 248, 249, 251, 270, 271, 291,
1122 };
1123
1124 static const unsigned int gpio3a_9312_pins[] = {
1125 186, 187, 202, 203, 204, 221, 222, 223,
1126 };
1127
1128 static const unsigned int keypad_9312_pins[] = {
1129 186, 187, 202, 203, 204, 221, 222, 223,
1130 234, 235, 248, 249, 251, 270, 271, 291,
1131 };
1132
1133 static const unsigned int gpio4a_9312_pins[] = {
1134 78, 301, 302, 321, 322, 342,
1135 };
1136
1137 static const unsigned int gpio6a_9312_pins[] = {
1138 257, 295, 296, 334,
1139 };
1140
1141 static const unsigned int gpio7a_9312_pins[] = {
1142 4, 24, 25, 45, 46, 66, 314, 333,
1143 };
1144
1145 static const unsigned int ide_9312_pins[] = {
1146 78, 301, 302, 321, 322, 342, 257, 295,
1147 296, 334, 4, 24, 25, 45, 46, 66,
1148 314, 333,
1149 };
1150
1151 static const struct ep93xx_pin_group ep9312_pin_groups[] = {
1152 PMX_GROUP("ssp", ssp_ep9312_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP, 0),
1153 PMX_GROUP("i2s_on_ssp", ssp_ep9312_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP,
1154 EP93XX_SYSCON_DEVCFG_I2SONSSP),
1155 PMX_GROUP("pwm1", pwm_ep9312_pins, EP93XX_SYSCON_DEVCFG_PONG,
1156 EP93XX_SYSCON_DEVCFG_PONG),
1157 PMX_GROUP("gpio1agrp", gpio1a_ep9312_pins, EP93XX_SYSCON_DEVCFG_PONG, 0),
1158 PMX_GROUP("ac97", ac97_ep9312_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97, 0),
1159 PMX_GROUP("i2s_on_ac97", ac97_ep9312_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97,
1160 EP93XX_SYSCON_DEVCFG_I2SONAC97),
1161 PMX_GROUP("rasteronsdram0grp", raster_on_sdram0_pins, EP93XX_SYSCON_DEVCFG_RASONP3, 0),
1162 PMX_GROUP("rasteronsdram3grp", raster_on_sdram3_pins, EP93XX_SYSCON_DEVCFG_RASONP3,
1163 EP93XX_SYSCON_DEVCFG_RASONP3),
1164 PMX_GROUP("gpio2agrp", gpio2a_9312_pins, EP93XX_SYSCON_DEVCFG_GONK,
1165 EP93XX_SYSCON_DEVCFG_GONK),
1166 PMX_GROUP("gpio3agrp", gpio3a_9312_pins, EP93XX_SYSCON_DEVCFG_GONK,
1167 EP93XX_SYSCON_DEVCFG_GONK),
1168 PMX_GROUP("keypadgrp", keypad_9312_pins, EP93XX_SYSCON_DEVCFG_GONK, 0),
1169 PMX_GROUP("gpio4agrp", gpio4a_9312_pins, EP93XX_SYSCON_DEVCFG_EONIDE,
1170 EP93XX_SYSCON_DEVCFG_EONIDE),
1171 PMX_GROUP("gpio6agrp", gpio6a_9312_pins, EP93XX_SYSCON_DEVCFG_GONIDE,
1172 EP93XX_SYSCON_DEVCFG_GONIDE),
1173 PMX_GROUP("gpio7agrp", gpio7a_9312_pins, EP93XX_SYSCON_DEVCFG_HONIDE,
1174 EP93XX_SYSCON_DEVCFG_HONIDE),
1175 PMX_GROUP("idegrp", ide_9312_pins, EP93XX_SYSCON_DEVCFG_EONIDE |
1176 EP93XX_SYSCON_DEVCFG_GONIDE | EP93XX_SYSCON_DEVCFG_HONIDE, 0),
1177 };
1178
1179 static int ep93xx_get_groups_count(struct pinctrl_dev *pctldev)
1180 {
1181 struct ep93xx_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
1182
1183 switch (pmx->model) {
1184 case EP93XX_9301_PINCTRL:
1185 return ARRAY_SIZE(ep9301_pin_groups);
1186 case EP93XX_9307_PINCTRL:
1187 return ARRAY_SIZE(ep9307_pin_groups);
1188 case EP93XX_9312_PINCTRL:
1189 return ARRAY_SIZE(ep9312_pin_groups);
1190 default:
1191 return 0;
1192 }
1193 }
1194
1195 static const char *ep93xx_get_group_name(struct pinctrl_dev *pctldev,
1196 unsigned int selector)
1197 {
1198 struct ep93xx_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
1199
1200 switch (pmx->model) {
1201 case EP93XX_9301_PINCTRL:
1202 return ep9301_pin_groups[selector].grp.name;
1203 case EP93XX_9307_PINCTRL:
1204 return ep9307_pin_groups[selector].grp.name;
1205 case EP93XX_9312_PINCTRL:
1206 return ep9312_pin_groups[selector].grp.name;
1207 default:
1208 return NULL;
1209 }
1210 }
1211
1212 static int ep93xx_get_group_pins(struct pinctrl_dev *pctldev,
1213 unsigned int selector,
1214 const unsigned int **pins,
1215 unsigned int *num_pins)
1216 {
1217 struct ep93xx_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
1218
1219 switch (pmx->model) {
1220 case EP93XX_9301_PINCTRL:
1221 *pins = ep9301_pin_groups[selector].grp.pins;
1222 *num_pins = ep9301_pin_groups[selector].grp.npins;
1223 break;
1224 case EP93XX_9307_PINCTRL:
1225 *pins = ep9307_pin_groups[selector].grp.pins;
1226 *num_pins = ep9307_pin_groups[selector].grp.npins;
1227 break;
1228 case EP93XX_9312_PINCTRL:
1229 *pins = ep9312_pin_groups[selector].grp.pins;
1230 *num_pins = ep9312_pin_groups[selector].grp.npins;
1231 break;
1232 default:
1233 return -EINVAL;
1234 }
1235
1236 return 0;
1237 }
1238
1239 static const struct pinctrl_ops ep93xx_pctrl_ops = {
1240 .get_groups_count = ep93xx_get_groups_count,
1241 .get_group_name = ep93xx_get_group_name,
1242 .get_group_pins = ep93xx_get_group_pins,
1243 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
1244 .dt_free_map = pinconf_generic_dt_free_map,
1245 };
1246
1247 static const char * const spigrps[] = { "ssp" };
1248 static const char * const ac97grps[] = { "ac97" };
1249 static const char * const i2sgrps[] = { "i2s_on_ssp", "i2s_on_ac97" };
1250 static const char * const pwm1grps[] = { "pwm1" };
1251 static const char * const gpiogrps[] = { "gpio1agrp", "gpio2agrp", "gpio3agrp",
1252 "gpio4agrp", "gpio6agrp", "gpio7agrp" };
1253 static const char * const rastergrps[] = { "rasteronsdram0grp", "rasteronsdram3grp"};
1254 static const char * const keypadgrps[] = { "keypadgrp"};
1255 static const char * const idegrps[] = { "idegrp"};
1256
1257 static const struct pinfunction ep93xx_pmx_functions[] = {
1258 PINCTRL_PINFUNCTION("spi", spigrps, ARRAY_SIZE(spigrps)),
1259 PINCTRL_PINFUNCTION("ac97", ac97grps, ARRAY_SIZE(ac97grps)),
1260 PINCTRL_PINFUNCTION("i2s", i2sgrps, ARRAY_SIZE(i2sgrps)),
1261 PINCTRL_PINFUNCTION("pwm", pwm1grps, ARRAY_SIZE(pwm1grps)),
1262 PINCTRL_PINFUNCTION("keypad", keypadgrps, ARRAY_SIZE(keypadgrps)),
1263 PINCTRL_PINFUNCTION("pata", idegrps, ARRAY_SIZE(idegrps)),
1264 PINCTRL_PINFUNCTION("lcd", rastergrps, ARRAY_SIZE(rastergrps)),
1265 PINCTRL_PINFUNCTION("gpio", gpiogrps, ARRAY_SIZE(gpiogrps)),
1266 };
1267
1268 static int ep93xx_pmx_set_mux(struct pinctrl_dev *pctldev,
1269 unsigned int selector,
1270 unsigned int group)
1271 {
1272 struct ep93xx_pmx *pmx;
1273 const struct pinfunction *func;
1274 const struct ep93xx_pin_group *grp;
1275 u32 before, after, expected;
1276 unsigned long tmp;
1277 int i;
1278
1279 pmx = pinctrl_dev_get_drvdata(pctldev);
1280
1281 switch (pmx->model) {
1282 case EP93XX_9301_PINCTRL:
1283 grp = &ep9301_pin_groups[group];
1284 break;
1285 case EP93XX_9307_PINCTRL:
1286 grp = &ep9307_pin_groups[group];
1287 break;
1288 case EP93XX_9312_PINCTRL:
1289 grp = &ep9312_pin_groups[group];
1290 break;
1291 default:
1292 dev_err(pmx->dev, "invalid SoC type\n");
1293 return -ENODEV;
1294 }
1295
1296 func = &ep93xx_pmx_functions[selector];
1297
1298 dev_dbg(pmx->dev,
1299 "ACTIVATE function \"%s\" with group \"%s\" (mask=0x%x, value=0x%x)\n",
1300 func->name, grp->grp.name, grp->mask, grp->value);
1301
1302 regmap_read(pmx->map, EP93XX_SYSCON_DEVCFG, &before);
1303 ep93xx_pinctrl_update_bits(pmx, EP93XX_SYSCON_DEVCFG,
1304 grp->mask, grp->value);
1305 regmap_read(pmx->map, EP93XX_SYSCON_DEVCFG, &after);
1306
1307 dev_dbg(pmx->dev, "before=0x%x, after=0x%x, mask=0x%lx\n",
1308 before, after, PADS_MASK);
1309
1310 /* Which bits changed */
1311 before &= PADS_MASK;
1312 after &= PADS_MASK;
1313 expected = before & ~grp->mask;
1314 expected |= grp->value;
1315 expected &= PADS_MASK;
1316
1317 /* Print changed states */
1318 tmp = expected ^ after;
1319 for_each_set_bit(i, &tmp, PADS_MAXBIT) {
1320 bool enabled = expected & BIT(i);
1321
1322 dev_err(pmx->dev,
1323 "pin group %s could not be %s: probably a hardware limitation\n",
1324 ep93xx_padgroups[i], str_enabled_disabled(enabled));
1325 dev_err(pmx->dev,
1326 "DeviceCfg before: %08x, after %08x, expected %08x\n",
1327 before, after, expected);
1328 }
1329
1330 return tmp ? -EINVAL : 0;
1331 };
1332
1333 static int ep93xx_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
1334 {
1335 return ARRAY_SIZE(ep93xx_pmx_functions);
1336 }
1337
1338 static const char *ep93xx_pmx_get_func_name(struct pinctrl_dev *pctldev,
1339 unsigned int selector)
1340 {
1341 return ep93xx_pmx_functions[selector].name;
1342 }
1343
1344 static int ep93xx_pmx_get_groups(struct pinctrl_dev *pctldev,
1345 unsigned int selector,
1346 const char * const **groups,
1347 unsigned int * const num_groups)
1348 {
1349 *groups = ep93xx_pmx_functions[selector].groups;
1350 *num_groups = ep93xx_pmx_functions[selector].ngroups;
1351 return 0;
1352 }
1353
1354 static const struct pinmux_ops ep93xx_pmx_ops = {
1355 .get_functions_count = ep93xx_pmx_get_funcs_count,
1356 .get_function_name = ep93xx_pmx_get_func_name,
1357 .get_function_groups = ep93xx_pmx_get_groups,
1358 .set_mux = ep93xx_pmx_set_mux,
1359 };
1360
1361 static struct pinctrl_desc ep93xx_pmx_desc = {
1362 .name = DRIVER_NAME,
1363 .pctlops = &ep93xx_pctrl_ops,
1364 .pmxops = &ep93xx_pmx_ops,
1365 .owner = THIS_MODULE,
1366 };
1367
1368 static int ep93xx_pmx_probe(struct auxiliary_device *adev,
1369 const struct auxiliary_device_id *id)
1370 {
1371 struct ep93xx_regmap_adev *rdev = to_ep93xx_regmap_adev(adev);
1372 struct device *dev = &adev->dev;
1373 struct ep93xx_pmx *pmx;
1374
1375 /* Create state holders etc for this driver */
1376 pmx = devm_kzalloc(dev, sizeof(*pmx), GFP_KERNEL);
1377 if (!pmx)
1378 return -ENOMEM;
1379
1380 pmx->dev = dev;
1381 pmx->map = rdev->map;
1382 pmx->aux_dev = rdev;
1383 pmx->model = (enum ep93xx_pinctrl_model)(uintptr_t)id->driver_data;
1384 switch (pmx->model) {
1385 case EP93XX_9301_PINCTRL:
1386 ep93xx_pmx_desc.pins = ep9301_pins;
1387 ep93xx_pmx_desc.npins = ARRAY_SIZE(ep9301_pins);
1388 dev_info(dev, "detected 9301/9302 chip variant\n");
1389 break;
1390 case EP93XX_9307_PINCTRL:
1391 ep93xx_pmx_desc.pins = ep9307_pins;
1392 ep93xx_pmx_desc.npins = ARRAY_SIZE(ep9307_pins);
1393 dev_info(dev, "detected 9307 chip variant\n");
1394 break;
1395 case EP93XX_9312_PINCTRL:
1396 ep93xx_pmx_desc.pins = ep9312_pins;
1397 ep93xx_pmx_desc.npins = ARRAY_SIZE(ep9312_pins);
1398 dev_info(dev, "detected 9312/9315 chip variant\n");
1399 break;
1400 default:
1401 return dev_err_probe(dev, -EINVAL, "unknown pin control model: %u\n", pmx->model);
1402 }
1403
1404 /* using parent of_node to match in get_pinctrl_dev_from_of_node() */
1405 device_set_node(dev, dev_fwnode(adev->dev.parent));
1406 pmx->pctl = devm_pinctrl_register(dev, &ep93xx_pmx_desc, pmx);
1407 if (IS_ERR(pmx->pctl))
1408 return dev_err_probe(dev, PTR_ERR(pmx->pctl), "could not register pinmux driver\n");
1409
1410 return 0;
1411 };
1412
1413 static const struct auxiliary_device_id ep93xx_pinctrl_ids[] = {
1414 {
1415 .name = "soc_ep93xx.pinctrl-ep9301",
1416 .driver_data = (kernel_ulong_t)EP93XX_9301_PINCTRL,
1417 },
1418 {
1419 .name = "soc_ep93xx.pinctrl-ep9307",
1420 .driver_data = (kernel_ulong_t)EP93XX_9307_PINCTRL,
1421 },
1422 {
1423 .name = "soc_ep93xx.pinctrl-ep9312",
1424 .driver_data = (kernel_ulong_t)EP93XX_9312_PINCTRL,
1425 },
1426 { /* sentinel */ }
1427 };
1428 MODULE_DEVICE_TABLE(auxiliary, ep93xx_pinctrl_ids);
1429
1430 static struct auxiliary_driver ep93xx_pmx_driver = {
1431 .probe = ep93xx_pmx_probe,
1432 .id_table = ep93xx_pinctrl_ids,
1433 };
1434 module_auxiliary_driver(ep93xx_pmx_driver);
Kernel DRM miscellaneous fixes and cross-tree changes