drivers/pinctrl/starfive/pinctrl-starfive-jh7110.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Pinctrl / GPIO driver for StarFive JH7110 SoC
   4  *
   5  * Copyright (C) 2022 StarFive Technology Co., Ltd.
   6  */
   7
   8 #ifndef __PINCTRL_STARFIVE_JH7110_H__
   9 #define __PINCTRL_STARFIVE_JH7110_H__
  10
  11 #include <linux/pinctrl/pinconf-generic.h>
  12 #include <linux/pinctrl/pinmux.h>
  13
  14 struct jh7110_pinctrl {
  15         struct device *dev;
  16         struct gpio_chip gc;
  17         struct pinctrl_gpio_range gpios;
  18         raw_spinlock_t lock;
  19         void __iomem *base;
  20         struct pinctrl_dev *pctl;
  21         /* register read/write mutex */
  22         struct mutex mutex;
  23         const struct jh7110_pinctrl_soc_info *info;
  24         u32 *saved_regs;
  25 };
  26
  27 struct jh7110_gpio_irq_reg {
  28         unsigned int is_reg_base;
  29         unsigned int ic_reg_base;
  30         unsigned int ibe_reg_base;
  31         unsigned int iev_reg_base;
  32         unsigned int ie_reg_base;
  33         unsigned int ris_reg_base;
  34         unsigned int mis_reg_base;
  35 };
  36
  37 struct jh7110_pinctrl_soc_info {
  38         const struct pinctrl_pin_desc *pins;
  39         unsigned int npins;
  40         unsigned int ngpios;
  41         unsigned int gc_base;
  42
  43         /* gpio dout/doen/din/gpioinput register */
  44         unsigned int dout_reg_base;
  45         unsigned int dout_mask;
  46         unsigned int doen_reg_base;
  47         unsigned int doen_mask;
  48         unsigned int gpi_reg_base;
  49         unsigned int gpi_mask;
  50         unsigned int gpioin_reg_base;
  51
  52         const struct jh7110_gpio_irq_reg *irq_reg;
  53
  54         unsigned int nsaved_regs;
  55
  56         /* generic pinmux */
  57         int (*jh7110_set_one_pin_mux)(struct jh7110_pinctrl *sfp,
  58                                       unsigned int pin,
  59                                       unsigned int din, u32 dout,
  60                                       u32 doen, u32 func);
  61         /* gpio chip */
  62         int (*jh7110_get_padcfg_base)(struct jh7110_pinctrl *sfp,
  63                                       unsigned int pin);
  64         void (*jh7110_gpio_irq_handler)(struct irq_desc *desc);
  65         int (*jh7110_gpio_init_hw)(struct gpio_chip *gc);
  66 };
  67
  68 void jh7110_set_gpiomux(struct jh7110_pinctrl *sfp, unsigned int pin,
  69                         unsigned int din, u32 dout, u32 doen);
  70 int jh7110_pinctrl_probe(struct platform_device *pdev);
  71 struct jh7110_pinctrl *jh7110_from_irq_desc(struct irq_desc *desc);
  72 extern const struct dev_pm_ops jh7110_pinctrl_pm_ops;
  73
  74 #endif /* __PINCTRL_STARFIVE_JH7110_H__ */