drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com>
   4  *
   5  * Based on:
   6  * huangshuosheng <huangshuosheng@allwinnertech.com>
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/of.h>
  11 #include <linux/pinctrl/pinctrl.h>
  12 #include <linux/platform_device.h>
  13
  14 #include "pinctrl-sunxi.h"
  15
  16 static const struct sunxi_desc_pin a100_r_pins[] = {
  17         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
  18                   SUNXI_FUNCTION(0x0, "gpio_in"),
  19                   SUNXI_FUNCTION(0x1, "gpio_out"),
  20                   SUNXI_FUNCTION(0x2, "s_i2c0"),        /* SCK */
  21                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),
  22         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
  23                   SUNXI_FUNCTION(0x0, "gpio_in"),
  24                   SUNXI_FUNCTION(0x1, "gpio_out"),
  25                   SUNXI_FUNCTION(0x2, "s_i2c0"),        /* SDA */
  26                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),
  27         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
  28                   SUNXI_FUNCTION(0x0, "gpio_in"),
  29                   SUNXI_FUNCTION(0x1, "gpio_out"),
  30                   SUNXI_FUNCTION(0x2, "s_uart0"),       /* TX */
  31                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),
  32         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
  33                   SUNXI_FUNCTION(0x0, "gpio_in"),
  34                   SUNXI_FUNCTION(0x1, "gpio_out"),
  35                   SUNXI_FUNCTION(0x2, "s_uart0"),       /* RX */
  36                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),
  37         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
  38                   SUNXI_FUNCTION(0x0, "gpio_in"),
  39                   SUNXI_FUNCTION(0x1, "gpio_out"),
  40                   SUNXI_FUNCTION(0x2, "s_jtag"),        /* MS */
  41                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),
  42         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
  43                   SUNXI_FUNCTION(0x0, "gpio_in"),
  44                   SUNXI_FUNCTION(0x1, "gpio_out"),
  45                   SUNXI_FUNCTION(0x2, "s_jtag"),        /* CK */
  46                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),
  47         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
  48                   SUNXI_FUNCTION(0x0, "gpio_in"),
  49                   SUNXI_FUNCTION(0x1, "gpio_out"),
  50                   SUNXI_FUNCTION(0x2, "s_jtag"),        /* DO */
  51                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),
  52         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
  53                   SUNXI_FUNCTION(0x0, "gpio_in"),
  54                   SUNXI_FUNCTION(0x1, "gpio_out"),
  55                   SUNXI_FUNCTION(0x2, "s_jtag"),        /* DI */
  56                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),
  57         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
  58                   SUNXI_FUNCTION(0x0, "gpio_in"),
  59                   SUNXI_FUNCTION(0x1, "gpio_out"),
  60                   SUNXI_FUNCTION(0x2, "s_i2c1"),        /* SCK */
  61                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),
  62         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
  63                   SUNXI_FUNCTION(0x0, "gpio_in"),
  64                   SUNXI_FUNCTION(0x1, "gpio_out"),
  65                   SUNXI_FUNCTION(0x2, "s_i2c1"),        /* SDA */
  66                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),
  67         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
  68                   SUNXI_FUNCTION(0x0, "gpio_in"),
  69                   SUNXI_FUNCTION(0x1, "gpio_out"),
  70                   SUNXI_FUNCTION(0x2, "s_pwm"),
  71                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),
  72         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
  73                   SUNXI_FUNCTION(0x0, "gpio_in"),
  74                   SUNXI_FUNCTION(0x1, "gpio_out"),
  75                   SUNXI_FUNCTION(0x3, "s_cir"),         /* IN */
  76                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),
  77 };
  78
  79 static const struct sunxi_pinctrl_desc a100_r_pinctrl_data = {
  80         .pins = a100_r_pins,
  81         .npins = ARRAY_SIZE(a100_r_pins),
  82         .pin_base = PL_BASE,
  83         .irq_banks = 1,
  84         .io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_CTL,
  85 };
  86
  87 static int a100_r_pinctrl_probe(struct platform_device *pdev)
  88 {
  89         return sunxi_pinctrl_init(pdev, &a100_r_pinctrl_data);
  90 }
  91
  92 static const struct of_device_id a100_r_pinctrl_match[] = {
  93         { .compatible = "allwinner,sun50i-a100-r-pinctrl", },
  94         {}
  95 };
  96 MODULE_DEVICE_TABLE(of, a100_r_pinctrl_match);
  97
  98 static struct platform_driver a100_r_pinctrl_driver = {
  99         .probe  = a100_r_pinctrl_probe,
 100         .driver = {
 101                 .name           = "sun50i-a100-r-pinctrl",
 102                 .of_match_table = a100_r_pinctrl_match,
 103         },
 104 };
 105 module_platform_driver(a100_r_pinctrl_driver);