1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * AMD SoC Power Management Controller Driver
5 * Copyright (c) 2023, Advanced Micro Devices, Inc.
8 * Author: Mario Limonciello <mario.limonciello@amd.com>
14 #include <linux/types.h>
15 #include <linux/mutex.h>
19 void __iomem
*vslbase
;
29 void __iomem
*regbase
;
30 void __iomem
*smu_virt_addr
;
31 void __iomem
*stb_virt_addr
;
32 void __iomem
*fch_virt_addr
;
41 /* SMU version information */
48 struct mutex lock
; /* generic mutex lock */
49 struct dentry
*dbgfs_dir
;
50 struct quirk_entry
*quirks
;
51 bool disable_8042_wakeup
;
52 struct amd_mp2_dev
*mp2
;
55 void amd_pmc_process_restore_quirks(struct amd_pmc_dev
*dev
);
56 void amd_pmc_quirks_init(struct amd_pmc_dev
*dev
);
57 void amd_mp2_stb_init(struct amd_pmc_dev
*dev
);
58 void amd_mp2_stb_deinit(struct amd_pmc_dev
*dev
);
60 /* List of supported CPU ids */
61 #define AMD_CPU_ID_RV 0x15D0
62 #define AMD_CPU_ID_RN 0x1630
63 #define AMD_CPU_ID_PCO AMD_CPU_ID_RV
64 #define AMD_CPU_ID_CZN AMD_CPU_ID_RN
65 #define AMD_CPU_ID_YC 0x14B5
66 #define AMD_CPU_ID_CB 0x14D8
67 #define AMD_CPU_ID_PS 0x14E8
68 #define AMD_CPU_ID_SP 0x14A4
69 #define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507
70 #define PCI_DEVICE_ID_AMD_1AH_M60H_ROOT 0x1122
71 #define PCI_DEVICE_ID_AMD_MP2_STB 0x172c