1 // SPDX-License-Identifier: GPL-2.0
3 * Derived from many drivers using generic_serial interface.
5 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7 * Serial driver for BCM63xx integrated UART.
9 * Hardware flow control was _not_ tested since I only have RX/TX on
13 #include <linux/kernel.h>
14 #include <linux/platform_device.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/module.h>
18 #include <linux/console.h>
19 #include <linux/clk.h>
20 #include <linux/tty.h>
21 #include <linux/tty_flip.h>
22 #include <linux/sysrq.h>
23 #include <linux/serial.h>
24 #include <linux/serial_core.h>
25 #include <linux/serial_bcm63xx.h>
29 #define BCM63XX_NR_UARTS 2
31 static struct uart_port ports
[BCM63XX_NR_UARTS
];
34 * rx interrupt mask / stat
38 * - rx fifo above threshold
39 * - rx fifo not empty for too long
41 #define UART_RX_INT_MASK (UART_IR_MASK(UART_IR_RXOVER) | \
42 UART_IR_MASK(UART_IR_RXTHRESH) | \
43 UART_IR_MASK(UART_IR_RXTIMEOUT))
45 #define UART_RX_INT_STAT (UART_IR_STAT(UART_IR_RXOVER) | \
46 UART_IR_STAT(UART_IR_RXTHRESH) | \
47 UART_IR_STAT(UART_IR_RXTIMEOUT))
50 * tx interrupt mask / stat
54 * - tx fifo below threshold
56 #define UART_TX_INT_MASK (UART_IR_MASK(UART_IR_TXEMPTY) | \
57 UART_IR_MASK(UART_IR_TXTRESH))
59 #define UART_TX_INT_STAT (UART_IR_STAT(UART_IR_TXEMPTY) | \
60 UART_IR_STAT(UART_IR_TXTRESH))
63 * external input interrupt
65 * mask: any edge on CTS, DCD
67 #define UART_EXTINP_INT_MASK (UART_EXTINP_IRMASK(UART_EXTINP_IR_CTS) | \
68 UART_EXTINP_IRMASK(UART_EXTINP_IR_DCD))
71 * handy uart register accessor
73 static inline unsigned int bcm_uart_readl(struct uart_port
*port
,
76 return __raw_readl(port
->membase
+ offset
);
79 static inline void bcm_uart_writel(struct uart_port
*port
,
80 unsigned int value
, unsigned int offset
)
82 __raw_writel(value
, port
->membase
+ offset
);
86 * serial core request to check if uart tx fifo is empty
88 static unsigned int bcm_uart_tx_empty(struct uart_port
*port
)
92 val
= bcm_uart_readl(port
, UART_IR_REG
);
93 return (val
& UART_IR_STAT(UART_IR_TXEMPTY
)) ? 1 : 0;
97 * serial core request to set RTS and DTR pin state and loopback mode
99 static void bcm_uart_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
103 val
= bcm_uart_readl(port
, UART_MCTL_REG
);
104 val
&= ~(UART_MCTL_DTR_MASK
| UART_MCTL_RTS_MASK
);
105 /* invert of written value is reflected on the pin */
106 if (!(mctrl
& TIOCM_DTR
))
107 val
|= UART_MCTL_DTR_MASK
;
108 if (!(mctrl
& TIOCM_RTS
))
109 val
|= UART_MCTL_RTS_MASK
;
110 bcm_uart_writel(port
, val
, UART_MCTL_REG
);
112 val
= bcm_uart_readl(port
, UART_CTL_REG
);
113 if (mctrl
& TIOCM_LOOP
)
114 val
|= UART_CTL_LOOPBACK_MASK
;
116 val
&= ~UART_CTL_LOOPBACK_MASK
;
117 bcm_uart_writel(port
, val
, UART_CTL_REG
);
121 * serial core request to return RI, CTS, DCD and DSR pin state
123 static unsigned int bcm_uart_get_mctrl(struct uart_port
*port
)
125 unsigned int val
, mctrl
;
128 val
= bcm_uart_readl(port
, UART_EXTINP_REG
);
129 if (val
& UART_EXTINP_RI_MASK
)
131 if (val
& UART_EXTINP_CTS_MASK
)
133 if (val
& UART_EXTINP_DCD_MASK
)
135 if (val
& UART_EXTINP_DSR_MASK
)
141 * serial core request to disable tx ASAP (used for flow control)
143 static void bcm_uart_stop_tx(struct uart_port
*port
)
147 val
= bcm_uart_readl(port
, UART_CTL_REG
);
148 val
&= ~(UART_CTL_TXEN_MASK
);
149 bcm_uart_writel(port
, val
, UART_CTL_REG
);
151 val
= bcm_uart_readl(port
, UART_IR_REG
);
152 val
&= ~UART_TX_INT_MASK
;
153 bcm_uart_writel(port
, val
, UART_IR_REG
);
157 * serial core request to (re)enable tx
159 static void bcm_uart_start_tx(struct uart_port
*port
)
163 val
= bcm_uart_readl(port
, UART_IR_REG
);
164 val
|= UART_TX_INT_MASK
;
165 bcm_uart_writel(port
, val
, UART_IR_REG
);
167 val
= bcm_uart_readl(port
, UART_CTL_REG
);
168 val
|= UART_CTL_TXEN_MASK
;
169 bcm_uart_writel(port
, val
, UART_CTL_REG
);
173 * serial core request to stop rx, called before port shutdown
175 static void bcm_uart_stop_rx(struct uart_port
*port
)
179 val
= bcm_uart_readl(port
, UART_IR_REG
);
180 val
&= ~UART_RX_INT_MASK
;
181 bcm_uart_writel(port
, val
, UART_IR_REG
);
185 * serial core request to enable modem status interrupt reporting
187 static void bcm_uart_enable_ms(struct uart_port
*port
)
191 val
= bcm_uart_readl(port
, UART_IR_REG
);
192 val
|= UART_IR_MASK(UART_IR_EXTIP
);
193 bcm_uart_writel(port
, val
, UART_IR_REG
);
197 * serial core request to start/stop emitting break char
199 static void bcm_uart_break_ctl(struct uart_port
*port
, int ctl
)
204 uart_port_lock_irqsave(port
, &flags
);
206 val
= bcm_uart_readl(port
, UART_CTL_REG
);
208 val
|= UART_CTL_XMITBRK_MASK
;
210 val
&= ~UART_CTL_XMITBRK_MASK
;
211 bcm_uart_writel(port
, val
, UART_CTL_REG
);
213 uart_port_unlock_irqrestore(port
, flags
);
217 * return port type in string format
219 static const char *bcm_uart_type(struct uart_port
*port
)
221 return (port
->type
== PORT_BCM63XX
) ? "bcm63xx_uart" : NULL
;
225 * read all chars in rx fifo and send them to core
227 static void bcm_uart_do_rx(struct uart_port
*port
)
229 struct tty_port
*tty_port
= &port
->state
->port
;
230 unsigned int max_count
;
232 /* limit number of char read in interrupt, should not be
233 * higher than fifo size anyway since we're much faster than
237 unsigned int iestat
, c
, cstat
;
240 /* get overrun/fifo empty information from ier
242 iestat
= bcm_uart_readl(port
, UART_IR_REG
);
244 if (unlikely(iestat
& UART_IR_STAT(UART_IR_RXOVER
))) {
247 /* fifo reset is required to clear
249 val
= bcm_uart_readl(port
, UART_CTL_REG
);
250 val
|= UART_CTL_RSTRXFIFO_MASK
;
251 bcm_uart_writel(port
, val
, UART_CTL_REG
);
253 port
->icount
.overrun
++;
254 tty_insert_flip_char(tty_port
, 0, TTY_OVERRUN
);
257 if (!(iestat
& UART_IR_STAT(UART_IR_RXNOTEMPTY
)))
260 cstat
= c
= bcm_uart_readl(port
, UART_FIFO_REG
);
265 if (unlikely((cstat
& UART_FIFO_ANYERR_MASK
))) {
267 if (cstat
& UART_FIFO_BRKDET_MASK
) {
269 if (uart_handle_break(port
))
273 if (cstat
& UART_FIFO_PARERR_MASK
)
274 port
->icount
.parity
++;
275 if (cstat
& UART_FIFO_FRAMEERR_MASK
)
276 port
->icount
.frame
++;
278 /* update flag wrt read_status_mask */
279 cstat
&= port
->read_status_mask
;
280 if (cstat
& UART_FIFO_BRKDET_MASK
)
282 if (cstat
& UART_FIFO_FRAMEERR_MASK
)
284 if (cstat
& UART_FIFO_PARERR_MASK
)
288 if (uart_prepare_sysrq_char(port
, c
))
291 if ((cstat
& port
->ignore_status_mask
) == 0)
292 tty_insert_flip_char(tty_port
, c
, flag
);
294 } while (--max_count
);
296 tty_flip_buffer_push(tty_port
);
300 * fill tx fifo with chars to send, stop when fifo is about to be full
301 * or when all chars have been sent.
303 static void bcm_uart_do_tx(struct uart_port
*port
)
309 val
= bcm_uart_readl(port
, UART_MCTL_REG
);
310 val
= (val
& UART_MCTL_TXFIFOFILL_MASK
) >> UART_MCTL_TXFIFOFILL_SHIFT
;
311 pending
= uart_port_tx_limited_flags(port
, ch
, UART_TX_NOSTOP
,
312 port
->fifosize
- val
,
314 bcm_uart_writel(port
, ch
, UART_FIFO_REG
),
319 /* nothing to send, disable transmit interrupt */
320 val
= bcm_uart_readl(port
, UART_IR_REG
);
321 val
&= ~UART_TX_INT_MASK
;
322 bcm_uart_writel(port
, val
, UART_IR_REG
);
324 if (uart_tx_stopped(port
))
325 bcm_uart_stop_tx(port
);
329 * process uart interrupt
331 static irqreturn_t
bcm_uart_interrupt(int irq
, void *dev_id
)
333 struct uart_port
*port
;
334 unsigned int irqstat
;
337 uart_port_lock(port
);
339 irqstat
= bcm_uart_readl(port
, UART_IR_REG
);
340 if (irqstat
& UART_RX_INT_STAT
)
341 bcm_uart_do_rx(port
);
343 if (irqstat
& UART_TX_INT_STAT
)
344 bcm_uart_do_tx(port
);
346 if (irqstat
& UART_IR_MASK(UART_IR_EXTIP
)) {
349 estat
= bcm_uart_readl(port
, UART_EXTINP_REG
);
350 if (estat
& UART_EXTINP_IRSTAT(UART_EXTINP_IR_CTS
))
351 uart_handle_cts_change(port
,
352 estat
& UART_EXTINP_CTS_MASK
);
353 if (estat
& UART_EXTINP_IRSTAT(UART_EXTINP_IR_DCD
))
354 uart_handle_dcd_change(port
,
355 estat
& UART_EXTINP_DCD_MASK
);
358 uart_unlock_and_check_sysrq(port
);
363 * enable rx & tx operation on uart
365 static void bcm_uart_enable(struct uart_port
*port
)
369 val
= bcm_uart_readl(port
, UART_CTL_REG
);
370 val
|= (UART_CTL_BRGEN_MASK
| UART_CTL_TXEN_MASK
| UART_CTL_RXEN_MASK
);
371 bcm_uart_writel(port
, val
, UART_CTL_REG
);
375 * disable rx & tx operation on uart
377 static void bcm_uart_disable(struct uart_port
*port
)
381 val
= bcm_uart_readl(port
, UART_CTL_REG
);
382 val
&= ~(UART_CTL_BRGEN_MASK
| UART_CTL_TXEN_MASK
|
384 bcm_uart_writel(port
, val
, UART_CTL_REG
);
388 * clear all unread data in rx fifo and unsent data in tx fifo
390 static void bcm_uart_flush(struct uart_port
*port
)
394 /* empty rx and tx fifo */
395 val
= bcm_uart_readl(port
, UART_CTL_REG
);
396 val
|= UART_CTL_RSTRXFIFO_MASK
| UART_CTL_RSTTXFIFO_MASK
;
397 bcm_uart_writel(port
, val
, UART_CTL_REG
);
399 /* read any pending char to make sure all irq status are
401 (void)bcm_uart_readl(port
, UART_FIFO_REG
);
405 * serial core request to initialize uart and start rx operation
407 static int bcm_uart_startup(struct uart_port
*port
)
412 /* mask all irq and flush port */
413 bcm_uart_disable(port
);
414 bcm_uart_writel(port
, 0, UART_IR_REG
);
415 bcm_uart_flush(port
);
417 /* clear any pending external input interrupt */
418 (void)bcm_uart_readl(port
, UART_EXTINP_REG
);
420 /* set rx/tx fifo thresh to fifo half size */
421 val
= bcm_uart_readl(port
, UART_MCTL_REG
);
422 val
&= ~(UART_MCTL_RXFIFOTHRESH_MASK
| UART_MCTL_TXFIFOTHRESH_MASK
);
423 val
|= (port
->fifosize
/ 2) << UART_MCTL_RXFIFOTHRESH_SHIFT
;
424 val
|= (port
->fifosize
/ 2) << UART_MCTL_TXFIFOTHRESH_SHIFT
;
425 bcm_uart_writel(port
, val
, UART_MCTL_REG
);
427 /* set rx fifo timeout to 1 char time */
428 val
= bcm_uart_readl(port
, UART_CTL_REG
);
429 val
&= ~UART_CTL_RXTMOUTCNT_MASK
;
430 val
|= 1 << UART_CTL_RXTMOUTCNT_SHIFT
;
431 bcm_uart_writel(port
, val
, UART_CTL_REG
);
433 /* report any edge on dcd and cts */
434 val
= UART_EXTINP_INT_MASK
;
435 val
|= UART_EXTINP_DCD_NOSENSE_MASK
;
436 val
|= UART_EXTINP_CTS_NOSENSE_MASK
;
437 bcm_uart_writel(port
, val
, UART_EXTINP_REG
);
439 /* register irq and enable rx interrupts */
440 ret
= request_irq(port
->irq
, bcm_uart_interrupt
, 0,
441 dev_name(port
->dev
), port
);
444 bcm_uart_writel(port
, UART_RX_INT_MASK
, UART_IR_REG
);
445 bcm_uart_enable(port
);
450 * serial core request to flush & disable uart
452 static void bcm_uart_shutdown(struct uart_port
*port
)
456 uart_port_lock_irqsave(port
, &flags
);
457 bcm_uart_writel(port
, 0, UART_IR_REG
);
458 uart_port_unlock_irqrestore(port
, flags
);
460 bcm_uart_disable(port
);
461 bcm_uart_flush(port
);
462 free_irq(port
->irq
, port
);
466 * serial core request to change current uart setting
468 static void bcm_uart_set_termios(struct uart_port
*port
, struct ktermios
*new,
469 const struct ktermios
*old
)
471 unsigned int ctl
, baud
, quot
, ier
;
475 uart_port_lock_irqsave(port
, &flags
);
477 /* Drain the hot tub fully before we power it off for the winter. */
478 for (tries
= 3; !bcm_uart_tx_empty(port
) && tries
; tries
--)
481 /* disable uart while changing speed */
482 bcm_uart_disable(port
);
483 bcm_uart_flush(port
);
485 /* update Control register */
486 ctl
= bcm_uart_readl(port
, UART_CTL_REG
);
487 ctl
&= ~UART_CTL_BITSPERSYM_MASK
;
489 switch (new->c_cflag
& CSIZE
) {
491 ctl
|= (0 << UART_CTL_BITSPERSYM_SHIFT
);
494 ctl
|= (1 << UART_CTL_BITSPERSYM_SHIFT
);
497 ctl
|= (2 << UART_CTL_BITSPERSYM_SHIFT
);
500 ctl
|= (3 << UART_CTL_BITSPERSYM_SHIFT
);
504 ctl
&= ~UART_CTL_STOPBITS_MASK
;
505 if (new->c_cflag
& CSTOPB
)
506 ctl
|= UART_CTL_STOPBITS_2
;
508 ctl
|= UART_CTL_STOPBITS_1
;
510 ctl
&= ~(UART_CTL_RXPAREN_MASK
| UART_CTL_TXPAREN_MASK
);
511 if (new->c_cflag
& PARENB
)
512 ctl
|= (UART_CTL_RXPAREN_MASK
| UART_CTL_TXPAREN_MASK
);
513 ctl
&= ~(UART_CTL_RXPAREVEN_MASK
| UART_CTL_TXPAREVEN_MASK
);
514 if (new->c_cflag
& PARODD
)
515 ctl
|= (UART_CTL_RXPAREVEN_MASK
| UART_CTL_TXPAREVEN_MASK
);
516 bcm_uart_writel(port
, ctl
, UART_CTL_REG
);
518 /* update Baudword register */
519 baud
= uart_get_baud_rate(port
, new, old
, 0, port
->uartclk
/ 16);
520 quot
= uart_get_divisor(port
, baud
) - 1;
521 bcm_uart_writel(port
, quot
, UART_BAUD_REG
);
523 /* update Interrupt register */
524 ier
= bcm_uart_readl(port
, UART_IR_REG
);
526 ier
&= ~UART_IR_MASK(UART_IR_EXTIP
);
527 if (UART_ENABLE_MS(port
, new->c_cflag
))
528 ier
|= UART_IR_MASK(UART_IR_EXTIP
);
530 bcm_uart_writel(port
, ier
, UART_IR_REG
);
532 /* update read/ignore mask */
533 port
->read_status_mask
= UART_FIFO_VALID_MASK
;
534 if (new->c_iflag
& INPCK
) {
535 port
->read_status_mask
|= UART_FIFO_FRAMEERR_MASK
;
536 port
->read_status_mask
|= UART_FIFO_PARERR_MASK
;
538 if (new->c_iflag
& (IGNBRK
| BRKINT
))
539 port
->read_status_mask
|= UART_FIFO_BRKDET_MASK
;
541 port
->ignore_status_mask
= 0;
542 if (new->c_iflag
& IGNPAR
)
543 port
->ignore_status_mask
|= UART_FIFO_PARERR_MASK
;
544 if (new->c_iflag
& IGNBRK
)
545 port
->ignore_status_mask
|= UART_FIFO_BRKDET_MASK
;
546 if (!(new->c_cflag
& CREAD
))
547 port
->ignore_status_mask
|= UART_FIFO_VALID_MASK
;
549 uart_update_timeout(port
, new->c_cflag
, baud
);
550 bcm_uart_enable(port
);
551 uart_port_unlock_irqrestore(port
, flags
);
555 * serial core request to claim uart iomem
557 static int bcm_uart_request_port(struct uart_port
*port
)
559 /* UARTs always present */
564 * serial core request to release uart iomem
566 static void bcm_uart_release_port(struct uart_port
*port
)
568 /* Nothing to release ... */
572 * serial core request to do any port required autoconfiguration
574 static void bcm_uart_config_port(struct uart_port
*port
, int flags
)
576 if (flags
& UART_CONFIG_TYPE
) {
577 if (bcm_uart_request_port(port
))
579 port
->type
= PORT_BCM63XX
;
584 * serial core request to check that port information in serinfo are
587 static int bcm_uart_verify_port(struct uart_port
*port
,
588 struct serial_struct
*serinfo
)
590 if (port
->type
!= PORT_BCM63XX
)
592 if (port
->irq
!= serinfo
->irq
)
594 if (port
->iotype
!= serinfo
->io_type
)
596 if (port
->mapbase
!= (unsigned long)serinfo
->iomem_base
)
601 #ifdef CONFIG_CONSOLE_POLL
603 * return true when outstanding tx equals fifo size
605 static bool bcm_uart_tx_full(struct uart_port
*port
)
609 val
= bcm_uart_readl(port
, UART_MCTL_REG
);
610 val
= (val
& UART_MCTL_TXFIFOFILL_MASK
) >> UART_MCTL_TXFIFOFILL_SHIFT
;
611 return !(port
->fifosize
- val
);
614 static int bcm_uart_poll_get_char(struct uart_port
*port
)
618 iestat
= bcm_uart_readl(port
, UART_IR_REG
);
619 if (!(iestat
& UART_IR_STAT(UART_IR_RXNOTEMPTY
)))
622 return bcm_uart_readl(port
, UART_FIFO_REG
);
625 static void bcm_uart_poll_put_char(struct uart_port
*port
, unsigned char c
)
627 while (bcm_uart_tx_full(port
)) {
631 bcm_uart_writel(port
, c
, UART_FIFO_REG
);
635 /* serial core callbacks */
636 static const struct uart_ops bcm_uart_ops
= {
637 .tx_empty
= bcm_uart_tx_empty
,
638 .get_mctrl
= bcm_uart_get_mctrl
,
639 .set_mctrl
= bcm_uart_set_mctrl
,
640 .start_tx
= bcm_uart_start_tx
,
641 .stop_tx
= bcm_uart_stop_tx
,
642 .stop_rx
= bcm_uart_stop_rx
,
643 .enable_ms
= bcm_uart_enable_ms
,
644 .break_ctl
= bcm_uart_break_ctl
,
645 .startup
= bcm_uart_startup
,
646 .shutdown
= bcm_uart_shutdown
,
647 .set_termios
= bcm_uart_set_termios
,
648 .type
= bcm_uart_type
,
649 .release_port
= bcm_uart_release_port
,
650 .request_port
= bcm_uart_request_port
,
651 .config_port
= bcm_uart_config_port
,
652 .verify_port
= bcm_uart_verify_port
,
653 #ifdef CONFIG_CONSOLE_POLL
654 .poll_get_char
= bcm_uart_poll_get_char
,
655 .poll_put_char
= bcm_uart_poll_put_char
,
661 #ifdef CONFIG_SERIAL_BCM63XX_CONSOLE
662 static void wait_for_xmitr(struct uart_port
*port
)
666 /* Wait up to 10ms for the character(s) to be sent. */
671 val
= bcm_uart_readl(port
, UART_IR_REG
);
672 if (val
& UART_IR_STAT(UART_IR_TXEMPTY
))
677 /* Wait up to 1s for flow control if necessary */
678 if (port
->flags
& UPF_CONS_FLOW
) {
683 val
= bcm_uart_readl(port
, UART_EXTINP_REG
);
684 if (val
& UART_EXTINP_CTS_MASK
)
694 static void bcm_console_putchar(struct uart_port
*port
, unsigned char ch
)
696 wait_for_xmitr(port
);
697 bcm_uart_writel(port
, ch
, UART_FIFO_REG
);
701 * console core request to output given string
703 static void bcm_console_write(struct console
*co
, const char *s
,
706 struct uart_port
*port
;
710 port
= &ports
[co
->index
];
712 if (oops_in_progress
)
713 locked
= uart_port_trylock_irqsave(port
, &flags
);
715 uart_port_lock_irqsave(port
, &flags
);
717 /* call helper to deal with \r\n */
718 uart_console_write(port
, s
, count
, bcm_console_putchar
);
720 /* and wait for char to be transmitted */
721 wait_for_xmitr(port
);
724 uart_port_unlock_irqrestore(port
, flags
);
728 * console core request to setup given console, find matching uart
731 static int bcm_console_setup(struct console
*co
, char *options
)
733 struct uart_port
*port
;
739 if (co
->index
< 0 || co
->index
>= BCM63XX_NR_UARTS
)
741 port
= &ports
[co
->index
];
745 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
747 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
750 static struct uart_driver bcm_uart_driver
;
752 static struct console bcm63xx_console
= {
754 .write
= bcm_console_write
,
755 .device
= uart_console_device
,
756 .setup
= bcm_console_setup
,
757 .flags
= CON_PRINTBUFFER
,
759 .data
= &bcm_uart_driver
,
762 static int __init
bcm63xx_console_init(void)
764 register_console(&bcm63xx_console
);
768 console_initcall(bcm63xx_console_init
);
770 static void bcm_early_write(struct console
*con
, const char *s
, unsigned n
)
772 struct earlycon_device
*dev
= con
->data
;
774 uart_console_write(&dev
->port
, s
, n
, bcm_console_putchar
);
775 wait_for_xmitr(&dev
->port
);
778 static int __init
bcm_early_console_setup(struct earlycon_device
*device
,
781 if (!device
->port
.membase
)
784 device
->con
->write
= bcm_early_write
;
788 OF_EARLYCON_DECLARE(bcm63xx_uart
, "brcm,bcm6345-uart", bcm_early_console_setup
);
790 #define BCM63XX_CONSOLE (&bcm63xx_console)
792 #define BCM63XX_CONSOLE NULL
793 #endif /* CONFIG_SERIAL_BCM63XX_CONSOLE */
795 static struct uart_driver bcm_uart_driver
= {
796 .owner
= THIS_MODULE
,
797 .driver_name
= "bcm63xx_uart",
801 .nr
= BCM63XX_NR_UARTS
,
802 .cons
= BCM63XX_CONSOLE
,
806 * platform driver probe/remove callback
808 static int bcm_uart_probe(struct platform_device
*pdev
)
810 struct resource
*res_mem
;
811 struct uart_port
*port
;
815 if (pdev
->dev
.of_node
) {
816 pdev
->id
= of_alias_get_id(pdev
->dev
.of_node
, "serial");
819 pdev
->id
= of_alias_get_id(pdev
->dev
.of_node
, "uart");
822 if (pdev
->id
< 0 || pdev
->id
>= BCM63XX_NR_UARTS
)
825 port
= &ports
[pdev
->id
];
828 memset(port
, 0, sizeof(*port
));
830 port
->membase
= devm_platform_get_and_ioremap_resource(pdev
, 0, &res_mem
);
831 if (IS_ERR(port
->membase
))
832 return PTR_ERR(port
->membase
);
833 port
->mapbase
= res_mem
->start
;
835 ret
= platform_get_irq(pdev
, 0);
840 clk
= clk_get(&pdev
->dev
, "refclk");
841 if (IS_ERR(clk
) && pdev
->dev
.of_node
)
842 clk
= of_clk_get(pdev
->dev
.of_node
, 0);
847 port
->iotype
= UPIO_MEM
;
848 port
->ops
= &bcm_uart_ops
;
849 port
->flags
= UPF_BOOT_AUTOCONF
;
850 port
->dev
= &pdev
->dev
;
852 port
->uartclk
= clk_get_rate(clk
) / 2;
853 port
->line
= pdev
->id
;
854 port
->has_sysrq
= IS_ENABLED(CONFIG_SERIAL_BCM63XX_CONSOLE
);
857 ret
= uart_add_one_port(&bcm_uart_driver
, port
);
859 ports
[pdev
->id
].membase
= NULL
;
862 platform_set_drvdata(pdev
, port
);
866 static void bcm_uart_remove(struct platform_device
*pdev
)
868 struct uart_port
*port
;
870 port
= platform_get_drvdata(pdev
);
871 uart_remove_one_port(&bcm_uart_driver
, port
);
872 /* mark port as free */
873 ports
[pdev
->id
].membase
= NULL
;
876 static const struct of_device_id bcm63xx_of_match
[] = {
877 { .compatible
= "brcm,bcm6345-uart" },
880 MODULE_DEVICE_TABLE(of
, bcm63xx_of_match
);
883 * platform driver stuff
885 static struct platform_driver bcm_uart_platform_driver
= {
886 .probe
= bcm_uart_probe
,
887 .remove
= bcm_uart_remove
,
889 .name
= "bcm63xx_uart",
890 .of_match_table
= bcm63xx_of_match
,
894 static int __init
bcm_uart_init(void)
898 ret
= uart_register_driver(&bcm_uart_driver
);
902 ret
= platform_driver_register(&bcm_uart_platform_driver
);
904 uart_unregister_driver(&bcm_uart_driver
);
909 static void __exit
bcm_uart_exit(void)
911 platform_driver_unregister(&bcm_uart_platform_driver
);
912 uart_unregister_driver(&bcm_uart_driver
);
915 module_init(bcm_uart_init
);
916 module_exit(bcm_uart_exit
);
918 MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>");
919 MODULE_DESCRIPTION("Broadcom 63xx integrated uart driver");
920 MODULE_LICENSE("GPL");