1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2012-2015 Spreadtrum Communications Inc.
7 #include <linux/console.h>
8 #include <linux/delay.h>
9 #include <linux/dmaengine.h>
10 #include <linux/dma-mapping.h>
11 #include <linux/dma/sprd-dma.h>
13 #include <linux/ioport.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/serial_core.h>
19 #include <linux/serial.h>
20 #include <linux/slab.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
26 #define SPRD_TTY_NAME "ttyS"
27 #define SPRD_FIFO_SIZE 128
28 #define SPRD_DEF_RATE 26000000
29 #define SPRD_BAUD_IO_LIMIT 3000000
30 #define SPRD_TIMEOUT 256000
32 /* the offset of serial registers and BITs for them */
34 #define SPRD_TXD 0x0000
35 #define SPRD_RXD 0x0004
37 /* line status register and its BITs */
38 #define SPRD_LSR 0x0008
39 #define SPRD_LSR_OE BIT(4)
40 #define SPRD_LSR_FE BIT(3)
41 #define SPRD_LSR_PE BIT(2)
42 #define SPRD_LSR_BI BIT(7)
43 #define SPRD_LSR_TX_OVER BIT(15)
45 /* data number in TX and RX fifo */
46 #define SPRD_STS1 0x000C
47 #define SPRD_RX_FIFO_CNT_MASK GENMASK(7, 0)
48 #define SPRD_TX_FIFO_CNT_MASK GENMASK(15, 8)
50 /* interrupt enable register and its BITs */
51 #define SPRD_IEN 0x0010
52 #define SPRD_IEN_RX_FULL BIT(0)
53 #define SPRD_IEN_TX_EMPTY BIT(1)
54 #define SPRD_IEN_BREAK_DETECT BIT(7)
55 #define SPRD_IEN_TIMEOUT BIT(13)
56 #define SPRD_IEN_DATA_TIMEOUT BIT(17)
58 /* interrupt clear register */
59 #define SPRD_ICLR 0x0014
60 #define SPRD_ICLR_TIMEOUT BIT(13)
61 #define SPRD_ICLR_DATA_TIMEOUT BIT(17)
63 /* line control register */
64 #define SPRD_LCR 0x0018
65 #define SPRD_LCR_STOP_1BIT 0x10
66 #define SPRD_LCR_STOP_2BIT 0x30
67 #define SPRD_LCR_DATA_LEN (BIT(2) | BIT(3))
68 #define SPRD_LCR_DATA_LEN5 0x0
69 #define SPRD_LCR_DATA_LEN6 0x4
70 #define SPRD_LCR_DATA_LEN7 0x8
71 #define SPRD_LCR_DATA_LEN8 0xc
72 #define SPRD_LCR_PARITY (BIT(0) | BIT(1))
73 #define SPRD_LCR_PARITY_EN 0x2
74 #define SPRD_LCR_EVEN_PAR 0x0
75 #define SPRD_LCR_ODD_PAR 0x1
77 /* control register 1 */
78 #define SPRD_CTL1 0x001C
79 #define SPRD_DMA_EN BIT(15)
80 #define SPRD_LOOPBACK_EN BIT(14)
81 #define RX_HW_FLOW_CTL_THLD BIT(6)
82 #define RX_HW_FLOW_CTL_EN BIT(7)
83 #define TX_HW_FLOW_CTL_EN BIT(8)
84 #define RX_TOUT_THLD_DEF 0x3E00
85 #define RX_HFC_THLD_DEF 0x40
87 /* fifo threshold register */
88 #define SPRD_CTL2 0x0020
89 #define THLD_TX_EMPTY 0x40
90 #define THLD_TX_EMPTY_SHIFT 8
91 #define THLD_RX_FULL 0x40
92 #define THLD_RX_FULL_MASK GENMASK(6, 0)
94 /* config baud rate register */
95 #define SPRD_CLKD0 0x0024
96 #define SPRD_CLKD0_MASK GENMASK(15, 0)
97 #define SPRD_CLKD1 0x0028
98 #define SPRD_CLKD1_MASK GENMASK(20, 16)
99 #define SPRD_CLKD1_SHIFT 16
101 /* interrupt mask status register */
102 #define SPRD_IMSR 0x002C
103 #define SPRD_IMSR_RX_FIFO_FULL BIT(0)
104 #define SPRD_IMSR_TX_FIFO_EMPTY BIT(1)
105 #define SPRD_IMSR_BREAK_DETECT BIT(7)
106 #define SPRD_IMSR_TIMEOUT BIT(13)
107 #define SPRD_IMSR_DATA_TIMEOUT BIT(17)
108 #define SPRD_DEFAULT_SOURCE_CLK 26000000
110 #define SPRD_RX_DMA_STEP 1
111 #define SPRD_RX_FIFO_FULL 1
112 #define SPRD_TX_FIFO_FULL 0x20
113 #define SPRD_UART_RX_SIZE (UART_XMIT_SIZE / 4)
115 struct sprd_uart_dma
{
116 struct dma_chan
*chn
;
118 dma_addr_t phys_addr
;
124 struct sprd_uart_data
{
125 unsigned int timeout_ien
;
126 unsigned int timeout_iclr
;
127 unsigned int timeout_imsr
;
130 struct sprd_uart_port
{
131 struct uart_port port
;
134 struct sprd_uart_dma tx_dma
;
135 struct sprd_uart_dma rx_dma
;
137 unsigned char *rx_buf_tail
;
138 const struct sprd_uart_data
*pdata
;
141 static struct sprd_uart_port
*sprd_port
[UART_NR_MAX
];
142 static int sprd_ports_num
;
144 static int sprd_start_dma_rx(struct uart_port
*port
);
145 static int sprd_tx_dma_config(struct uart_port
*port
);
147 static const struct sprd_uart_data sc9836_data
= {
148 .timeout_ien
= SPRD_IEN_TIMEOUT
,
149 .timeout_iclr
= SPRD_ICLR_TIMEOUT
,
150 .timeout_imsr
= SPRD_IMSR_TIMEOUT
,
153 static const struct sprd_uart_data sc9632_data
= {
154 .timeout_ien
= SPRD_IEN_DATA_TIMEOUT
,
155 .timeout_iclr
= SPRD_ICLR_DATA_TIMEOUT
,
156 .timeout_imsr
= SPRD_IMSR_DATA_TIMEOUT
,
159 static inline unsigned int serial_in(struct uart_port
*port
,
162 return readl_relaxed(port
->membase
+ offset
);
165 static inline void serial_out(struct uart_port
*port
, unsigned int offset
,
168 writel_relaxed(value
, port
->membase
+ offset
);
171 static unsigned int sprd_tx_empty(struct uart_port
*port
)
173 if (serial_in(port
, SPRD_STS1
) & SPRD_TX_FIFO_CNT_MASK
)
179 static unsigned int sprd_get_mctrl(struct uart_port
*port
)
181 return TIOCM_DSR
| TIOCM_CTS
;
184 static void sprd_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
186 u32 val
= serial_in(port
, SPRD_CTL1
);
188 if (mctrl
& TIOCM_LOOP
)
189 val
|= SPRD_LOOPBACK_EN
;
191 val
&= ~SPRD_LOOPBACK_EN
;
193 serial_out(port
, SPRD_CTL1
, val
);
196 static void sprd_stop_rx(struct uart_port
*port
)
198 struct sprd_uart_port
*sp
=
199 container_of(port
, struct sprd_uart_port
, port
);
200 unsigned int ien
, iclr
;
202 if (sp
->rx_dma
.enable
)
203 dmaengine_terminate_all(sp
->rx_dma
.chn
);
205 iclr
= serial_in(port
, SPRD_ICLR
);
206 ien
= serial_in(port
, SPRD_IEN
);
208 ien
&= ~(SPRD_IEN_RX_FULL
| SPRD_IEN_BREAK_DETECT
);
209 iclr
|= SPRD_IEN_RX_FULL
| SPRD_IEN_BREAK_DETECT
;
211 serial_out(port
, SPRD_IEN
, ien
);
212 serial_out(port
, SPRD_ICLR
, iclr
);
215 static void sprd_uart_dma_enable(struct uart_port
*port
, bool enable
)
217 u32 val
= serial_in(port
, SPRD_CTL1
);
224 serial_out(port
, SPRD_CTL1
, val
);
227 static void sprd_stop_tx_dma(struct uart_port
*port
)
229 struct sprd_uart_port
*sp
=
230 container_of(port
, struct sprd_uart_port
, port
);
231 struct dma_tx_state state
;
234 dmaengine_pause(sp
->tx_dma
.chn
);
236 dmaengine_tx_status(sp
->tx_dma
.chn
, sp
->tx_dma
.cookie
, &state
);
238 trans_len
= state
.residue
- sp
->tx_dma
.phys_addr
;
239 uart_xmit_advance(port
, trans_len
);
240 dma_unmap_single(port
->dev
, sp
->tx_dma
.phys_addr
,
241 sp
->tx_dma
.trans_len
, DMA_TO_DEVICE
);
244 dmaengine_terminate_all(sp
->tx_dma
.chn
);
245 sp
->tx_dma
.trans_len
= 0;
248 static int sprd_tx_buf_remap(struct uart_port
*port
)
250 struct sprd_uart_port
*sp
=
251 container_of(port
, struct sprd_uart_port
, port
);
252 struct tty_port
*tport
= &port
->state
->port
;
255 sp
->tx_dma
.trans_len
= kfifo_out_linear_ptr(&tport
->xmit_fifo
, &tail
,
258 sp
->tx_dma
.phys_addr
= dma_map_single(port
->dev
, tail
,
259 sp
->tx_dma
.trans_len
,
261 return dma_mapping_error(port
->dev
, sp
->tx_dma
.phys_addr
);
264 static void sprd_complete_tx_dma(void *data
)
266 struct uart_port
*port
= (struct uart_port
*)data
;
267 struct sprd_uart_port
*sp
=
268 container_of(port
, struct sprd_uart_port
, port
);
269 struct tty_port
*tport
= &port
->state
->port
;
272 uart_port_lock_irqsave(port
, &flags
);
273 dma_unmap_single(port
->dev
, sp
->tx_dma
.phys_addr
,
274 sp
->tx_dma
.trans_len
, DMA_TO_DEVICE
);
276 uart_xmit_advance(port
, sp
->tx_dma
.trans_len
);
278 if (kfifo_len(&tport
->xmit_fifo
) < WAKEUP_CHARS
)
279 uart_write_wakeup(port
);
281 if (kfifo_is_empty(&tport
->xmit_fifo
) || sprd_tx_buf_remap(port
) ||
282 sprd_tx_dma_config(port
))
283 sp
->tx_dma
.trans_len
= 0;
285 uart_port_unlock_irqrestore(port
, flags
);
288 static int sprd_uart_dma_submit(struct uart_port
*port
,
289 struct sprd_uart_dma
*ud
, u32 trans_len
,
290 enum dma_transfer_direction direction
,
291 dma_async_tx_callback callback
)
293 struct dma_async_tx_descriptor
*dma_des
;
296 flags
= SPRD_DMA_FLAGS(SPRD_DMA_CHN_MODE_NONE
,
301 dma_des
= dmaengine_prep_slave_single(ud
->chn
, ud
->phys_addr
, trans_len
,
306 dma_des
->callback
= callback
;
307 dma_des
->callback_param
= port
;
309 ud
->cookie
= dmaengine_submit(dma_des
);
310 if (dma_submit_error(ud
->cookie
))
311 return dma_submit_error(ud
->cookie
);
313 dma_async_issue_pending(ud
->chn
);
318 static int sprd_tx_dma_config(struct uart_port
*port
)
320 struct sprd_uart_port
*sp
=
321 container_of(port
, struct sprd_uart_port
, port
);
322 u32 burst
= sp
->tx_dma
.trans_len
> SPRD_TX_FIFO_FULL
?
323 SPRD_TX_FIFO_FULL
: sp
->tx_dma
.trans_len
;
325 struct dma_slave_config cfg
= {
326 .dst_addr
= port
->mapbase
+ SPRD_TXD
,
327 .src_addr_width
= DMA_SLAVE_BUSWIDTH_1_BYTE
,
328 .dst_addr_width
= DMA_SLAVE_BUSWIDTH_1_BYTE
,
329 .src_maxburst
= burst
,
332 ret
= dmaengine_slave_config(sp
->tx_dma
.chn
, &cfg
);
336 return sprd_uart_dma_submit(port
, &sp
->tx_dma
, sp
->tx_dma
.trans_len
,
337 DMA_MEM_TO_DEV
, sprd_complete_tx_dma
);
340 static void sprd_start_tx_dma(struct uart_port
*port
)
342 struct sprd_uart_port
*sp
=
343 container_of(port
, struct sprd_uart_port
, port
);
344 struct tty_port
*tport
= &port
->state
->port
;
347 serial_out(port
, SPRD_TXD
, port
->x_char
);
353 if (kfifo_is_empty(&tport
->xmit_fifo
) || uart_tx_stopped(port
)) {
354 sprd_stop_tx_dma(port
);
358 if (sp
->tx_dma
.trans_len
)
361 if (sprd_tx_buf_remap(port
) || sprd_tx_dma_config(port
))
362 sp
->tx_dma
.trans_len
= 0;
365 static void sprd_rx_full_thld(struct uart_port
*port
, u32 thld
)
367 u32 val
= serial_in(port
, SPRD_CTL2
);
369 val
&= ~THLD_RX_FULL_MASK
;
370 val
|= thld
& THLD_RX_FULL_MASK
;
371 serial_out(port
, SPRD_CTL2
, val
);
374 static int sprd_rx_alloc_buf(struct sprd_uart_port
*sp
)
376 sp
->rx_dma
.virt
= dma_alloc_coherent(sp
->port
.dev
, SPRD_UART_RX_SIZE
,
377 &sp
->rx_dma
.phys_addr
, GFP_KERNEL
);
378 if (!sp
->rx_dma
.virt
)
384 static void sprd_rx_free_buf(struct sprd_uart_port
*sp
)
387 dma_free_coherent(sp
->port
.dev
, SPRD_UART_RX_SIZE
,
388 sp
->rx_dma
.virt
, sp
->rx_dma
.phys_addr
);
389 sp
->rx_dma
.virt
= NULL
;
392 static int sprd_rx_dma_config(struct uart_port
*port
, u32 burst
)
394 struct sprd_uart_port
*sp
=
395 container_of(port
, struct sprd_uart_port
, port
);
396 struct dma_slave_config cfg
= {
397 .src_addr
= port
->mapbase
+ SPRD_RXD
,
398 .src_addr_width
= DMA_SLAVE_BUSWIDTH_1_BYTE
,
399 .dst_addr_width
= DMA_SLAVE_BUSWIDTH_1_BYTE
,
400 .src_maxburst
= burst
,
403 return dmaengine_slave_config(sp
->rx_dma
.chn
, &cfg
);
406 static void sprd_uart_dma_rx(struct uart_port
*port
)
408 struct sprd_uart_port
*sp
=
409 container_of(port
, struct sprd_uart_port
, port
);
410 struct tty_port
*tty
= &port
->state
->port
;
412 port
->icount
.rx
+= sp
->rx_dma
.trans_len
;
413 tty_insert_flip_string(tty
, sp
->rx_buf_tail
, sp
->rx_dma
.trans_len
);
414 tty_flip_buffer_push(tty
);
417 static void sprd_uart_dma_irq(struct uart_port
*port
)
419 struct sprd_uart_port
*sp
=
420 container_of(port
, struct sprd_uart_port
, port
);
421 struct dma_tx_state state
;
422 enum dma_status status
;
424 status
= dmaengine_tx_status(sp
->rx_dma
.chn
,
425 sp
->rx_dma
.cookie
, &state
);
426 if (status
== DMA_ERROR
)
429 if (!state
.residue
&& sp
->pos
== sp
->rx_dma
.phys_addr
)
432 if (!state
.residue
) {
433 sp
->rx_dma
.trans_len
= SPRD_UART_RX_SIZE
+
434 sp
->rx_dma
.phys_addr
- sp
->pos
;
435 sp
->pos
= sp
->rx_dma
.phys_addr
;
437 sp
->rx_dma
.trans_len
= state
.residue
- sp
->pos
;
438 sp
->pos
= state
.residue
;
441 sprd_uart_dma_rx(port
);
442 sp
->rx_buf_tail
+= sp
->rx_dma
.trans_len
;
445 static void sprd_complete_rx_dma(void *data
)
447 struct uart_port
*port
= (struct uart_port
*)data
;
448 struct sprd_uart_port
*sp
=
449 container_of(port
, struct sprd_uart_port
, port
);
450 struct dma_tx_state state
;
451 enum dma_status status
;
454 uart_port_lock_irqsave(port
, &flags
);
456 status
= dmaengine_tx_status(sp
->rx_dma
.chn
,
457 sp
->rx_dma
.cookie
, &state
);
458 if (status
!= DMA_COMPLETE
) {
460 uart_port_unlock_irqrestore(port
, flags
);
464 if (sp
->pos
!= sp
->rx_dma
.phys_addr
) {
465 sp
->rx_dma
.trans_len
= SPRD_UART_RX_SIZE
+
466 sp
->rx_dma
.phys_addr
- sp
->pos
;
467 sprd_uart_dma_rx(port
);
468 sp
->rx_buf_tail
+= sp
->rx_dma
.trans_len
;
471 if (sprd_start_dma_rx(port
))
474 uart_port_unlock_irqrestore(port
, flags
);
477 static int sprd_start_dma_rx(struct uart_port
*port
)
479 struct sprd_uart_port
*sp
=
480 container_of(port
, struct sprd_uart_port
, port
);
483 if (!sp
->rx_dma
.enable
)
486 sp
->pos
= sp
->rx_dma
.phys_addr
;
487 sp
->rx_buf_tail
= sp
->rx_dma
.virt
;
488 sprd_rx_full_thld(port
, SPRD_RX_FIFO_FULL
);
489 ret
= sprd_rx_dma_config(port
, SPRD_RX_DMA_STEP
);
493 return sprd_uart_dma_submit(port
, &sp
->rx_dma
, SPRD_UART_RX_SIZE
,
494 DMA_DEV_TO_MEM
, sprd_complete_rx_dma
);
497 static void sprd_release_dma(struct uart_port
*port
)
499 struct sprd_uart_port
*sp
=
500 container_of(port
, struct sprd_uart_port
, port
);
502 sprd_uart_dma_enable(port
, false);
504 if (sp
->rx_dma
.enable
)
505 dma_release_channel(sp
->rx_dma
.chn
);
507 if (sp
->tx_dma
.enable
)
508 dma_release_channel(sp
->tx_dma
.chn
);
510 sp
->tx_dma
.enable
= false;
511 sp
->rx_dma
.enable
= false;
514 static void sprd_request_dma(struct uart_port
*port
)
516 struct sprd_uart_port
*sp
=
517 container_of(port
, struct sprd_uart_port
, port
);
519 sp
->tx_dma
.enable
= true;
520 sp
->rx_dma
.enable
= true;
522 sp
->tx_dma
.chn
= dma_request_chan(port
->dev
, "tx");
523 if (IS_ERR(sp
->tx_dma
.chn
)) {
524 dev_err(port
->dev
, "request TX DMA channel failed, ret = %ld\n",
525 PTR_ERR(sp
->tx_dma
.chn
));
526 sp
->tx_dma
.enable
= false;
529 sp
->rx_dma
.chn
= dma_request_chan(port
->dev
, "rx");
530 if (IS_ERR(sp
->rx_dma
.chn
)) {
531 dev_err(port
->dev
, "request RX DMA channel failed, ret = %ld\n",
532 PTR_ERR(sp
->rx_dma
.chn
));
533 sp
->rx_dma
.enable
= false;
537 static void sprd_stop_tx(struct uart_port
*port
)
539 struct sprd_uart_port
*sp
= container_of(port
, struct sprd_uart_port
,
541 unsigned int ien
, iclr
;
543 if (sp
->tx_dma
.enable
) {
544 sprd_stop_tx_dma(port
);
548 iclr
= serial_in(port
, SPRD_ICLR
);
549 ien
= serial_in(port
, SPRD_IEN
);
551 iclr
|= SPRD_IEN_TX_EMPTY
;
552 ien
&= ~SPRD_IEN_TX_EMPTY
;
554 serial_out(port
, SPRD_IEN
, ien
);
555 serial_out(port
, SPRD_ICLR
, iclr
);
558 static void sprd_start_tx(struct uart_port
*port
)
560 struct sprd_uart_port
*sp
= container_of(port
, struct sprd_uart_port
,
564 if (sp
->tx_dma
.enable
) {
565 sprd_start_tx_dma(port
);
569 ien
= serial_in(port
, SPRD_IEN
);
570 if (!(ien
& SPRD_IEN_TX_EMPTY
)) {
571 ien
|= SPRD_IEN_TX_EMPTY
;
572 serial_out(port
, SPRD_IEN
, ien
);
576 /* The Sprd serial does not support this function. */
577 static void sprd_break_ctl(struct uart_port
*port
, int break_state
)
582 static int handle_lsr_errors(struct uart_port
*port
,
589 if (*lsr
& SPRD_LSR_BI
) {
590 *lsr
&= ~(SPRD_LSR_FE
| SPRD_LSR_PE
);
592 ret
= uart_handle_break(port
);
595 } else if (*lsr
& SPRD_LSR_PE
)
596 port
->icount
.parity
++;
597 else if (*lsr
& SPRD_LSR_FE
)
598 port
->icount
.frame
++;
599 if (*lsr
& SPRD_LSR_OE
)
600 port
->icount
.overrun
++;
602 /* mask off conditions which should be ignored */
603 *lsr
&= port
->read_status_mask
;
604 if (*lsr
& SPRD_LSR_BI
)
606 else if (*lsr
& SPRD_LSR_PE
)
608 else if (*lsr
& SPRD_LSR_FE
)
614 static inline void sprd_rx(struct uart_port
*port
)
616 struct sprd_uart_port
*sp
= container_of(port
, struct sprd_uart_port
,
618 struct tty_port
*tty
= &port
->state
->port
;
619 unsigned int lsr
, max_count
= SPRD_TIMEOUT
;
622 if (sp
->rx_dma
.enable
) {
623 sprd_uart_dma_irq(port
);
627 while ((serial_in(port
, SPRD_STS1
) & SPRD_RX_FIFO_CNT_MASK
) &&
629 lsr
= serial_in(port
, SPRD_LSR
);
630 ch
= serial_in(port
, SPRD_RXD
);
634 if (lsr
& (SPRD_LSR_BI
| SPRD_LSR_PE
|
635 SPRD_LSR_FE
| SPRD_LSR_OE
))
636 if (handle_lsr_errors(port
, &flag
, &lsr
))
638 if (uart_handle_sysrq_char(port
, ch
))
641 uart_insert_char(port
, lsr
, SPRD_LSR_OE
, ch
, flag
);
644 tty_flip_buffer_push(tty
);
647 static inline void sprd_tx(struct uart_port
*port
)
651 uart_port_tx_limited(port
, ch
, THLD_TX_EMPTY
,
653 serial_out(port
, SPRD_TXD
, ch
),
657 /* this handles the interrupt from one port */
658 static irqreturn_t
sprd_handle_irq(int irq
, void *dev_id
)
660 struct uart_port
*port
= dev_id
;
662 struct sprd_uart_port
*sp
=
663 container_of(port
, struct sprd_uart_port
, port
);
665 uart_port_lock(port
);
667 ims
= serial_in(port
, SPRD_IMSR
);
670 uart_port_unlock(port
);
674 if (ims
& sp
->pdata
->timeout_imsr
)
675 serial_out(port
, SPRD_ICLR
, sp
->pdata
->timeout_iclr
);
677 if (ims
& SPRD_IMSR_BREAK_DETECT
)
678 serial_out(port
, SPRD_ICLR
, SPRD_IMSR_BREAK_DETECT
);
680 if (ims
& (SPRD_IMSR_RX_FIFO_FULL
| SPRD_IMSR_BREAK_DETECT
|
681 sp
->pdata
->timeout_imsr
))
684 if (ims
& SPRD_IMSR_TX_FIFO_EMPTY
)
687 uart_port_unlock(port
);
692 static void sprd_uart_dma_startup(struct uart_port
*port
,
693 struct sprd_uart_port
*sp
)
697 sprd_request_dma(port
);
698 if (!(sp
->rx_dma
.enable
|| sp
->tx_dma
.enable
))
701 ret
= sprd_start_dma_rx(port
);
703 sp
->rx_dma
.enable
= false;
704 dma_release_channel(sp
->rx_dma
.chn
);
705 dev_warn(port
->dev
, "fail to start RX dma mode\n");
708 sprd_uart_dma_enable(port
, true);
711 static int sprd_startup(struct uart_port
*port
)
714 unsigned int ien
, fc
;
715 unsigned int timeout
;
716 struct sprd_uart_port
*sp
;
719 serial_out(port
, SPRD_CTL2
,
720 THLD_TX_EMPTY
<< THLD_TX_EMPTY_SHIFT
| THLD_RX_FULL
);
723 timeout
= SPRD_TIMEOUT
;
724 while (timeout
-- && serial_in(port
, SPRD_STS1
) & SPRD_RX_FIFO_CNT_MASK
)
725 serial_in(port
, SPRD_RXD
);
728 timeout
= SPRD_TIMEOUT
;
729 while (timeout
-- && serial_in(port
, SPRD_STS1
) & SPRD_TX_FIFO_CNT_MASK
)
732 /* clear interrupt */
733 serial_out(port
, SPRD_IEN
, 0);
734 serial_out(port
, SPRD_ICLR
, ~0);
737 sp
= container_of(port
, struct sprd_uart_port
, port
);
738 snprintf(sp
->name
, sizeof(sp
->name
), "sprd_serial%d", port
->line
);
740 sprd_uart_dma_startup(port
, sp
);
742 ret
= devm_request_irq(port
->dev
, port
->irq
, sprd_handle_irq
,
743 IRQF_SHARED
, sp
->name
, port
);
745 dev_err(port
->dev
, "fail to request serial irq %d, ret=%d\n",
749 fc
= serial_in(port
, SPRD_CTL1
);
750 fc
|= RX_TOUT_THLD_DEF
| RX_HFC_THLD_DEF
;
751 serial_out(port
, SPRD_CTL1
, fc
);
753 /* enable interrupt */
754 uart_port_lock_irqsave(port
, &flags
);
755 ien
= serial_in(port
, SPRD_IEN
);
756 ien
|= SPRD_IEN_BREAK_DETECT
| sp
->pdata
->timeout_ien
;
757 if (!sp
->rx_dma
.enable
)
758 ien
|= SPRD_IEN_RX_FULL
;
759 serial_out(port
, SPRD_IEN
, ien
);
760 uart_port_unlock_irqrestore(port
, flags
);
765 static void sprd_shutdown(struct uart_port
*port
)
767 sprd_release_dma(port
);
768 serial_out(port
, SPRD_IEN
, 0);
769 serial_out(port
, SPRD_ICLR
, ~0);
770 devm_free_irq(port
->dev
, port
->irq
, port
);
773 static void sprd_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
774 const struct ktermios
*old
)
776 unsigned int baud
, quot
;
777 unsigned int lcr
= 0, fc
;
780 /* ask the core to calculate the divisor for us */
781 baud
= uart_get_baud_rate(port
, termios
, old
, 0, SPRD_BAUD_IO_LIMIT
);
783 quot
= port
->uartclk
/ baud
;
785 /* set data length */
786 switch (termios
->c_cflag
& CSIZE
) {
788 lcr
|= SPRD_LCR_DATA_LEN5
;
791 lcr
|= SPRD_LCR_DATA_LEN6
;
794 lcr
|= SPRD_LCR_DATA_LEN7
;
798 lcr
|= SPRD_LCR_DATA_LEN8
;
802 /* calculate stop bits */
803 lcr
&= ~(SPRD_LCR_STOP_1BIT
| SPRD_LCR_STOP_2BIT
);
804 if (termios
->c_cflag
& CSTOPB
)
805 lcr
|= SPRD_LCR_STOP_2BIT
;
807 lcr
|= SPRD_LCR_STOP_1BIT
;
809 /* calculate parity */
810 lcr
&= ~SPRD_LCR_PARITY
;
811 termios
->c_cflag
&= ~CMSPAR
; /* no support mark/space */
812 if (termios
->c_cflag
& PARENB
) {
813 lcr
|= SPRD_LCR_PARITY_EN
;
814 if (termios
->c_cflag
& PARODD
)
815 lcr
|= SPRD_LCR_ODD_PAR
;
817 lcr
|= SPRD_LCR_EVEN_PAR
;
820 uart_port_lock_irqsave(port
, &flags
);
822 /* update the per-port timeout */
823 uart_update_timeout(port
, termios
->c_cflag
, baud
);
825 port
->read_status_mask
= SPRD_LSR_OE
;
826 if (termios
->c_iflag
& INPCK
)
827 port
->read_status_mask
|= SPRD_LSR_FE
| SPRD_LSR_PE
;
828 if (termios
->c_iflag
& (IGNBRK
| BRKINT
| PARMRK
))
829 port
->read_status_mask
|= SPRD_LSR_BI
;
831 /* characters to ignore */
832 port
->ignore_status_mask
= 0;
833 if (termios
->c_iflag
& IGNPAR
)
834 port
->ignore_status_mask
|= SPRD_LSR_PE
| SPRD_LSR_FE
;
835 if (termios
->c_iflag
& IGNBRK
) {
836 port
->ignore_status_mask
|= SPRD_LSR_BI
;
838 * If we're ignoring parity and break indicators,
839 * ignore overruns too (for real raw support).
841 if (termios
->c_iflag
& IGNPAR
)
842 port
->ignore_status_mask
|= SPRD_LSR_OE
;
846 fc
= serial_in(port
, SPRD_CTL1
);
847 fc
&= ~(RX_HW_FLOW_CTL_THLD
| RX_HW_FLOW_CTL_EN
| TX_HW_FLOW_CTL_EN
);
848 if (termios
->c_cflag
& CRTSCTS
) {
849 fc
|= RX_HW_FLOW_CTL_THLD
;
850 fc
|= RX_HW_FLOW_CTL_EN
;
851 fc
|= TX_HW_FLOW_CTL_EN
;
854 /* clock divider bit0~bit15 */
855 serial_out(port
, SPRD_CLKD0
, quot
& SPRD_CLKD0_MASK
);
857 /* clock divider bit16~bit20 */
858 serial_out(port
, SPRD_CLKD1
,
859 (quot
& SPRD_CLKD1_MASK
) >> SPRD_CLKD1_SHIFT
);
860 serial_out(port
, SPRD_LCR
, lcr
);
861 fc
|= RX_TOUT_THLD_DEF
| RX_HFC_THLD_DEF
;
862 serial_out(port
, SPRD_CTL1
, fc
);
864 uart_port_unlock_irqrestore(port
, flags
);
866 /* Don't rewrite B0 */
867 if (tty_termios_baud_rate(termios
))
868 tty_termios_encode_baud_rate(termios
, baud
, baud
);
871 static const char *sprd_type(struct uart_port
*port
)
876 static void sprd_release_port(struct uart_port
*port
)
881 static int sprd_request_port(struct uart_port
*port
)
886 static void sprd_config_port(struct uart_port
*port
, int flags
)
888 if (flags
& UART_CONFIG_TYPE
)
889 port
->type
= PORT_SPRD
;
892 static int sprd_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
894 if (ser
->type
!= PORT_SPRD
)
896 if (port
->irq
!= ser
->irq
)
898 if (port
->iotype
!= ser
->io_type
)
903 static void sprd_pm(struct uart_port
*port
, unsigned int state
,
904 unsigned int oldstate
)
906 struct sprd_uart_port
*sup
=
907 container_of(port
, struct sprd_uart_port
, port
);
910 case UART_PM_STATE_ON
:
911 clk_prepare_enable(sup
->clk
);
913 case UART_PM_STATE_OFF
:
914 clk_disable_unprepare(sup
->clk
);
919 #ifdef CONFIG_CONSOLE_POLL
920 static int sprd_poll_init(struct uart_port
*port
)
922 if (port
->state
->pm_state
!= UART_PM_STATE_ON
) {
923 sprd_pm(port
, UART_PM_STATE_ON
, 0);
924 port
->state
->pm_state
= UART_PM_STATE_ON
;
930 static int sprd_poll_get_char(struct uart_port
*port
)
932 while (!(serial_in(port
, SPRD_STS1
) & SPRD_RX_FIFO_CNT_MASK
))
935 return serial_in(port
, SPRD_RXD
);
938 static void sprd_poll_put_char(struct uart_port
*port
, unsigned char ch
)
940 while (serial_in(port
, SPRD_STS1
) & SPRD_TX_FIFO_CNT_MASK
)
943 serial_out(port
, SPRD_TXD
, ch
);
947 static const struct uart_ops serial_sprd_ops
= {
948 .tx_empty
= sprd_tx_empty
,
949 .get_mctrl
= sprd_get_mctrl
,
950 .set_mctrl
= sprd_set_mctrl
,
951 .stop_tx
= sprd_stop_tx
,
952 .start_tx
= sprd_start_tx
,
953 .stop_rx
= sprd_stop_rx
,
954 .break_ctl
= sprd_break_ctl
,
955 .startup
= sprd_startup
,
956 .shutdown
= sprd_shutdown
,
957 .set_termios
= sprd_set_termios
,
959 .release_port
= sprd_release_port
,
960 .request_port
= sprd_request_port
,
961 .config_port
= sprd_config_port
,
962 .verify_port
= sprd_verify_port
,
964 #ifdef CONFIG_CONSOLE_POLL
965 .poll_init
= sprd_poll_init
,
966 .poll_get_char
= sprd_poll_get_char
,
967 .poll_put_char
= sprd_poll_put_char
,
971 #ifdef CONFIG_SERIAL_SPRD_CONSOLE
972 static void wait_for_xmitr(struct uart_port
*port
)
974 unsigned int status
, tmout
= 10000;
976 /* wait up to 10ms for the character(s) to be sent */
978 status
= serial_in(port
, SPRD_STS1
);
982 } while (status
& SPRD_TX_FIFO_CNT_MASK
);
985 static void sprd_console_putchar(struct uart_port
*port
, unsigned char ch
)
987 wait_for_xmitr(port
);
988 serial_out(port
, SPRD_TXD
, ch
);
991 static void sprd_console_write(struct console
*co
, const char *s
,
994 struct uart_port
*port
= &sprd_port
[co
->index
]->port
;
1000 else if (oops_in_progress
)
1001 locked
= uart_port_trylock_irqsave(port
, &flags
);
1003 uart_port_lock_irqsave(port
, &flags
);
1005 uart_console_write(port
, s
, count
, sprd_console_putchar
);
1007 /* wait for transmitter to become empty */
1008 wait_for_xmitr(port
);
1011 uart_port_unlock_irqrestore(port
, flags
);
1014 static int sprd_console_setup(struct console
*co
, char *options
)
1016 struct sprd_uart_port
*sprd_uart_port
;
1022 if (co
->index
>= UART_NR_MAX
|| co
->index
< 0)
1025 sprd_uart_port
= sprd_port
[co
->index
];
1026 if (!sprd_uart_port
|| !sprd_uart_port
->port
.membase
) {
1027 pr_info("serial port %d not yet initialized\n", co
->index
);
1032 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1034 return uart_set_options(&sprd_uart_port
->port
, co
, baud
,
1035 parity
, bits
, flow
);
1038 static struct uart_driver sprd_uart_driver
;
1039 static struct console sprd_console
= {
1040 .name
= SPRD_TTY_NAME
,
1041 .write
= sprd_console_write
,
1042 .device
= uart_console_device
,
1043 .setup
= sprd_console_setup
,
1044 .flags
= CON_PRINTBUFFER
,
1046 .data
= &sprd_uart_driver
,
1049 static int __init
sprd_serial_console_init(void)
1051 register_console(&sprd_console
);
1054 console_initcall(sprd_serial_console_init
);
1056 #define SPRD_CONSOLE (&sprd_console)
1058 /* Support for earlycon */
1059 static void sprd_putc(struct uart_port
*port
, unsigned char c
)
1061 unsigned int timeout
= SPRD_TIMEOUT
;
1064 !(readl(port
->membase
+ SPRD_LSR
) & SPRD_LSR_TX_OVER
))
1067 writeb(c
, port
->membase
+ SPRD_TXD
);
1070 static void sprd_early_write(struct console
*con
, const char *s
, unsigned int n
)
1072 struct earlycon_device
*dev
= con
->data
;
1074 uart_console_write(&dev
->port
, s
, n
, sprd_putc
);
1077 static int __init
sprd_early_console_setup(struct earlycon_device
*device
,
1080 if (!device
->port
.membase
)
1083 device
->con
->write
= sprd_early_write
;
1086 OF_EARLYCON_DECLARE(sprd_serial
, "sprd,sc9836-uart",
1087 sprd_early_console_setup
);
1089 #else /* !CONFIG_SERIAL_SPRD_CONSOLE */
1090 #define SPRD_CONSOLE NULL
1093 static struct uart_driver sprd_uart_driver
= {
1094 .owner
= THIS_MODULE
,
1095 .driver_name
= "sprd_serial",
1096 .dev_name
= SPRD_TTY_NAME
,
1100 .cons
= SPRD_CONSOLE
,
1103 static void sprd_remove(struct platform_device
*dev
)
1105 struct sprd_uart_port
*sup
= platform_get_drvdata(dev
);
1108 uart_remove_one_port(&sprd_uart_driver
, &sup
->port
);
1109 sprd_port
[sup
->port
.line
] = NULL
;
1110 sprd_rx_free_buf(sup
);
1114 if (!sprd_ports_num
)
1115 uart_unregister_driver(&sprd_uart_driver
);
1118 static bool sprd_uart_is_console(struct uart_port
*uport
)
1120 struct console
*cons
= sprd_uart_driver
.cons
;
1122 if ((cons
&& cons
->index
>= 0 && cons
->index
== uport
->line
) ||
1123 of_console_check(uport
->dev
->of_node
, SPRD_TTY_NAME
, uport
->line
))
1129 static int sprd_clk_init(struct uart_port
*uport
)
1131 struct clk
*clk_uart
, *clk_parent
;
1132 struct sprd_uart_port
*u
= container_of(uport
, struct sprd_uart_port
, port
);
1134 clk_uart
= devm_clk_get(uport
->dev
, "uart");
1135 if (IS_ERR(clk_uart
)) {
1136 dev_warn(uport
->dev
, "uart%d can't get uart clock\n",
1141 clk_parent
= devm_clk_get(uport
->dev
, "source");
1142 if (IS_ERR(clk_parent
)) {
1143 dev_warn(uport
->dev
, "uart%d can't get source clock\n",
1148 if (!clk_uart
|| clk_set_parent(clk_uart
, clk_parent
))
1149 uport
->uartclk
= SPRD_DEFAULT_SOURCE_CLK
;
1151 uport
->uartclk
= clk_get_rate(clk_uart
);
1153 u
->clk
= devm_clk_get(uport
->dev
, "enable");
1154 if (IS_ERR(u
->clk
)) {
1155 if (PTR_ERR(u
->clk
) == -EPROBE_DEFER
)
1156 return -EPROBE_DEFER
;
1158 dev_warn(uport
->dev
, "uart%d can't get enable clock\n",
1161 /* To keep console alive even if the error occurred */
1162 if (!sprd_uart_is_console(uport
))
1163 return PTR_ERR(u
->clk
);
1171 static int sprd_probe(struct platform_device
*pdev
)
1173 struct resource
*res
;
1174 struct uart_port
*up
;
1175 struct sprd_uart_port
*sport
;
1180 index
= of_alias_get_id(pdev
->dev
.of_node
, "serial");
1181 if (index
< 0 || index
>= UART_NR_MAX
) {
1182 dev_err(&pdev
->dev
, "got a wrong serial alias id %d\n", index
);
1186 sport
= devm_kzalloc(&pdev
->dev
, sizeof(*sport
), GFP_KERNEL
);
1191 up
->dev
= &pdev
->dev
;
1193 up
->type
= PORT_SPRD
;
1194 up
->iotype
= UPIO_MEM
;
1195 up
->uartclk
= SPRD_DEF_RATE
;
1196 up
->fifosize
= SPRD_FIFO_SIZE
;
1197 up
->ops
= &serial_sprd_ops
;
1198 up
->flags
= UPF_BOOT_AUTOCONF
;
1199 up
->has_sysrq
= IS_ENABLED(CONFIG_SERIAL_SPRD_CONSOLE
);
1201 ret
= sprd_clk_init(up
);
1205 up
->membase
= devm_platform_get_and_ioremap_resource(pdev
, 0, &res
);
1206 if (IS_ERR(up
->membase
))
1207 return PTR_ERR(up
->membase
);
1209 up
->mapbase
= res
->start
;
1211 sport
->pdata
= of_device_get_match_data(&pdev
->dev
);
1212 if (!sport
->pdata
) {
1213 dev_err(&pdev
->dev
, "get match data failed!\n");
1217 irq
= platform_get_irq(pdev
, 0);
1223 * Allocate one dma buffer to prepare for receive transfer, in case
1224 * memory allocation failure at runtime.
1226 ret
= sprd_rx_alloc_buf(sport
);
1230 if (!sprd_ports_num
) {
1231 ret
= uart_register_driver(&sprd_uart_driver
);
1233 pr_err("Failed to register SPRD-UART driver\n");
1239 sprd_port
[index
] = sport
;
1241 ret
= uart_add_one_port(&sprd_uart_driver
, up
);
1245 platform_set_drvdata(pdev
, up
);
1250 sprd_port
[index
] = NULL
;
1251 if (--sprd_ports_num
== 0)
1252 uart_unregister_driver(&sprd_uart_driver
);
1254 sprd_rx_free_buf(sport
);
1258 #ifdef CONFIG_PM_SLEEP
1259 static int sprd_suspend(struct device
*dev
)
1261 struct sprd_uart_port
*sup
= dev_get_drvdata(dev
);
1263 uart_suspend_port(&sprd_uart_driver
, &sup
->port
);
1268 static int sprd_resume(struct device
*dev
)
1270 struct sprd_uart_port
*sup
= dev_get_drvdata(dev
);
1272 uart_resume_port(&sprd_uart_driver
, &sup
->port
);
1278 static SIMPLE_DEV_PM_OPS(sprd_pm_ops
, sprd_suspend
, sprd_resume
);
1280 static const struct of_device_id serial_ids
[] = {
1281 {.compatible
= "sprd,sc9836-uart", .data
= &sc9836_data
},
1282 {.compatible
= "sprd,sc9632-uart", .data
= &sc9632_data
},
1285 MODULE_DEVICE_TABLE(of
, serial_ids
);
1287 static struct platform_driver sprd_platform_driver
= {
1288 .probe
= sprd_probe
,
1289 .remove
= sprd_remove
,
1291 .name
= "sprd_serial",
1292 .of_match_table
= serial_ids
,
1297 module_platform_driver(sprd_platform_driver
);
1299 MODULE_LICENSE("GPL v2");
1300 MODULE_DESCRIPTION("Spreadtrum SoC serial driver series");