| blob | 3d404d19a205e3e432f8d367a28f1008bdc533dd |
1 // SPDX-License-Identifier: GPL-2.0+
2 /* Faraday FOTG210 EHCI-like driver
3 *
4 * Copyright (c) 2013 Faraday Technology Corporation
5 *
6 * Author: Yuan-Hsin Chen <yhchen@faraday-tech.com>
7 * Feng-Hsin Chiang <john453@faraday-tech.com>
8 * Po-Yu Chuang <ratbert.chuang@gmail.com>
9 *
10 * Most of code borrowed from the Linux-3.7 EHCI driver
11 */
12 #include <linux/module.h>
13 #include <linux/of.h>
14 #include <linux/device.h>
15 #include <linux/dmapool.h>
16 #include <linux/kernel.h>
17 #include <linux/delay.h>
18 #include <linux/ioport.h>
19 #include <linux/sched.h>
20 #include <linux/vmalloc.h>
21 #include <linux/errno.h>
22 #include <linux/init.h>
23 #include <linux/hrtimer.h>
24 #include <linux/list.h>
25 #include <linux/interrupt.h>
26 #include <linux/usb.h>
27 #include <linux/usb/hcd.h>
28 #include <linux/moduleparam.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/debugfs.h>
31 #include <linux/slab.h>
32 #include <linux/uaccess.h>
33 #include <linux/platform_device.h>
34 #include <linux/io.h>
35 #include <linux/iopoll.h>
37 #include <asm/byteorder.h>
38 #include <asm/irq.h>
39 #include <linux/unaligned.h>
45 #undef FOTG210_URB_TRACE
46 #define FOTG210_STATS
48 /* magic numbers that can affect system performance */
51 #define FOTG210_TUNE_RL_TT 0
53 #define FOTG210_TUNE_MULT_TT 1
55 /* Some drivers think it's safe to schedule isochronous transfers more than 256
56 * ms into the future (partly as a result of an old bug in the scheduling
57 * code). In an attempt to avoid trouble, we will use a minimum scheduling
58 * length of 512 frames instead of 256.
59 */
62 /* Initial IRQ latency: faster than hw default */
67 /* initial park setting: slower than hw default */
72 /* for link power management(LPM) feature */
77 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
81 #define fotg210_dbg(fotg210, fmt, args...) \
82 dev_dbg(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
83 #define fotg210_err(fotg210, fmt, args...) \
84 dev_err(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
85 #define fotg210_info(fotg210, fmt, args...) \
86 dev_info(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
87 #define fotg210_warn(fotg210, fmt, args...) \
88 dev_warn(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
90 /* check the values in the HCSPARAMS register (host controller _Structural_
91 * parameters) see EHCI spec, Table 2-4 for each value
92 */
94 {
99 }
101 /* check the values in the HCCPARAMS register (host controller _Capability_
102 * parameters) see EHCI Spec, Table 2-5 for each value
103 */
105 {
109 params,
112 }
114 static void __maybe_unused
116 {
128 }
130 static void __maybe_unused
132 {
140 }
142 static void __maybe_unused
144 {
174 }
176 static int __maybe_unused
178 {
191 }
193 static int __maybe_unused
195 {
204 }
209 u32 command)
210 {
223 }
226 u32 status)
227 {
230 /* signaling state */
244 }
249 sig,
259 }
261 /* functions have the "wrong" filename when they're output... */
262 #define dbg_status(fotg210, label, status) { \
263 char _buf[80]; \
264 dbg_status_buf(_buf, sizeof(_buf), label, status); \
266 }
268 #define dbg_cmd(fotg210, label, command) { \
269 char _buf[80]; \
270 dbg_command_buf(_buf, sizeof(_buf), label, command); \
272 }
274 #define dbg_port(fotg210, label, port, status) { \
275 char _buf[80]; \
277 dbg_port_buf(_buf, sizeof(_buf), label, port, status));\
278 }
280 /* troubleshooting help: expose state in debugfs */
295 };
302 };
309 };
320 };
323 {
336 }
337 }
340 {
349 /* tries to advance through hw_alt_next */
351 }
355 {
356 u32 scratch;
357 u32 hw_curr;
368 else
376 /* else alt_next points to some other qtd */
377 }
393 /* hc may be modifying the list as we read it ... */
406 }
425 scratch,
429 }
438 }
441 {
456 /* dumps a snapshot of the async schedule.
457 * usually empty except for long-term bulk reads, or head.
458 * one QH per line, and TDs we know about
459 */
472 }
476 }
478 /* count tds, get ep direction */
481 {
487 /* count tds, get ep direction */
489 temp++;
497 }
498 }
504 }
506 #define DBG_SCHED_LIMIT 64
508 {
516 __hc32 tag;
533 /* dump a snapshot of the periodic schedule.
534 * iso changes, interrupt usually doesn't.
535 */
558 /* uframe masks */
563 /* don't repeat what follows this qh */
572 }
574 }
575 /* show more info the first time around */
601 }
609 }
614 }
615 #undef DBG_SCHED_LIMIT
618 {
628 }
630 }
633 {
658 }
660 /* Capability Registers */
674 /* FIXME interpret both types of params */
685 /* Operational Registers */
714 }
716 #ifdef FOTG210_STATS
728 #endif
730 done:
734 }
736 static struct debug_buffer
738 {
748 }
751 }
754 {
763 }
770 }
772 out:
774 }
778 {
788 }
789 }
795 out:
798 }
801 {
807 }
810 }
812 {
816 }
819 {
829 }
832 {
834 fill_registers_buffer);
837 }
840 {
851 }
854 {
858 }
860 /* handshake - spin reading hc until handshake completes or fails
861 * @ptr: address of hc register to be read
862 * @mask: bits to look at in result of read
863 * @done: value of those bits when handshake succeeds
864 * @usec: timeout in microseconds
865 *
866 * Returns negative errno, or zero on success
867 *
868 * Success happens when the "mask" bits have the specified value (hardware
869 * handshake done). There are two failure modes: "usec" have passed (major
870 * hardware flakeout), or the register reads as all-ones (hardware removed).
871 *
872 * That last failure should_only happen in cases like physical cardbus eject
873 * before driver shutdown. But it also seems to be caused by bugs in cardbus
874 * bridge shutdown: shutting down the bridge before the devices using it.
875 */
878 {
879 u32 result;
889 }
891 /* Force HC to halt state from unknown (EHCI spec section 2.3).
892 * Must be called with interrupts enabled and the lock not held.
893 */
895 {
896 u32 temp;
900 /* disable any irqs left enabled by previous code */
903 /*
904 * This routine gets called during probe before fotg210->command
905 * has been initialized, so we can't rely on its value.
906 */
917 }
919 /* Reset a non-running (STS_HALT == 1) controller.
920 * Must be called with interrupts enabled and the lock not held.
921 */
923 {
927 /* If the EHCI debug controller is active, special care must be
928 * taken before and after a host controller reset
929 */
950 }
952 /* Idle the controller (turn off the schedules).
953 * Must be called with interrupts enabled and the lock not held.
954 */
956 {
957 u32 temp;
962 /* wait for any schedule enables/disables to take effect */
967 /* then disable anything that's still active */
973 /* hardware can take 16 microframes to turn off ... */
976 }
985 /* Set a bit in the USBCMD register */
987 {
991 /* unblock posted write */
993 }
995 /* Clear a bit in the USBCMD register */
997 {
1001 /* unblock posted write */
1003 }
1005 /* EHCI timer support... Now using hrtimers.
1006 *
1007 * Lots of different events are triggered from fotg210->hrtimer. Whenever
1008 * the timer routine runs, it checks each possible event; events that are
1009 * currently enabled and whose expiration time has passed get handled.
1010 * The set of enabled events is stored as a collection of bitflags in
1011 * fotg210->enabled_hrtimer_events, and they are numbered in order of
1012 * increasing delay values (ranging between 1 ms and 100 ms).
1013 *
1014 * Rather than implementing a sorted list or tree of all pending events,
1015 * we keep track only of the lowest-numbered pending event, in
1016 * fotg210->next_hrtimer_event. Whenever fotg210->hrtimer gets restarted, its
1017 * expiration time is set to the timeout value for this event.
1018 *
1019 * As a result, events might not get handled right away; the actual delay
1020 * could be anywhere up to twice the requested delay. This doesn't
1021 * matter, because none of the events are especially time-critical. The
1022 * ones that matter most all have a delay of 1 ms, so they will be
1023 * handled after 2 ms at most, which is okay. In addition to this, we
1024 * allow for an expiration range of 1 ms.
1025 */
1027 /* Delay lengths for the hrtimer event types.
1028 * Keep this list sorted by delay length, in the same order as
1029 * the event types indexed by enum fotg210_hrtimer_event in fotg210.h.
1030 */
1042 };
1044 /* Enable a pending hrtimer event */
1047 {
1054 /* Track only the lowest-numbered pending event */
1059 }
1060 }
1063 /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
1065 {
1068 /* Don't enable anything if the controller isn't running (e.g., died) */
1077 /* Poll again later, but give up after about 20 ms */
1082 }
1085 }
1088 /* The status is up-to-date; restart or stop the schedule as needed */
1096 /* Turn off the schedule after a while */
1098 FOTG210_HRTIMER_DISABLE_ASYNC,
1100 }
1101 }
1102 }
1104 /* Turn off the async schedule after a brief delay */
1106 {
1108 }
1111 /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
1113 {
1116 /* Don't do anything if the controller isn't running (e.g., died) */
1125 /* Poll again later, but give up after about 20 ms */
1130 }
1133 }
1136 /* The status is up-to-date; restart or stop the schedule as needed */
1144 /* Turn off the schedule after a while */
1146 FOTG210_HRTIMER_DISABLE_PERIODIC,
1148 }
1149 }
1150 }
1152 /* Turn off the periodic schedule after a brief delay */
1154 {
1156 }
1159 /* Poll the STS_HALT status bit; see when a dead controller stops */
1161 {
1164 /* Give up after a few milliseconds */
1166 /* Try again later */
1170 }
1172 }
1174 /* Clean up the mess */
1180 /* Not in process context, so don't try to reset the controller */
1181 }
1184 /* Handle unlinked interrupt QHs once they are gone from the hardware */
1186 {
1189 /*
1190 * Process all the QHs on the intr_unlink list that were added
1191 * before the current unlink cycle began. The list is in
1192 * temporal order, so stop when we reach the first entry in the
1193 * current cycle. But if the root hub isn't running then
1194 * process all the QHs on the list.
1195 */
1205 }
1207 /* Handle remaining entries later */
1212 }
1214 }
1217 /* Start another free-iTDs/siTDs cycle */
1219 {
1226 }
1227 }
1229 /* Wait for controller to stop using old iTDs and siTDs */
1231 {
1242 }
1246 }
1249 /* Handle lost (or very late) IAA interrupts */
1251 {
1255 /*
1256 * Lost IAA irqs wedge things badly; seen first with a vt8235.
1257 * So we need this watchdog, but must protect it against both
1258 * (a) SMP races against real IAA firing and retriggering, and
1259 * (b) clean HC shutdown, when IAA watchdog was pending.
1260 */
1264 /* If we get here, IAA is *REALLY* late. It's barely
1265 * conceivable that the system is so busy that CMD_IAAD
1266 * is still legitimately set, so let's be sure it's
1267 * clear before we read STS_IAA. (The HC should clear
1268 * CMD_IAAD when it sets STS_IAA.)
1269 */
1272 /*
1273 * If IAA is set here it either legitimately triggered
1274 * after the watchdog timer expired (_way_ late, so we'll
1275 * still count it as lost) ... or a silicon erratum:
1276 * - VIA seems to set IAA without triggering the IRQ;
1277 * - IAAD potentially cleared without setting IAA.
1278 */
1284 }
1289 }
1290 }
1293 /* Enable the I/O watchdog, if appropriate */
1295 {
1296 /* Not needed if the controller isn't running or it's already enabled */
1302 /*
1303 * Isochronous transfers always need the watchdog.
1304 * For other sorts we use it only if the flag is set.
1305 */
1310 }
1313 /* Handler functions for the hrtimer event types.
1314 * Keep this array in the same order as the event types indexed by
1315 * enum fotg210_hrtimer_event in fotg210.h.
1316 */
1328 };
1331 {
1334 ktime_t now;
1345 /*
1346 * Check each pending event. If its time has expired, handle
1347 * the event; otherwise re-enable it.
1348 */
1353 else
1355 }
1359 }
1361 #define fotg210_bus_suspend NULL
1362 #define fotg210_bus_resume NULL
1366 {
1370 /* if reset finished and it's still not enabled -- handoff */
1372 /* with integrated TT, there's nobody to hand it to! */
1375 else
1380 }
1383 /* build "status change" packet (one or two bytes) from HC registers */
1386 {
1389 u32 mask;
1393 /* init status to no-changes */
1396 /* Inform the core about resumes-in-progress by returning
1397 * a non-zero value even if there are no status changes.
1398 */
1402 /* PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND */
1404 /* no hub change reports (bit 0) for now (power, ...) */
1406 /* port N changes (bit N)? */
1411 /*
1412 * Return status information even for ports with OWNER set.
1413 * Otherwise hub_wq wouldn't see the disconnect event when a
1414 * high-speed device is switched over to the companion
1415 * controller by the user.
1416 */
1423 }
1424 /* FIXME autosuspend idle root hubs */
1427 }
1431 {
1433 u16 temp;
1443 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
1450 }
1454 {
1463 /*
1464 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
1465 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
1466 * (track current state ourselves) ... blink for diagnostics,
1467 * power, "this is the one", etc. EHCI spec supports this.
1468 */
1476 /* no hub-wide feature/status flags */
1480 }
1485 wIndex--;
1489 /*
1490 * Even if OWNER is set, so the port is owned by the
1491 * companion controller, hub_wq needs to be able to clear
1492 * the port-change status bits (especially
1493 * USB_PORT_STAT_C_CONNECTION).
1494 */
1511 /* resume signaling for 20 msec */
1527 /* GetPortStatus clears reset */
1531 }
1536 buf);
1539 /* no hub-wide feature/status flags */
1541 /*cpu_to_le32s ((u32 *) buf); */
1546 wIndex--;
1550 /* wPortChange bits */
1560 /* whoever resumes must GetPortStatus to complete it!! */
1563 /* Remote Wakeup received? */
1565 /* resume signaling for 20 msec */
1568 /* check the port again */
1571 }
1573 /* resume completed? */
1580 /* stop resume signaling */
1584 status_reg);
1593 }
1595 }
1596 }
1598 /* whoever resets must GetPortStatus to complete it!! */
1605 /* force reset to complete */
1608 status_reg);
1609 /* REVISIT: some hardware needs 550+ usec to clear
1610 * this bit; seems too long to spin routinely...
1611 */
1618 }
1620 /* see what we found out */
1624 /* restart schedule */
1627 }
1632 }
1634 /* transfer dedicated ports to the companion hc */
1642 }
1644 /*
1645 * Even if OWNER is set, there's no harm letting hub_wq
1646 * see the wPortStatus values (they should all be 0 except
1647 * for PORT_POWER anyway).
1648 */
1653 }
1657 /* maybe the port was unsuspended without our knowledge */
1666 }
1684 /* no hub-wide feature/status flags */
1688 }
1696 wIndex--;
1705 /* After above check the port must be connected.
1706 * Set appropriate bit thus could put phy into low power
1707 * mode if we have hostpc feature
1708 */
1710 status_reg);
1716 /* line status bits may report this as low speed,
1717 * which can be fine if this root hub has a
1718 * transaction translator built in.
1719 */
1724 /*
1725 * caller must wait, then call GetPortStatus
1726 * usb 2.0 spec says 50 ms resets on root
1727 */
1733 /* For downstream facing ports (these): one hub port is put
1734 * into test mode according to USB2 11.24.2.13, then the hub
1735 * must be reset (which for root hub now means rmmod+modprobe,
1736 * or else system reboot). See EHCI 2.3.9 and 4.14 for info
1737 * about the EHCI-specific stuff.
1738 */
1746 /* Put all enabled ports into suspend */
1751 status_reg);
1764 }
1769 error:
1770 /* "stall" on error */
1772 }
1775 }
1779 {
1781 }
1785 {
1787 }
1789 /* There's basically three types of memory:
1790 * - data used only by the HCD ... kmalloc is fine
1791 * - async and periodic schedules, shared by HC and HCD ... these
1792 * need to use dma_pool or dma_alloc_coherent
1793 * - driver buffers, read/written by HC ... single shot DMA mapped
1794 *
1795 * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
1796 * No memory seen by this driver is pageable.
1797 */
1799 /* Allocate the key transfer structures from the previously allocated pool */
1802 {
1809 }
1812 gfp_t flags)
1813 {
1815 dma_addr_t dma;
1822 }
1826 {
1828 }
1832 {
1833 /* clean qtds first, and know this is not linked */
1837 }
1842 }
1845 gfp_t flags)
1846 {
1848 dma_addr_t dma;
1860 /* dummy td enables safe urb queuing */
1865 }
1866 done:
1868 fail1:
1870 fail:
1873 }
1875 /* The queue heads and transfer descriptors are managed from pools tied
1876 * to each of the "per device" structures.
1877 * This is the initialisation and cleanup code.
1878 */
1881 {
1890 /* DMA consistent memory and pools */
1906 /* shadow periodic table */
1909 }
1911 /* remember to add cleanup code (above) if you add anything here */
1913 {
1916 /* QTDs for control/bulk/intr transfers */
1925 /* QHs for control/bulk/intr transfers */
1938 /* ITD for high speed ISO transfers */
1947 /* Hardware periodic table */
1958 /* software shadow of hardware table */
1960 flags);
1964 fail:
1968 }
1969 /* EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
1970 *
1971 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
1972 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
1973 * buffers needed for the larger number). We use one QH per endpoint, queue
1974 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
1975 *
1976 * ISO traffic uses "ISO TD" (itd) records, and (along with
1977 * interrupts) needs careful scheduling. Performance improvements can be
1978 * an ongoing challenge. That's in "ehci-sched.c".
1979 *
1980 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
1981 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
1982 * (b) special fields in qh entries or (c) split iso entries. TTs will
1983 * buffer low/full speed data so the host collects it at high speed.
1984 */
1986 /* fill a qtd, returning how much of the buffer we were able to queue up */
1989 {
1993 /* one buffer entry per 4K ... first might be short or unaligned */
2003 /* per-qtd limit: from 16K to 20K (best alignment) */
2012 else
2014 }
2016 /* short packets may only terminate transfers */
2019 }
2024 }
2028 {
2031 /* writes to an active overlay are unsafe */
2037 /* Except for control endpoints, we make hardware maintain data
2038 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
2039 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
2040 * ever clear it.
2041 */
2050 }
2051 }
2054 }
2056 /* if it weren't for a common silicon quirk (writing the dummy into the qh
2057 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
2058 * recovery (including urb dequeue) would need software changes to a QH...
2059 */
2061 {
2069 /*
2070 * first qtd may already be partially processed.
2071 * If we come here during unlink, the QH overlay region
2072 * might have reference to the just unlinked qtd. The
2073 * qtd is updated in qh_completions(). Update the QH
2074 * overlay here.
2075 */
2079 }
2080 }
2084 }
2090 {
2101 }
2105 {
2107 /* If an async split transaction gets an error or is unlinked,
2108 * the TT buffer may be left in an indeterminate state. We
2109 * have to clear the TT buffer.
2110 *
2111 * Note: this routine is never called for Isochronous transfers.
2112 */
2125 }
2126 }
2127 }
2131 {
2134 /* count IN/OUT bytes, not SETUP (even short packets) */
2138 /* don't modify error codes */
2142 /* force cleanup after short read; not always an error */
2146 /* serious "can't proceed" faults reported by the hardware */
2149 /* FIXME "must" disable babbling device's port too */
2151 /* CERR nonzero + halt --> stall */
2155 /* In theory, more than one of the following bits can be set
2156 * since they are sticky and the transaction is retried.
2157 * Which to test first is rather arbitrary.
2158 */
2160 /* fs/ls interrupt xfer missed the complete-split */
2167 /* timeout, bad CRC, wrong PID, etc */
2175 }
2183 }
2186 }
2192 {
2196 /* S-mask in a QH means it's an interrupt urb */
2199 /* ... update hc-wide periodic stats (for usbfs) */
2201 }
2202 }
2207 /* report non-error and short read status as zero */
2211 }
2213 #ifdef FOTG210_URB_TRACE
2219 status,
2221 #endif
2223 /* complete() can reenter this HCD */
2228 }
2232 /* Process and free completed qtds for a qh, returning URBs to drivers.
2233 * Chases up to qh->hw_current. Returns number of completions called,
2234 * indicating how much "real" work we did.
2235 */
2238 {
2244 u8 state;
2250 /* completions (or tasks on other cpus) must never clobber HALT
2251 * till we've gone through and cleaned everything up, even when
2252 * they add urbs to this qh's queue or mark them for unlinking.
2253 *
2254 * NOTE: unlinking expects to be done in queue order.
2255 *
2256 * It's a bug for qh->qh_state to be anything other than
2257 * QH_STATE_IDLE, unless our caller is scan_async() or
2258 * scan_intr().
2259 */
2264 rescan:
2269 /* remove de-activated QTDs from front of queue.
2270 * after faults (including short reads), cleanup this urb
2271 * then let the queue advance.
2272 * if queue is stopped, handles unlinks.
2273 */
2280 /* clean up any state from previous QTD ...*/
2284 last_status);
2285 count++;
2287 }
2290 }
2292 /* ignore urbs submitted during completions we reported */
2296 /* hardware copies qtd out of qh overlay */
2300 /* always clean up qtds the hc de-activated */
2301 retry_xacterr:
2304 /* Report Data Buffer Error: non-fatal but useful */
2313 /* on STALL, error, and short reads this urb must
2314 * complete and all its qtds must be recycled.
2315 */
2318 /* retry transaction errors until we
2319 * reach the software xacterr limit
2320 */
2331 /* reset the token in the qtd and the
2332 * qh overlay (which still contains
2333 * the qtd) so that we pick up from
2334 * where we left off
2335 */
2340 token);
2343 token);
2345 }
2348 /* magic dummy for some short reads; qh won't advance.
2349 * that silicon quirk can kick in with this dummy too.
2350 *
2351 * other short reads won't stop the queue, including
2352 * control transfers (status stage handles that) or
2353 * most other single-qtd reads ... the queue stops if
2354 * URB_SHORT_NOT_OK was set so the driver submitting
2355 * the urbs could clean it up.
2356 */
2361 }
2363 /* stop scanning when we reach qtds the hc is using */
2368 /* scan the whole queue for unlinks whenever it stops */
2372 /* cancel everything if we halt, suspend, etc */
2376 /* this qtd is active; skip it unless a previous qtd
2377 * for its urb faulted, or its urb was canceled.
2378 */
2382 /* qh unlinked; token in overlay may be most current */
2388 /* An unlink may leave an incomplete
2389 * async transaction in the TT buffer.
2390 * We have to clear it.
2391 */
2393 token);
2394 }
2395 }
2397 /* unless we already know the urb's status, collect qtd status
2398 * and update count of bytes transferred. in common short read
2399 * cases with only one data qtd (including control transfers),
2400 * queue processing won't halt. but with two or more qtds (for
2401 * example, with a 32 KB transfer), when the first qtd gets a
2402 * short read the second must be removed by hand.
2403 */
2412 /* As part of low/full-speed endpoint-halt processing
2413 * we must clear the TT buffer (11.17.5).
2414 */
2417 /* The TT's in some hubs malfunction when they
2418 * receive this request following a STALL (they
2419 * stop sending isochronous packets). Since a
2420 * STALL can't leave the TT buffer in a busy
2421 * state (if you believe Figures 11-48 - 11-51
2422 * in the USB 2.0 spec), we won't clear the TT
2423 * buffer in this case. Strictly speaking this
2424 * is a violation of the spec.
2425 */
2429 }
2430 }
2432 /* if we're removing something not at the queue head,
2433 * patch the hardware queue pointer.
2434 */
2439 }
2441 /* remove qtd; it's recycled after possible urb completion */
2445 /* reinit the xacterr counter for the next qtd */
2447 }
2449 /* last urb's completion might still need calling */
2452 count++;
2454 }
2456 /* Do we need to rescan for URBs dequeued during a giveback? */
2458 /* If the QH is already unlinked, do the rescan now. */
2462 /* Otherwise we have to wait until the QH is fully unlinked.
2463 * Our caller will start an unlink if qh->needs_rescan is
2464 * set. But if an unlink has already started, nothing needs
2465 * to be done.
2466 */
2469 }
2471 /* restore original state; caller must unlink or relink */
2474 /* be sure the hardware's done with the qh before refreshing
2475 * it after fault cleanup, or recovering from silicon wrongly
2476 * overlaying the dummy qtd (which reduces DMA chatter).
2477 */
2484 /* We won't refresh a QH that's linked (after the HC
2485 * stopped the queue). That avoids a race:
2486 * - HC reads first part of QH;
2487 * - CPU updates that first part and the token;
2488 * - HC reads rest of that QH, including token
2489 * Result: HC gets an inconsistent image, and then
2490 * DMAs to/from the wrong memory (corrupting it).
2491 *
2492 * That should be rare for interrupt transfers,
2493 * except maybe high bandwidth ...
2494 */
2496 /* Tell the caller to start an unlink */
2499 /* otherwise, unlink already started */
2500 }
2501 }
2504 }
2506 /* reverse of qh_urb_transaction: free a list of TDs.
2507 * used for cleanup after errors, before HC sees an URB's TDs.
2508 */
2511 {
2517 }
2518 }
2520 /* create a list of filled qtds for this URB; won't link into qh.
2521 */
2524 {
2526 dma_addr_t buf;
2529 u32 token;
2533 /*
2534 * URBs map to sequences of QTDs: one logical transaction
2535 */
2544 /* for split transactions, SplitXState initialized to zero */
2549 /* SETUP pid */
2554 /* ... and always at least one more pid */
2564 /* for zero length DATA stages, STATUS is always IN */
2567 }
2569 /*
2570 * data transfer stage: buffer setup
2571 */
2577 /* urb->transfer_buffer_length may be smaller than the
2578 * size of the scatterlist (or vice versa)
2579 */
2585 }
2589 /* else it's already initted to "out" pid (0 << 8) */
2593 /*
2594 * buffer gets wrapped in one or more qtds;
2595 * last one may be "short" (including zero len)
2596 * and may serve as a control status ack
2597 */
2602 maxpacket);
2607 /*
2608 * short reads advance to a "magic" dummy instead of the next
2609 * qtd ... that forces the queue to stop, for manual cleanup.
2610 * (this will usually be overridden later.)
2611 */
2615 /* qh makes control packets use qtd toggle; maybe switch it */
2625 }
2634 }
2636 /*
2637 * unless the caller requires manual cleanup after short reads,
2638 * have the alt_next mechanism keep the queue running after the
2639 * last data qtd (the only one, for control and most other cases).
2640 */
2645 /*
2646 * control requests may need a terminating data "status" ack;
2647 * other OUT ones may need a terminating short packet
2648 * (zero length).
2649 */
2661 }
2671 /* never any data in such packets */
2673 }
2674 }
2676 /* by default, enable interrupt on urb completion */
2681 cleanup:
2684 }
2686 /* Would be best to create all qh's from config descriptors,
2687 * when each interface/altsetting is established. Unlink
2688 * any previous qh and cancel its urbs first; endpoints are
2689 * implicitly reset then (data toggle too).
2690 * That'd mean updating how usbcore talks to HCDs. (2.7?)
2691 */
2694 /* Each QH holds a qtd list; a QH is used for everything except iso.
2695 *
2696 * For interrupt urbs, the scheduler must set the microframe scheduling
2697 * mask(s) each time the QH gets scheduled. For highspeed, that's
2698 * just one microframe in the s-mask. For split interrupt transactions
2699 * there are additional complications: c-mask, maybe FSTNs.
2700 */
2702 gfp_t flags)
2703 {
2716 /*
2717 * init endpoint/device data for this QH
2718 */
2728 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
2729 * acts like up to 3KB, but is built from smaller packets.
2730 */
2734 }
2736 /* Compute interrupt scheduling parameters just once, and save.
2737 * - allowing for high bandwidth, how many nsec/uframe are used?
2738 * - split transactions need a second CSPLIT uframe; same question
2739 * - splits also need a schedule gap (for full/low speed I/O)
2740 * - qh has a polling interval
2741 *
2742 * For control/bulk requests, the HC or TT handles these.
2743 */
2755 /* NOTE interval 2 or 4 uframes could work.
2756 * But interval 1 scheduling is simpler, and
2757 * includes high bandwidth.
2758 */
2763 }
2767 /* gap is f(FS/LS transfer times) */
2771 /* FIXME this just approximates SPLIT/CSPLIT times */
2778 }
2788 }
2789 }
2790 }
2792 /* support for tt scheduling, and access to toggles */
2795 /* using TT? */
2799 fallthrough;
2802 /* EPS 0 means "full" */
2808 }
2813 /* Some Freescale processors have an erratum in which the
2814 * port number in the queue head was 0..N-1 instead of 1..N.
2815 */
2818 else
2821 /* set the address of the TT; for TDI's integrated
2822 * root hub tt, leave it zeroed.
2823 */
2827 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
2840 /* The USB spec says that high speed bulk endpoints
2841 * always use 512 byte maxpacket. But some device
2842 * vendors decided to ignore that, and MSFT is happy
2843 * to help them do so. So now people expect to use
2844 * such nonconformant devices with Linux too; sigh.
2845 */
2851 }
2856 done:
2859 }
2861 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
2863 /* init as live, toggle clear, advance to dummy */
2872 }
2875 {
2879 /* Stop waiting to turn off the async schedule */
2882 /* Don't start the schedule until ASS is 0 */
2885 }
2888 {
2892 /* The async schedule and async_unlink list are supposed to be empty */
2895 /* Don't turn off the schedule until ASS is 1 */
2897 }
2899 /* move qh (and its qtds) onto async queue; maybe enable queue. */
2902 {
2906 /* Don't link a QH if there's a Clear-TT-Buffer pending */
2912 /* clear halt and/or toggle; and maybe recover from silicon quirk */
2915 /* splice right after start */
2926 /* qtd completions reported later by interrupt */
2929 }
2931 /* For control/bulk/interrupt, return QH with these TDs appended.
2932 * Allocates and initializes the QH if necessary.
2933 * Returns null if it can't allocate a QH it needs to.
2934 * If the QH has TDs (urbs) already, that's great.
2935 */
2939 {
2945 /* can't sleep here, we have fotg210->lock... */
2948 }
2954 else
2956 qtd_list);
2958 /* control qh may need patching ... */
2960 /* usb_reset_device() briefly reverts to address 0 */
2963 }
2965 /* just one way to queue requests: swap with the dummy qtd.
2966 * only hc or qh_refresh() ever modify the overlay.
2967 */
2970 dma_addr_t dma;
2971 __hc32 token;
2973 /* to avoid racing the HC, use the dummy td instead of
2974 * the first td of our list (becomes new dummy). both
2975 * tds stay deactivated until we're done, when the
2976 * HC is allowed to fetch the old dummy (4.10.2).
2977 */
2994 /* hc must see the new dummy at list end */
3000 /* let the hc process these next qtds */
3005 }
3006 }
3008 }
3012 {
3020 #ifdef FOTG210_URB_TRACE
3021 {
3032 }
3033 #endif
3039 }
3049 }
3051 /* Control/bulk operations through TTs don't need scheduling,
3052 * the HC and TT handle it when the TT has a buffer ready.
3053 */
3056 done:
3061 }
3065 {
3068 /* Add to the end of the list of QHs waiting for the next IAAD */
3072 else
3076 /* Unlink it from the schedule */
3085 }
3088 {
3089 /*
3090 * Do nothing if an IAA cycle is already running or
3091 * if one will be started shortly.
3092 */
3096 /* Do all the waiting QHs at once */
3100 /* If the controller isn't running, we don't have to wait for it */
3105 /* Otherwise start a new IAA cycle */
3107 /* Make sure the unlinks are all visible to the hardware */
3115 }
3116 }
3118 /* the async qh for the qtds being unlinked are now gone from the HC */
3121 {
3124 /* Process the idle QHs */
3125 restart:
3140 }
3143 /* Start a new IAA cycle if any QHs are waiting for it */
3148 }
3149 }
3152 {
3157 /* Unlink all the async QHs that have been empty for a timer cycle */
3168 else
3170 }
3171 }
3173 /* Start a new IAA cycle if any QHs are waiting for it */
3177 /* QHs that haven't been empty for long enough will be handled later */
3182 }
3183 }
3185 /* makes sure the async qh will become idle */
3186 /* caller must own fotg210->lock */
3190 {
3191 /*
3192 * If the QH isn't linked then there's nothing we can do
3193 * unless we were called during a giveback, in which case
3194 * qh_completions() has to deal with it.
3195 */
3200 }
3204 }
3207 {
3215 rescan:
3216 /* clean any finished work for this qh */
3220 /*
3221 * Unlinks could happen here; completion reporting
3222 * drops the lock. That's why fotg210->qh_scan_next
3223 * always holds the next qh to scan; if the next qh
3224 * gets unlinked then fotg210->qh_scan_next is adjusted
3225 * in single_unlink_async().
3226 */
3236 }
3237 }
3239 /*
3240 * Unlink empty entries, reducing DMA usage as well
3241 * as HCD schedule-scanning costs. Delay for any qh
3242 * we just scanned, there's a not-unusual case that it
3243 * doesn't stay idle for long.
3244 */
3251 }
3252 }
3253 /* EHCI scheduled transaction support: interrupt, iso, split iso
3254 * These are called "periodic" transactions in the EHCI spec.
3255 *
3256 * Note that for interrupt transfers, the QH/QTD manipulation is shared
3257 * with the "asynchronous" transaction support (control/bulk transfers).
3258 * The only real difference is in how interrupt transfers are scheduled.
3259 *
3260 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
3261 * It keeps track of every ITD (or SITD) that's linked, and holds enough
3262 * pre-calculated schedule data to make appending to the queue be quick.
3263 */
3266 /* periodic_next_shadow - return "next" pointer on shadow list
3267 * @periodic: host pointer to qh/itd
3268 * @tag: hardware tag for type of this record
3269 */
3272 {
3280 }
3281 }
3285 {
3287 /* our fotg210_shadow.qh is actually software part */
3290 /* others are hw parts */
3293 }
3294 }
3296 /* caller must hold fotg210->lock */
3299 {
3304 /* find predecessor of "ptr"; hw and shadow lists are in sync */
3311 }
3312 /* an interrupt entry (at list end) could have been shared */
3316 /* update shadow and hardware lists ... the old "next" pointers
3317 * from ptr may still be in use, the caller updates them.
3318 */
3324 }
3326 /* how many of the uframe's 125 usecs are allocated? */
3329 {
3339 /* is it in the S-mask? */
3342 /* ... or C-mask? */
3349 /* case Q_TYPE_FSTN: */
3351 /* for "save place" FSTNs, count the relevant INTR
3352 * bandwidth from the previous frame
3353 */
3366 }
3367 }
3372 }
3375 {
3382 else
3384 }
3386 /* return true iff the device's transaction translator is available
3387 * for a periodic transfer starting at the specified frame, using
3388 * all the uframes in the mask.
3389 */
3392 {
3396 /* note bandwidth wastage: split never follows csplit
3397 * (different dev or endpoint) until the next uframe.
3398 * calling convention doesn't make that distinction.
3399 */
3402 __hc32 type;
3416 u32 mask;
3420 /* "knows" no gap is needed */
3424 }
3428 /* case Q_TYPE_FSTN: */
3433 }
3435 /* collision or error */
3437 }
3438 }
3440 /* no collision */
3442 }
3445 {
3449 /* Stop waiting to turn off the periodic schedule */
3453 /* Don't start the schedule until PSS is 0 */
3456 }
3459 {
3463 /* Don't turn off the schedule until PSS is 1 */
3465 }
3467 /* periodic schedule slots have iso tds (normal or split) first, then a
3468 * sparse tree for active interrupt transfers.
3469 *
3470 * this just links in a qh; caller guarantees uframe masks are set right.
3471 * no FSTN support (yet; fotg210 0.96+)
3472 */
3474 {
3484 /* high bandwidth, or otherwise every microframe */
3494 /* skip the iso nodes at list head */
3502 }
3504 /* sorting each branch by period (slow-->fast)
3505 * enables sharing interior tree nodes
3506 */
3513 }
3514 /* link in this qh, unless some earlier pass did that */
3522 }
3523 }
3527 /* update per-qh bandwidth for usbfs */
3534 /* maybe enable periodic schedule processing */
3537 }
3541 {
3545 /*
3546 * If qh is for a low/full-speed device, simply unlinking it
3547 * could interfere with an ongoing split transaction. To unlink
3548 * it safely would require setting the QH_INACTIVATE bit and
3549 * waiting at least one frame, as described in EHCI 4.12.2.5.
3550 *
3551 * We won't bother with any of this. Instead, we assume that the
3552 * only reason for unlinking an interrupt QH while the current URB
3553 * is still active is to dequeue all the URBs (flush the whole
3554 * endpoint queue).
3555 *
3556 * If rebalancing the periodic schedule is ever implemented, this
3557 * approach will no longer be valid.
3558 */
3560 /* high bandwidth, or otherwise part of every microframe */
3568 /* update per-qh bandwidth for usbfs */
3579 /* qh->qh_next still "live" to HC */
3587 }
3591 {
3592 /* If the QH isn't linked then there's nothing we can do
3593 * unless we were called during a giveback, in which case
3594 * qh_completions() has to deal with it.
3595 */
3600 }
3604 /* Make sure the unlinks are visible before starting the timer */
3607 /*
3608 * The EHCI spec doesn't say how long it takes the controller to
3609 * stop accessing an unlinked interrupt QH. The timer delay is
3610 * 9 uframes; presumably that will be long enough.
3611 */
3614 /* New entries go at the end of the intr_unlink list */
3617 else
3629 }
3630 }
3633 {
3642 /* reschedule QH iff another request is queued */
3647 /* An error here likely indicates handshake failure
3648 * or no space left in the schedule. Neither fault
3649 * should happen often ...
3650 *
3651 * FIXME kill the now-dysfunctional queued urbs
3652 */
3656 }
3658 /* maybe turn off periodic schedule */
3661 }
3665 {
3668 /* complete split running into next frame?
3669 * given FSTN support, we could sometimes check...
3670 */
3674 /* convert "usecs we need" to "max already claimed" */
3677 /* we "know" 2 and 4 uframe intervals were rejected; so
3678 * for period 0, check _every_ microframe in the schedule.
3679 */
3684 uframe);
3687 }
3690 /* just check the specified uframe, at that period */
3697 }
3699 /* success! */
3701 }
3705 {
3718 }
3720 /* Make sure this tt's buffer is also available for CSPLITs.
3721 * We pessimize a bit; probably the typical full speed case
3722 * doesn't need the second CSPLIT.
3723 *
3724 * NOTE: both SPLIT and CSPLIT could be checked in just
3725 * one smart pass...
3726 */
3739 }
3740 done:
3742 }
3744 /* "first fit" scheduling policy used the first time through,
3745 * or when the previous schedule slot can't be re-used.
3746 */
3748 {
3751 __hc32 c_mask;
3759 /* reuse the previous schedule slots, if we can */
3768 }
3770 /* else scan the schedule to find a group of slots such that all
3771 * uframes have enough periodic bandwidth available.
3772 */
3774 /* "normal" case, uframing flexible except with splits */
3786 }
3787 }
3789 /* qh->period == 0 means every uframe */
3794 }
3799 /* reset S-frame and (maybe) C-frame masks */
3808 /* stuff into the periodic schedule */
3810 done:
3812 }
3816 {
3823 /* get endpoint and transfer/schedule data */
3831 }
3836 /* get qh and force any scheduling errors */
3842 }
3847 }
3849 /* then queue the urb's tds to the qh */
3853 /* ... update usbfs periodic stats */
3856 done:
3859 done_not_linked:
3865 }
3868 {
3873 rescan:
3874 /* clean any finished work for this qh */
3878 /*
3879 * Unlinks could happen here; completion reporting
3880 * drops the lock. That's why fotg210->qh_scan_next
3881 * always holds the next qh to scan; if the next qh
3882 * gets unlinked then fotg210->qh_scan_next is adjusted
3883 * in qh_unlink_periodic().
3884 */
3892 }
3893 }
3894 }
3896 /* fotg210_iso_stream ops work with both ITD and SITD */
3899 {
3907 }
3909 }
3914 {
3915 u32 buf1;
3922 /*
3923 * this might be a "high bandwidth" highspeed endpoint,
3924 * as encoded in the ep descriptor's wMaxPacket field
3925 */
3932 else
3943 /* usbfs wants to report the average usecs per frame tied up
3944 * when transfers on this endpoint are scheduled ...
3945 */
3954 }
3963 }
3967 {
3976 else
3989 }
3991 /* if dev->ep[epnum] is a QH, hw is set */
3997 }
4001 }
4003 /* fotg210_iso_sched ops can be ITD-only or SITD-only */
4006 gfp_t mem_flags)
4007 {
4015 }
4020 {
4024 /* how many uframes are needed for these transfers */
4027 /* figure out per-uframe itd fields that we'll need later
4028 * when we fit new itds into the schedule.
4029 */
4033 dma_addr_t buf;
4034 u32 trans;
4047 /* might need to cross a buffer page within a uframe */
4052 }
4053 }
4057 {
4060 /* caller must hold fotg210->lock!*/
4063 }
4067 {
4069 dma_addr_t itd_dma;
4083 else
4086 /* allocate/init ITDs */
4090 /*
4091 * Use iTDs from the free list, but not iTDs that may
4092 * still be in use by the hardware.
4093 */
4102 alloc_itd:
4111 }
4112 }
4117 }
4120 /* temporarily store schedule info in hcpriv */
4124 }
4128 {
4131 /* can't commit more than uframe_periodic_max usec */
4136 /* we know urb->interval is 2^N uframes */
4140 }
4142 /* This scheduler plans almost as far into the future as it has actual
4143 * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
4144 * "as small as possible" to be cache-friendlier.) That limits the size
4145 * transfers you can stream reliably; avoid more than 64 msec per urb.
4146 * Also avoid queue depths of less than fotg210's worst irq latency (affected
4147 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
4148 * and other factors); or more than about 230 msec total (for portability,
4149 * given FOTG210_TUNE_FLS and the slop). Or, write a smarter scheduler!
4150 */
4156 {
4169 }
4173 /* Typical case: reuse current schedule, stream is still active.
4174 * Hopefully there are no gaps from the host falling behind
4175 * (irq delays etc), but if there are we'll take the next
4176 * slot in the schedule, implicitly assuming URB_ISO_ASAP.
4177 */
4179 u32 excess;
4181 /* For high speed devices, allow scheduling within the
4182 * isochronous scheduling threshold. For full speed devices
4183 * and Intel PCI-based controllers, don't (work around for
4184 * Intel ICH9 bug).
4185 */
4188 else
4191 /* Fell behind (by up to twice the slop amount)?
4192 * We decide based on the time of the last currently-scheduled
4193 * slot, not the time of the next available slot.
4194 */
4199 else
4204 mod);
4207 }
4208 }
4210 /* need to schedule; when's the next (u)frame we could start?
4211 * this is bigger than fotg210->i_thresh allows; scheduling itself
4212 * isn't free, the slop should handle reasonably slow cpus. it
4213 * can also help high bandwidth if the dma and irq loads don't
4214 * jump until after the queue is primed.
4215 */
4221 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
4223 /* find a uframe slot with enough bandwidth.
4224 * Early uframes are more precious because full-speed
4225 * iso IN transfers can't use late uframes,
4226 * and therefore they should be allocated last.
4227 */
4231 start--;
4232 /* check schedule: enough space? */
4238 /* no room in the schedule */
4244 }
4245 }
4247 /* Tried to schedule too far into the future? */
4255 }
4259 /* report high speed start in uframes; full speed, in frames */
4264 /* Make sure scan_isoc() sees these */
4269 fail:
4273 }
4277 {
4280 /* it's been recently zeroed */
4289 /* All other fields are filled when scheduling */
4290 }
4295 {
4307 /* iso_frame_desc[].offset must be strictly increasing */
4314 }
4315 }
4319 {
4325 /* skip any iso nodes which might belong to previous microframes */
4333 }
4341 }
4343 /* fit urb's itds into the selected schedule slot; activate as needed */
4346 {
4363 }
4365 /* fill iTDs uframe by uframe */
4368 /* ASSERT: we have all necessary itds */
4370 /* ASSERT: no itds for this endpoint in this uframe */
4378 }
4387 packet++;
4389 /* link completed itds into the schedule */
4393 itd);
4395 }
4396 }
4399 /* don't need that schedule data any more */
4405 }
4407 #define ISO_ERRS (FOTG210_ISOC_BUF_ERR | FOTG210_ISOC_BABBLE |\
4408 FOTG210_ISOC_XACTERR)
4410 /* Process and recycle a completed ITD. Return true iff its urb completed,
4411 * and hence its completion callback probably added things to the hardware
4412 * schedule.
4413 *
4414 * Note that we carefully avoid recycling this descriptor until after any
4415 * completion callback runs, so that it won't be reused quickly. That is,
4416 * assuming (a) no more than two urbs per frame on this endpoint, and also
4417 * (b) only this endpoint's completions submit URBs. It seems some silicon
4418 * corrupts things if you reuse completed descriptors very quickly...
4419 */
4421 {
4424 u32 t;
4431 /* for each uframe with a packet */
4441 /* report transfer status */
4453 /* HC need not update length with this error */
4457 }
4463 /* URB was too late */
4465 }
4466 }
4468 /* handle completion now? */
4472 /* ASSERT: it's really the last itd for this urb
4473 * list_for_each_entry (itd, &stream->td_list, itd_list)
4474 * BUG_ON (itd->urb == urb);
4475 */
4477 /* give urb back to the driver; completion often (re)submits */
4493 }
4495 done:
4498 /* Add to the end of the free list for later reuse */
4501 /* Recycle the iTDs when the pipeline is empty (ep no longer in use) */
4506 }
4509 }
4512 gfp_t mem_flags)
4513 {
4518 /* Get iso_stream head */
4523 }
4526 USB_PORT_STAT_HIGH_SPEED)) {
4530 }
4532 #ifdef FOTG210_URB_TRACE
4540 stream);
4541 #endif
4543 /* allocate ITDs w/o locking anything */
4548 }
4550 /* schedule ... need to lock */
4555 }
4562 else
4564 done_not_linked:
4566 done:
4568 }
4572 {
4578 /* scan each element in frame's queue for completions */
4588 /* If this ITD is still active, leave it for
4589 * later processing ... check the next entry.
4590 * No need to check for activity unless the
4591 * frame is current.
4592 */
4599 }
4607 }
4608 }
4610 /* Take finished ITDs out of the schedule
4611 * and process them: recycle, maybe report
4612 * URB completion. HC won't cache the
4613 * pointer for much longer, if at all.
4614 */
4625 fallthrough;
4628 /* End of the iTDs and siTDs */
4631 }
4633 /* assume completion callbacks modify the queue */
4636 }
4638 }
4641 {
4646 /*
4647 * When running, scan from last scan point up to "now"
4648 * else clean up by scanning everything that's left.
4649 * Touches as few pages as possible: cache-friendly.
4650 */
4658 }
4668 /* Stop when we have reached the current frame */
4672 }
4674 }
4676 /* Display / Set uframe_periodic_max
4677 */
4680 {
4685 }
4689 {
4695 ssize_t ret;
4705 uframe_periodic_max);
4707 }
4711 /*
4712 * lock, so that our checking does not race with possible periodic
4713 * bandwidth allocation through submitting new urbs.
4714 */
4717 /*
4718 * for request to decrease max periodic bandwidth, we have to check
4719 * every microframe in the schedule to see whether the decrease is
4720 * possible.
4721 */
4729 uframe));
4733 "cannot decrease uframe_periodic_max because periodic bandwidth is already allocated (%u > %u)\n",
4736 }
4737 }
4739 /* increasing is always ok */
4751 out_unlock:
4754 }
4759 {
4763 }
4766 {
4770 }
4771 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
4772 * The firmware seems to think that powering off is a wakeup event!
4773 * This routine turns off remote wakeup and everything else, on all ports.
4774 */
4776 {
4780 }
4782 /* Halt HC, turn off all ports, and let the BIOS use the companion controllers.
4783 * Must be called with interrupts enabled and the lock not held.
4784 */
4786 {
4793 }
4795 /* fotg210_shutdown kick in for silicon on any bus (not just pci, etc).
4796 * This forcibly disables dma and IRQs, helping kexec and other cases
4797 * where the next system software may expect clean state.
4798 */
4800 {
4812 }
4814 /* fotg210_work is called from some interrupts, timers, and so on.
4815 * it calls driver completion functions, after dropping fotg210->lock.
4816 */
4818 {
4819 /* another CPU may drop fotg210->lock during a schedule scan while
4820 * it reports urb completions. this flag guards against bogus
4821 * attempts at re-entrant schedule scanning.
4822 */
4826 }
4829 rescan:
4841 /* the IO watchdog guards against hardware or driver bugs that
4842 * misplace IRQs, and should let us run completely without IRQs.
4843 * such lossage has been observed on both VT6202 and VT8235.
4844 */
4846 }
4848 /* Called when the fotg210_hcd module is removed.
4849 */
4851 {
4856 /* no more interrupts ... */
4870 /* root hub is shut down separately (first, when possible) */
4876 #ifdef FOTG210_STATS
4882 #endif
4886 }
4888 /* one-time init, only for memory state */
4890 {
4892 u32 temp;
4894 u32 hcc_params;
4899 /*
4900 * keep io watchdog by default, those good HCDs could turn off it later
4901 */
4910 /*
4911 * by default set standard 80% (== 100 usec/uframe) max periodic
4912 * bandwidth as required by USB 2.0
4913 */
4916 /*
4917 * hw default: 1K periodic list heads, one per frame.
4918 * periodic_size can shrink by USBCMD update if hcc_params allows.
4919 */
4925 /* periodic schedule size can be smaller than default */
4938 }
4939 }
4944 /* controllers may cache some of the periodic schedule ... */
4947 /*
4948 * dedicate a qh for the async ring head, since we couldn't unlink
4949 * a 'real' qh without stopping the async schedule [4.8]. use it
4950 * as the 'reclamation list head' too.
4951 * its dummy is used in hw_alt_next of many tds, to prevent the qh
4952 * from automatically advancing to the next td after short reads.
4953 */
4963 /* clear interrupt enables, set irq latency */
4968 /* HW default park == 3, on hardware that supports it (like
4969 * NVidia and ALI silicon), maximizes throughput on the async
4970 * schedule by avoiding QH fetches between transfers.
4971 *
4972 * With fast usb storage devices and NForce2, "park" seems to
4973 * make problems: throughput reduction (!), data errors...
4974 */
4979 }
4981 }
4983 /* periodic schedule size can be smaller than default */
4986 }
4989 /* Accept arbitrarily long scatter-gather lists */
4993 }
4995 /* start HC running; it's halted, hcd_fotg210_init() has been run (once) */
4997 {
4999 u32 temp;
5003 /* EHCI spec section 4.1 */
5010 /*
5011 * hcc_params controls whether fotg210->regs->segment must (!!!)
5012 * be used; it constrains QH/ITD/SITD and QTD locations.
5013 * dma_pool consistent memory always uses segment zero.
5014 * streaming mappings for I/O buffers, like dma_map_single(),
5015 * can return segments above 4GB, if the device allows.
5016 *
5017 * NOTE: the dma mask is visible through dev->dma_mask, so
5018 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
5019 * Scsi_Host.highmem_io, and so forth. It's readonly to all
5020 * host side drivers though.
5021 */
5024 /*
5025 * Philips, Intel, and maybe others need CMD_RUN before the
5026 * root hub will detect new devices (why?); NEC doesn't
5027 */
5033 /*
5034 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
5035 * are explicitly handed to companion controller(s), so no TT is
5036 * involved with the root hub. (Except where one is integrated,
5037 * and there's no companion controller unless maybe for USB OTG.)
5038 *
5039 * Turning on the CF flag will transfer ownership of all ports
5040 * from the companions to the EHCI controller. If any of the
5041 * companions are in the middle of a port reset at the time, it
5042 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
5043 * guarantees that no resets are in progress. After we set CF,
5044 * a short delay lets the hardware catch up; new resets shouldn't
5045 * be started before the port switching actions could complete.
5046 */
5049 /* unblock posted writes */
5065 /* GRR this is run-once init(), being done every time the HC starts.
5066 * So long as they're part of class devices, we can't do it init()
5067 * since the class device isn't created that early.
5068 */
5073 }
5076 {
5086 /* cache this readonly data; minimize chip reads */
5092 /* data structure init */
5104 }
5107 {
5116 /* e.g. cardbus physical eject */
5120 }
5122 /*
5123 * We don't use STS_FLR, but some controllers don't like it to
5124 * remain on, so mask it out along with the other status bits.
5125 */
5128 /* Shared IRQ? */
5133 }
5135 /* clear (just) interrupts */
5140 /* unrequested/ignored: Frame List Rollover */
5143 /* INT, ERR, and IAA interrupt rates can be throttled */
5145 /* normal [4.15.1.2] or error [4.15.1.1] completion */
5149 else
5152 }
5154 /* complete the unlinking of some qh [4.15.2.3] */
5157 /* Turn off the IAA watchdog */
5161 /*
5162 * Mild optimization: Allow another IAAD to reset the
5163 * hrtimer, if one occurs before the next expiration.
5164 * In theory we could always cancel the hrtimer, but
5165 * tests show that about half the time it will be reset
5166 * for some other event anyway.
5167 */
5171 /* guard against (alleged) silicon errata */
5179 }
5181 /* remote wakeup [4.3.1] */
5186 /* kick root hub later */
5189 /* resume root hub? */
5201 /* start 20 msec resume signaling from this port,
5202 * and make hub_wq collect PORT_STAT_C_SUSPEND to
5203 * stop that signaling. Use 5 ms extra for safety,
5204 * like usb_port_resume() does.
5205 */
5210 }
5211 }
5213 /* PCI errors [4.15.2.4] */
5218 dead:
5221 /* Don't let the controller do anything more */
5230 /* Handle completions when the controller stops */
5232 }
5240 }
5242 /* non-error returns are a promise to giveback() the urb later
5243 * we drop ownership so next owner (or urb unlink) can get it
5244 *
5245 * urb + dev is in hcd.self.controller.urb_list
5246 * we're queueing TDs onto software and hardware lists
5247 *
5248 * hcd-specific init for hcpriv hasn't been done yet
5249 *
5250 * NOTE: control, bulk, and interrupt share the same code to append TDs
5251 * to a (possibly active) QH, and the same QH scanning code.
5252 */
5254 gfp_t mem_flags)
5255 {
5263 /* qh_completions() code doesn't handle all the fault cases
5264 * in multi-TD control transfers. Even 1KB is rare anyway.
5265 */
5268 fallthrough;
5269 /* case PIPE_BULK: */
5282 }
5283 }
5285 /* remove from hardware lists
5286 * completions normally happen asynchronously
5287 */
5290 {
5302 /* case PIPE_CONTROL: */
5303 /* case PIPE_BULK:*/
5315 /* already started */
5318 /* QH might be waiting for a Clear-TT-Buffer */
5321 }
5340 }
5344 /* itd... */
5346 /* wait till next completion, do it then. */
5347 /* completion irqs can wait up to 1024 msec, */
5349 }
5350 done:
5353 }
5355 /* bulk qh holds the data toggle */
5359 {
5364 /* ASSERT: any requests/urbs are being unlinked */
5365 /* ASSERT: nobody can be submitting urbs for this any more */
5367 rescan:
5373 /* endpoints can be iso streams. for now, we don't
5374 * accelerate iso completions ... so spin a while.
5375 */
5382 /* BUG_ON(!list_empty(&stream->free_list)); */
5385 }
5396 /* periodic qh self-unlinks on empty, and a COMPLETING qh
5397 * may already be unlinked.
5398 */
5401 fallthrough;
5404 idle_timeout:
5414 }
5415 fallthrough;
5417 /* caller was supposed to have unlinked any requests;
5418 * that's not our job. just leak this memory.
5419 */
5424 }
5425 done:
5428 }
5432 {
5446 /* For Bulk and Interrupt endpoints we maintain the toggle state
5447 * in the hardware; the toggle bits in udev aren't used at all.
5448 * When an endpoint is reset by usb_clear_halt() we must reset
5449 * the toggle bit in the QH.
5450 */
5458 /* The toggle value in the QH can't be updated
5459 * while the QH is active. Unlink it now;
5460 * re-linking will call qh_refresh().
5461 */
5464 else
5466 }
5467 }
5469 }
5472 {
5477 }
5479 /* The EHCI in ChipIdea HDRC cannot be a separate module or device,
5480 * because its registers (and irq) are shared between host/gadget/otg
5481 * functions and in order to facilitate role switching we cannot
5482 * give the fotg210 driver exclusive access to those.
5483 */
5490 /*
5491 * generic hardware linkage
5492 */
5496 /*
5497 * basic lifecycle operations
5498 */
5504 /*
5505 * managing i/o requests and associated device resources
5506 */
5512 /*
5513 * scheduling support
5514 */
5517 /*
5518 * root hub support
5519 */
5529 };
5532 {
5533 u32 value;
5542 }
5544 /*
5545 * fotg210_hcd_probe - initialize faraday FOTG210 HCDs
5546 *
5547 * Allocates basic resources for this USB host controller, and
5548 * then invokes the start() method for the HCD associated with it
5549 * through the hotplug entry's driver_data.
5550 */
5552 {
5573 }
5597 }
5603 failed_put_hcd:
5605 fail_create_hcd:
5607 }
5609 /*
5610 * fotg210_hcd_remove - shutdown processing for EHCI HCDs
5611 * @dev: USB Host Controller being removed
5612 *
5613 */
5615 {
5622 }
5625 {
5632 pr_warn("Warning! fotg210_hcd should always be loaded before uhci_hcd and ohci_hcd, not after\n");
5642 }
5645 {
5648 }