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Merge tag 'trace-printf-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/trace...
[drm/drm-misc.git] / drivers / usb / serial / f81534.c
blob685930ac83833c95f9d9bf63c788dad430100673
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * F81532/F81534 USB to Serial Ports Bridge
4 *
5 * F81532 => 2 Serial Ports
6 * F81534 => 4 Serial Ports
7 *
8 * Copyright (C) 2016 Feature Integration Technology Inc., (Fintek)
9 * Copyright (C) 2016 Tom Tsai (Tom_Tsai@fintek.com.tw)
10 * Copyright (C) 2016 Peter Hong (Peter_Hong@fintek.com.tw)
11 *
12 * The F81532/F81534 had 1 control endpoint for setting, 1 endpoint bulk-out
13 * for all serial port TX and 1 endpoint bulk-in for all serial port read in
14 * (Read Data/MSR/LSR).
15 *
16 * Write URB is fixed with 512bytes, per serial port used 128Bytes.
17 * It can be described by f81534_prepare_write_buffer()
18 *
19 * Read URB is 512Bytes max, per serial port used 128Bytes.
20 * It can be described by f81534_process_read_urb() and maybe received with
21 * 128x1,2,3,4 bytes.
22 *
23 */
24 #include <linux/slab.h>
25 #include <linux/tty.h>
26 #include <linux/tty_flip.h>
27 #include <linux/usb.h>
28 #include <linux/usb/serial.h>
29 #include <linux/serial_reg.h>
30 #include <linux/module.h>
31 #include <linux/uaccess.h>
32
33 /* Serial Port register Address */
34 #define F81534_UART_BASE_ADDRESS 0x1200
35 #define F81534_UART_OFFSET 0x10
36 #define F81534_DIVISOR_LSB_REG (0x00 + F81534_UART_BASE_ADDRESS)
37 #define F81534_DIVISOR_MSB_REG (0x01 + F81534_UART_BASE_ADDRESS)
38 #define F81534_INTERRUPT_ENABLE_REG (0x01 + F81534_UART_BASE_ADDRESS)
39 #define F81534_FIFO_CONTROL_REG (0x02 + F81534_UART_BASE_ADDRESS)
40 #define F81534_LINE_CONTROL_REG (0x03 + F81534_UART_BASE_ADDRESS)
41 #define F81534_MODEM_CONTROL_REG (0x04 + F81534_UART_BASE_ADDRESS)
42 #define F81534_LINE_STATUS_REG (0x05 + F81534_UART_BASE_ADDRESS)
43 #define F81534_MODEM_STATUS_REG (0x06 + F81534_UART_BASE_ADDRESS)
44 #define F81534_CLOCK_REG (0x08 + F81534_UART_BASE_ADDRESS)
45 #define F81534_CONFIG1_REG (0x09 + F81534_UART_BASE_ADDRESS)
46
47 #define F81534_DEF_CONF_ADDRESS_START 0x3000
48 #define F81534_DEF_CONF_SIZE 12
49
50 #define F81534_CUSTOM_ADDRESS_START 0x2f00
51 #define F81534_CUSTOM_DATA_SIZE 0x10
52 #define F81534_CUSTOM_NO_CUSTOM_DATA 0xff
53 #define F81534_CUSTOM_VALID_TOKEN 0xf0
54 #define F81534_CONF_OFFSET 1
55 #define F81534_CONF_INIT_GPIO_OFFSET 4
56 #define F81534_CONF_WORK_GPIO_OFFSET 8
57 #define F81534_CONF_GPIO_SHUTDOWN 7
58 #define F81534_CONF_GPIO_RS232 1
59
60 #define F81534_MAX_DATA_BLOCK 64
61 #define F81534_MAX_BUS_RETRY 20
62
63 /* Default URB timeout for USB operations */
64 #define F81534_USB_MAX_RETRY 10
65 #define F81534_USB_TIMEOUT 2000
66 #define F81534_SET_GET_REGISTER 0xA0
67
68 #define F81534_NUM_PORT 4
69 #define F81534_UNUSED_PORT 0xff
70 #define F81534_WRITE_BUFFER_SIZE 512
71
72 #define DRIVER_DESC "Fintek F81532/F81534"
73 #define FINTEK_VENDOR_ID_1 0x1934
74 #define FINTEK_VENDOR_ID_2 0x2C42
75 #define FINTEK_DEVICE_ID 0x1202
76 #define F81534_MAX_TX_SIZE 124
77 #define F81534_MAX_RX_SIZE 124
78 #define F81534_RECEIVE_BLOCK_SIZE 128
79 #define F81534_MAX_RECEIVE_BLOCK_SIZE 512
80
81 #define F81534_TOKEN_RECEIVE 0x01
82 #define F81534_TOKEN_WRITE 0x02
83 #define F81534_TOKEN_TX_EMPTY 0x03
84 #define F81534_TOKEN_MSR_CHANGE 0x04
85
86 /*
87 * We used interal SPI bus to access FLASH section. We must wait the SPI bus to
88 * idle if we performed any command.
89 *
90 * SPI Bus status register: F81534_BUS_REG_STATUS
91 * Bit 0/1 : BUSY
92 * Bit 2 : IDLE
93 */
94 #define F81534_BUS_BUSY (BIT(0) | BIT(1))
95 #define F81534_BUS_IDLE BIT(2)
96 #define F81534_BUS_READ_DATA 0x1004
97 #define F81534_BUS_REG_STATUS 0x1003
98 #define F81534_BUS_REG_START 0x1002
99 #define F81534_BUS_REG_END 0x1001
100
101 #define F81534_CMD_READ 0x03
102
103 #define F81534_DEFAULT_BAUD_RATE 9600
104
105 #define F81534_PORT_CONF_RS232 0
106 #define F81534_PORT_CONF_RS485 BIT(0)
107 #define F81534_PORT_CONF_RS485_INVERT (BIT(0) | BIT(1))
108 #define F81534_PORT_CONF_MODE_MASK GENMASK(1, 0)
109 #define F81534_PORT_CONF_DISABLE_PORT BIT(3)
110 #define F81534_PORT_CONF_NOT_EXIST_PORT BIT(7)
111 #define F81534_PORT_UNAVAILABLE \
112 (F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT)
113
114
115 #define F81534_1X_RXTRIGGER 0xc3
116 #define F81534_8X_RXTRIGGER 0xcf
117
118 /*
119 * F81532/534 Clock registers (offset +08h)
120 *
121 * Bit0: UART Enable (always on)
122 * Bit2-1: Clock source selector
123 * 00: 1.846MHz.
124 * 01: 18.46MHz.
125 * 10: 24MHz.
126 * 11: 14.77MHz.
127 * Bit4: Auto direction(RTS) control (RTS pin Low when TX)
128 * Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)
129 */
130
131 #define F81534_UART_EN BIT(0)
132 #define F81534_CLK_1_846_MHZ 0
133 #define F81534_CLK_18_46_MHZ BIT(1)
134 #define F81534_CLK_24_MHZ BIT(2)
135 #define F81534_CLK_14_77_MHZ (BIT(1) | BIT(2))
136 #define F81534_CLK_MASK GENMASK(2, 1)
137 #define F81534_CLK_TX_DELAY_1BIT BIT(3)
138 #define F81534_CLK_RS485_MODE BIT(4)
139 #define F81534_CLK_RS485_INVERT BIT(5)
140
141 static const struct usb_device_id f81534_id_table[] = {
142 { USB_DEVICE(FINTEK_VENDOR_ID_1, FINTEK_DEVICE_ID) },
143 { USB_DEVICE(FINTEK_VENDOR_ID_2, FINTEK_DEVICE_ID) },
144 {} /* Terminating entry */
145 };
146
147 #define F81534_TX_EMPTY_BIT 0
148
149 struct f81534_serial_private {
150 u8 conf_data[F81534_DEF_CONF_SIZE];
151 int tty_idx[F81534_NUM_PORT];
152 u8 setting_idx;
153 int opened_port;
154 struct mutex urb_mutex;
155 };
156
157 struct f81534_port_private {
158 struct mutex mcr_mutex;
159 struct mutex lcr_mutex;
160 struct work_struct lsr_work;
161 struct usb_serial_port *port;
162 unsigned long tx_empty;
163 spinlock_t msr_lock;
164 u32 baud_base;
165 u8 shadow_mcr;
166 u8 shadow_lcr;
167 u8 shadow_msr;
168 u8 shadow_clk;
169 u8 phy_num;
170 };
171
172 struct f81534_pin_data {
173 const u16 reg_addr;
174 const u8 reg_mask;
175 };
176
177 struct f81534_port_out_pin {
178 struct f81534_pin_data pin[3];
179 };
180
181 /* Pin output value for M2/M1/M0(SD) */
182 static const struct f81534_port_out_pin f81534_port_out_pins[] = {
183 { { { 0x2ae8, BIT(7) }, { 0x2a90, BIT(5) }, { 0x2a90, BIT(4) } } },
184 { { { 0x2ae8, BIT(6) }, { 0x2ae8, BIT(0) }, { 0x2ae8, BIT(3) } } },
185 { { { 0x2a90, BIT(0) }, { 0x2ae8, BIT(2) }, { 0x2a80, BIT(6) } } },
186 { { { 0x2a90, BIT(3) }, { 0x2a90, BIT(2) }, { 0x2a90, BIT(1) } } },
187 };
188
189 static u32 const baudrate_table[] = { 115200, 921600, 1152000, 1500000 };
190 static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ,
191 F81534_CLK_18_46_MHZ, F81534_CLK_24_MHZ };
192
193 static int f81534_logic_to_phy_port(struct usb_serial *serial,
194 struct usb_serial_port *port)
195 {
196 struct f81534_serial_private *serial_priv =
197 usb_get_serial_data(port->serial);
198 int count = 0;
199 int i;
200
201 for (i = 0; i < F81534_NUM_PORT; ++i) {
202 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
203 continue;
204
205 if (port->port_number == count)
206 return i;
207
208 ++count;
209 }
210
211 return -ENODEV;
212 }
213
214 static int f81534_set_register(struct usb_serial *serial, u16 reg, u8 data)
215 {
216 struct usb_interface *interface = serial->interface;
217 struct usb_device *dev = serial->dev;
218 size_t count = F81534_USB_MAX_RETRY;
219 int status;
220 u8 *tmp;
221
222 tmp = kmalloc(sizeof(u8), GFP_KERNEL);
223 if (!tmp)
224 return -ENOMEM;
225
226 *tmp = data;
227
228 /*
229 * Our device maybe not reply when heavily loading, We'll retry for
230 * F81534_USB_MAX_RETRY times.
231 */
232 while (count--) {
233 status = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
234 F81534_SET_GET_REGISTER,
235 USB_TYPE_VENDOR | USB_DIR_OUT,
236 reg, 0, tmp, sizeof(u8),
237 F81534_USB_TIMEOUT);
238 if (status == sizeof(u8)) {
239 status = 0;
240 break;
241 }
242 }
243
244 if (status < 0) {
245 dev_err(&interface->dev, "%s: reg: %x data: %x failed: %d\n",
246 __func__, reg, data, status);
247 }
248
249 kfree(tmp);
250 return status;
251 }
252
253 static int f81534_get_register(struct usb_serial *serial, u16 reg, u8 *data)
254 {
255 struct usb_interface *interface = serial->interface;
256 struct usb_device *dev = serial->dev;
257 size_t count = F81534_USB_MAX_RETRY;
258 int status;
259 u8 *tmp;
260
261 tmp = kmalloc(sizeof(u8), GFP_KERNEL);
262 if (!tmp)
263 return -ENOMEM;
264
265 /*
266 * Our device maybe not reply when heavily loading, We'll retry for
267 * F81534_USB_MAX_RETRY times.
268 */
269 while (count--) {
270 status = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
271 F81534_SET_GET_REGISTER,
272 USB_TYPE_VENDOR | USB_DIR_IN,
273 reg, 0, tmp, sizeof(u8),
274 F81534_USB_TIMEOUT);
275 if (status > 0) {
276 status = 0;
277 break;
278 } else if (status == 0) {
279 status = -EIO;
280 }
281 }
282
283 if (status < 0) {
284 dev_err(&interface->dev, "%s: reg: %x failed: %d\n", __func__,
285 reg, status);
286 goto end;
287 }
288
289 *data = *tmp;
290
291 end:
292 kfree(tmp);
293 return status;
294 }
295
296 static int f81534_set_mask_register(struct usb_serial *serial, u16 reg,
297 u8 mask, u8 data)
298 {
299 int status;
300 u8 tmp;
301
302 status = f81534_get_register(serial, reg, &tmp);
303 if (status)
304 return status;
305
306 tmp &= ~mask;
307 tmp |= (mask & data);
308
309 return f81534_set_register(serial, reg, tmp);
310 }
311
312 static int f81534_set_phy_port_register(struct usb_serial *serial, int phy,
313 u16 reg, u8 data)
314 {
315 return f81534_set_register(serial, reg + F81534_UART_OFFSET * phy,
316 data);
317 }
318
319 static int f81534_get_phy_port_register(struct usb_serial *serial, int phy,
320 u16 reg, u8 *data)
321 {
322 return f81534_get_register(serial, reg + F81534_UART_OFFSET * phy,
323 data);
324 }
325
326 static int f81534_set_port_register(struct usb_serial_port *port, u16 reg,
327 u8 data)
328 {
329 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
330
331 return f81534_set_register(port->serial,
332 reg + port_priv->phy_num * F81534_UART_OFFSET, data);
333 }
334
335 static int f81534_get_port_register(struct usb_serial_port *port, u16 reg,
336 u8 *data)
337 {
338 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
339
340 return f81534_get_register(port->serial,
341 reg + port_priv->phy_num * F81534_UART_OFFSET, data);
342 }
343
344 /*
345 * If we try to access the internal flash via SPI bus, we should check the bus
346 * status for every command. e.g., F81534_BUS_REG_START/F81534_BUS_REG_END
347 */
348 static int f81534_wait_for_spi_idle(struct usb_serial *serial)
349 {
350 size_t count = F81534_MAX_BUS_RETRY;
351 u8 tmp;
352 int status;
353
354 do {
355 status = f81534_get_register(serial, F81534_BUS_REG_STATUS,
356 &tmp);
357 if (status)
358 return status;
359
360 if (tmp & F81534_BUS_BUSY)
361 continue;
362
363 if (tmp & F81534_BUS_IDLE)
364 break;
365
366 } while (--count);
367
368 if (!count) {
369 dev_err(&serial->interface->dev,
370 "%s: timed out waiting for idle SPI bus\n",
371 __func__);
372 return -EIO;
373 }
374
375 return f81534_set_register(serial, F81534_BUS_REG_STATUS,
376 tmp & ~F81534_BUS_IDLE);
377 }
378
379 static int f81534_get_spi_register(struct usb_serial *serial, u16 reg,
380 u8 *data)
381 {
382 int status;
383
384 status = f81534_get_register(serial, reg, data);
385 if (status)
386 return status;
387
388 return f81534_wait_for_spi_idle(serial);
389 }
390
391 static int f81534_set_spi_register(struct usb_serial *serial, u16 reg, u8 data)
392 {
393 int status;
394
395 status = f81534_set_register(serial, reg, data);
396 if (status)
397 return status;
398
399 return f81534_wait_for_spi_idle(serial);
400 }
401
402 static int f81534_read_flash(struct usb_serial *serial, u32 address,
403 size_t size, u8 *buf)
404 {
405 u8 tmp_buf[F81534_MAX_DATA_BLOCK];
406 size_t block = 0;
407 size_t read_size;
408 size_t count;
409 int status;
410 int offset;
411 u16 reg_tmp;
412
413 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
414 F81534_CMD_READ);
415 if (status)
416 return status;
417
418 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
419 (address >> 16) & 0xff);
420 if (status)
421 return status;
422
423 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
424 (address >> 8) & 0xff);
425 if (status)
426 return status;
427
428 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
429 (address >> 0) & 0xff);
430 if (status)
431 return status;
432
433 /* Continuous read mode */
434 do {
435 read_size = min_t(size_t, F81534_MAX_DATA_BLOCK, size);
436
437 for (count = 0; count < read_size; ++count) {
438 /* To write F81534_BUS_REG_END when final byte */
439 if (size <= F81534_MAX_DATA_BLOCK &&
440 read_size == count + 1)
441 reg_tmp = F81534_BUS_REG_END;
442 else
443 reg_tmp = F81534_BUS_REG_START;
444
445 /*
446 * Dummy code, force IC to generate a read pulse, the
447 * set of value 0xf1 is dont care (any value is ok)
448 */
449 status = f81534_set_spi_register(serial, reg_tmp,
450 0xf1);
451 if (status)
452 return status;
453
454 status = f81534_get_spi_register(serial,
455 F81534_BUS_READ_DATA,
456 &tmp_buf[count]);
457 if (status)
458 return status;
459
460 offset = count + block * F81534_MAX_DATA_BLOCK;
461 buf[offset] = tmp_buf[count];
462 }
463
464 size -= read_size;
465 ++block;
466 } while (size);
467
468 return 0;
469 }
470
471 static void f81534_prepare_write_buffer(struct usb_serial_port *port, u8 *buf)
472 {
473 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
474 int phy_num = port_priv->phy_num;
475 u8 tx_len;
476 int i;
477
478 /*
479 * The block layout is fixed with 4x128 Bytes, per 128 Bytes a port.
480 * index 0: port phy idx (e.g., 0,1,2,3)
481 * index 1: only F81534_TOKEN_WRITE
482 * index 2: serial TX out length
483 * index 3: fix to 0
484 * index 4~127: serial out data block
485 */
486 for (i = 0; i < F81534_NUM_PORT; ++i) {
487 buf[i * F81534_RECEIVE_BLOCK_SIZE] = i;
488 buf[i * F81534_RECEIVE_BLOCK_SIZE + 1] = F81534_TOKEN_WRITE;
489 buf[i * F81534_RECEIVE_BLOCK_SIZE + 2] = 0;
490 buf[i * F81534_RECEIVE_BLOCK_SIZE + 3] = 0;
491 }
492
493 tx_len = kfifo_out_locked(&port->write_fifo,
494 &buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 4],
495 F81534_MAX_TX_SIZE, &port->lock);
496
497 buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 2] = tx_len;
498 }
499
500 static int f81534_submit_writer(struct usb_serial_port *port, gfp_t mem_flags)
501 {
502 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
503 struct urb *urb;
504 unsigned long flags;
505 int result;
506
507 /* Check is any data in write_fifo */
508 spin_lock_irqsave(&port->lock, flags);
509
510 if (kfifo_is_empty(&port->write_fifo)) {
511 spin_unlock_irqrestore(&port->lock, flags);
512 return 0;
513 }
514
515 spin_unlock_irqrestore(&port->lock, flags);
516
517 /* Check H/W is TXEMPTY */
518 if (!test_and_clear_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty))
519 return 0;
520
521 urb = port->write_urbs[0];
522 f81534_prepare_write_buffer(port, port->bulk_out_buffers[0]);
523 urb->transfer_buffer_length = F81534_WRITE_BUFFER_SIZE;
524
525 result = usb_submit_urb(urb, mem_flags);
526 if (result) {
527 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
528 dev_err(&port->dev, "%s: submit failed: %d\n", __func__,
529 result);
530 return result;
531 }
532
533 usb_serial_port_softint(port);
534 return 0;
535 }
536
537 static u32 f81534_calc_baud_divisor(u32 baudrate, u32 clockrate)
538 {
539 /* Round to nearest divisor */
540 return DIV_ROUND_CLOSEST(clockrate, baudrate);
541 }
542
543 static int f81534_find_clk(u32 baudrate)
544 {
545 int idx;
546
547 for (idx = 0; idx < ARRAY_SIZE(baudrate_table); ++idx) {
548 if (baudrate <= baudrate_table[idx] &&
549 baudrate_table[idx] % baudrate == 0)
550 return idx;
551 }
552
553 return -EINVAL;
554 }
555
556 static int f81534_set_port_config(struct usb_serial_port *port,
557 struct tty_struct *tty, u32 baudrate, u32 old_baudrate, u8 lcr)
558 {
559 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
560 u32 divisor;
561 int status;
562 int i;
563 int idx;
564 u8 value;
565 u32 baud_list[] = {baudrate, old_baudrate, F81534_DEFAULT_BAUD_RATE};
566
567 for (i = 0; i < ARRAY_SIZE(baud_list); ++i) {
568 baudrate = baud_list[i];
569 if (baudrate == 0) {
570 tty_encode_baud_rate(tty, 0, 0);
571 return 0;
572 }
573
574 idx = f81534_find_clk(baudrate);
575 if (idx >= 0) {
576 tty_encode_baud_rate(tty, baudrate, baudrate);
577 break;
578 }
579 }
580
581 if (idx < 0)
582 return -EINVAL;
583
584 port_priv->baud_base = baudrate_table[idx];
585 port_priv->shadow_clk &= ~F81534_CLK_MASK;
586 port_priv->shadow_clk |= clock_table[idx];
587
588 status = f81534_set_port_register(port, F81534_CLOCK_REG,
589 port_priv->shadow_clk);
590 if (status) {
591 dev_err(&port->dev, "CLOCK_REG setting failed\n");
592 return status;
593 }
594
595 if (baudrate <= 1200)
596 value = F81534_1X_RXTRIGGER; /* 128 FIFO & TL: 1x */
597 else
598 value = F81534_8X_RXTRIGGER; /* 128 FIFO & TL: 8x */
599
600 status = f81534_set_port_register(port, F81534_CONFIG1_REG, value);
601 if (status) {
602 dev_err(&port->dev, "%s: CONFIG1 setting failed\n", __func__);
603 return status;
604 }
605
606 if (baudrate <= 1200)
607 value = UART_FCR_TRIGGER_1 | UART_FCR_ENABLE_FIFO; /* TL: 1 */
608 else
609 value = UART_FCR_TRIGGER_8 | UART_FCR_ENABLE_FIFO; /* TL: 8 */
610
611 status = f81534_set_port_register(port, F81534_FIFO_CONTROL_REG,
612 value);
613 if (status) {
614 dev_err(&port->dev, "%s: FCR setting failed\n", __func__);
615 return status;
616 }
617
618 divisor = f81534_calc_baud_divisor(baudrate, port_priv->baud_base);
619
620 mutex_lock(&port_priv->lcr_mutex);
621
622 value = UART_LCR_DLAB;
623 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
624 value);
625 if (status) {
626 dev_err(&port->dev, "%s: set LCR failed\n", __func__);
627 goto out_unlock;
628 }
629
630 value = divisor & 0xff;
631 status = f81534_set_port_register(port, F81534_DIVISOR_LSB_REG, value);
632 if (status) {
633 dev_err(&port->dev, "%s: set DLAB LSB failed\n", __func__);
634 goto out_unlock;
635 }
636
637 value = (divisor >> 8) & 0xff;
638 status = f81534_set_port_register(port, F81534_DIVISOR_MSB_REG, value);
639 if (status) {
640 dev_err(&port->dev, "%s: set DLAB MSB failed\n", __func__);
641 goto out_unlock;
642 }
643
644 value = lcr | (port_priv->shadow_lcr & UART_LCR_SBC);
645 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
646 value);
647 if (status) {
648 dev_err(&port->dev, "%s: set LCR failed\n", __func__);
649 goto out_unlock;
650 }
651
652 port_priv->shadow_lcr = value;
653 out_unlock:
654 mutex_unlock(&port_priv->lcr_mutex);
655
656 return status;
657 }
658
659 static int f81534_break_ctl(struct tty_struct *tty, int break_state)
660 {
661 struct usb_serial_port *port = tty->driver_data;
662 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
663 int status;
664
665 mutex_lock(&port_priv->lcr_mutex);
666
667 if (break_state)
668 port_priv->shadow_lcr |= UART_LCR_SBC;
669 else
670 port_priv->shadow_lcr &= ~UART_LCR_SBC;
671
672 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
673 port_priv->shadow_lcr);
674 if (status)
675 dev_err(&port->dev, "set break failed: %d\n", status);
676
677 mutex_unlock(&port_priv->lcr_mutex);
678
679 return status;
680 }
681
682 static int f81534_update_mctrl(struct usb_serial_port *port, unsigned int set,
683 unsigned int clear)
684 {
685 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
686 int status;
687 u8 tmp;
688
689 if (((set | clear) & (TIOCM_DTR | TIOCM_RTS)) == 0)
690 return 0; /* no change */
691
692 mutex_lock(&port_priv->mcr_mutex);
693
694 /* 'Set' takes precedence over 'Clear' */
695 clear &= ~set;
696
697 /* Always enable UART_MCR_OUT2 */
698 tmp = UART_MCR_OUT2 | port_priv->shadow_mcr;
699
700 if (clear & TIOCM_DTR)
701 tmp &= ~UART_MCR_DTR;
702
703 if (clear & TIOCM_RTS)
704 tmp &= ~UART_MCR_RTS;
705
706 if (set & TIOCM_DTR)
707 tmp |= UART_MCR_DTR;
708
709 if (set & TIOCM_RTS)
710 tmp |= UART_MCR_RTS;
711
712 status = f81534_set_port_register(port, F81534_MODEM_CONTROL_REG, tmp);
713 if (status < 0) {
714 dev_err(&port->dev, "%s: MCR write failed\n", __func__);
715 mutex_unlock(&port_priv->mcr_mutex);
716 return status;
717 }
718
719 port_priv->shadow_mcr = tmp;
720 mutex_unlock(&port_priv->mcr_mutex);
721 return 0;
722 }
723
724 /*
725 * This function will search the data area with token F81534_CUSTOM_VALID_TOKEN
726 * for latest configuration index. If nothing found
727 * (*index = F81534_CUSTOM_NO_CUSTOM_DATA), We'll load default configure in
728 * F81534_DEF_CONF_ADDRESS_START section.
729 *
730 * Due to we only use block0 to save data, so *index should be 0 or
731 * F81534_CUSTOM_NO_CUSTOM_DATA.
732 */
733 static int f81534_find_config_idx(struct usb_serial *serial, u8 *index)
734 {
735 u8 tmp;
736 int status;
737
738 status = f81534_read_flash(serial, F81534_CUSTOM_ADDRESS_START, 1,
739 &tmp);
740 if (status) {
741 dev_err(&serial->interface->dev, "%s: read failed: %d\n",
742 __func__, status);
743 return status;
744 }
745
746 /* We'll use the custom data when the data is valid. */
747 if (tmp == F81534_CUSTOM_VALID_TOKEN)
748 *index = 0;
749 else
750 *index = F81534_CUSTOM_NO_CUSTOM_DATA;
751
752 return 0;
753 }
754
755 /*
756 * The F81532/534 will not report serial port to USB serial subsystem when
757 * H/W DCD/DSR/CTS/RI/RX pin connected to ground.
758 *
759 * To detect RX pin status, we'll enable MCR interal loopback, disable it and
760 * delayed for 60ms. It connected to ground If LSR register report UART_LSR_BI.
761 */
762 static bool f81534_check_port_hw_disabled(struct usb_serial *serial, int phy)
763 {
764 int status;
765 u8 old_mcr;
766 u8 msr;
767 u8 lsr;
768 u8 msr_mask;
769
770 msr_mask = UART_MSR_DCD | UART_MSR_RI | UART_MSR_DSR | UART_MSR_CTS;
771
772 status = f81534_get_phy_port_register(serial, phy,
773 F81534_MODEM_STATUS_REG, &msr);
774 if (status)
775 return false;
776
777 if ((msr & msr_mask) != msr_mask)
778 return false;
779
780 status = f81534_set_phy_port_register(serial, phy,
781 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
782 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
783 if (status)
784 return false;
785
786 status = f81534_get_phy_port_register(serial, phy,
787 F81534_MODEM_CONTROL_REG, &old_mcr);
788 if (status)
789 return false;
790
791 status = f81534_set_phy_port_register(serial, phy,
792 F81534_MODEM_CONTROL_REG, UART_MCR_LOOP);
793 if (status)
794 return false;
795
796 status = f81534_set_phy_port_register(serial, phy,
797 F81534_MODEM_CONTROL_REG, 0x0);
798 if (status)
799 return false;
800
801 msleep(60);
802
803 status = f81534_get_phy_port_register(serial, phy,
804 F81534_LINE_STATUS_REG, &lsr);
805 if (status)
806 return false;
807
808 status = f81534_set_phy_port_register(serial, phy,
809 F81534_MODEM_CONTROL_REG, old_mcr);
810 if (status)
811 return false;
812
813 if ((lsr & UART_LSR_BI) == UART_LSR_BI)
814 return true;
815
816 return false;
817 }
818
819 /*
820 * We had 2 generation of F81532/534 IC. All has an internal storage.
821 *
822 * 1st is pure USB-to-TTL RS232 IC and designed for 4 ports only, no any
823 * internal data will used. All mode and gpio control should manually set
824 * by AP or Driver and all storage space value are 0xff. The
825 * f81534_calc_num_ports() will run to final we marked as "oldest version"
826 * for this IC.
827 *
828 * 2rd is designed to more generic to use any transceiver and this is our
829 * mass production type. We'll save data in F81534_CUSTOM_ADDRESS_START
830 * (0x2f00) with 9bytes. The 1st byte is a indicater. If the token is
831 * F81534_CUSTOM_VALID_TOKEN(0xf0), the IC is 2nd gen type, the following
832 * 4bytes save port mode (0:RS232/1:RS485 Invert/2:RS485), and the last
833 * 4bytes save GPIO state(value from 0~7 to represent 3 GPIO output pin).
834 * The f81534_calc_num_ports() will run to "new style" with checking
835 * F81534_PORT_UNAVAILABLE section.
836 */
837 static int f81534_calc_num_ports(struct usb_serial *serial,
838 struct usb_serial_endpoints *epds)
839 {
840 struct f81534_serial_private *serial_priv;
841 struct device *dev = &serial->interface->dev;
842 int size_bulk_in = usb_endpoint_maxp(epds->bulk_in[0]);
843 int size_bulk_out = usb_endpoint_maxp(epds->bulk_out[0]);
844 u8 num_port = 0;
845 int index = 0;
846 int status;
847 int i;
848
849 if (size_bulk_out != F81534_WRITE_BUFFER_SIZE ||
850 size_bulk_in != F81534_MAX_RECEIVE_BLOCK_SIZE) {
851 dev_err(dev, "unsupported endpoint max packet size\n");
852 return -ENODEV;
853 }
854
855 serial_priv = devm_kzalloc(&serial->interface->dev,
856 sizeof(*serial_priv), GFP_KERNEL);
857 if (!serial_priv)
858 return -ENOMEM;
859
860 usb_set_serial_data(serial, serial_priv);
861 mutex_init(&serial_priv->urb_mutex);
862
863 /* Check had custom setting */
864 status = f81534_find_config_idx(serial, &serial_priv->setting_idx);
865 if (status) {
866 dev_err(&serial->interface->dev, "%s: find idx failed: %d\n",
867 __func__, status);
868 return status;
869 }
870
871 /*
872 * We'll read custom data only when data available, otherwise we'll
873 * read default value instead.
874 */
875 if (serial_priv->setting_idx != F81534_CUSTOM_NO_CUSTOM_DATA) {
876 status = f81534_read_flash(serial,
877 F81534_CUSTOM_ADDRESS_START +
878 F81534_CONF_OFFSET,
879 sizeof(serial_priv->conf_data),
880 serial_priv->conf_data);
881 if (status) {
882 dev_err(&serial->interface->dev,
883 "%s: get custom data failed: %d\n",
884 __func__, status);
885 return status;
886 }
887
888 dev_dbg(&serial->interface->dev,
889 "%s: read config from block: %d\n", __func__,
890 serial_priv->setting_idx);
891 } else {
892 /* Read default board setting */
893 status = f81534_read_flash(serial,
894 F81534_DEF_CONF_ADDRESS_START,
895 sizeof(serial_priv->conf_data),
896 serial_priv->conf_data);
897 if (status) {
898 dev_err(&serial->interface->dev,
899 "%s: read failed: %d\n", __func__,
900 status);
901 return status;
902 }
903
904 dev_dbg(&serial->interface->dev, "%s: read default config\n",
905 __func__);
906 }
907
908 /* New style, find all possible ports */
909 for (i = 0; i < F81534_NUM_PORT; ++i) {
910 if (f81534_check_port_hw_disabled(serial, i))
911 serial_priv->conf_data[i] |= F81534_PORT_UNAVAILABLE;
912
913 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
914 continue;
915
916 ++num_port;
917 }
918
919 if (!num_port) {
920 dev_warn(&serial->interface->dev,
921 "no config found, assuming 4 ports\n");
922 num_port = 4; /* Nothing found, oldest version IC */
923 }
924
925 /* Assign phy-to-logic mapping */
926 for (i = 0; i < F81534_NUM_PORT; ++i) {
927 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
928 continue;
929
930 serial_priv->tty_idx[i] = index++;
931 dev_dbg(&serial->interface->dev,
932 "%s: phy_num: %d, tty_idx: %d\n", __func__, i,
933 serial_priv->tty_idx[i]);
934 }
935
936 /*
937 * Setup bulk-out endpoint multiplexing. All ports share the same
938 * bulk-out endpoint.
939 */
940 BUILD_BUG_ON(ARRAY_SIZE(epds->bulk_out) < F81534_NUM_PORT);
941
942 for (i = 1; i < num_port; ++i)
943 epds->bulk_out[i] = epds->bulk_out[0];
944
945 epds->num_bulk_out = num_port;
946
947 return num_port;
948 }
949
950 static void f81534_set_termios(struct tty_struct *tty,
951 struct usb_serial_port *port,
952 const struct ktermios *old_termios)
953 {
954 u8 new_lcr = 0;
955 int status;
956 u32 baud;
957 u32 old_baud;
958
959 if (C_BAUD(tty) == B0)
960 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
961 else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
962 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
963
964 if (C_PARENB(tty)) {
965 new_lcr |= UART_LCR_PARITY;
966
967 if (!C_PARODD(tty))
968 new_lcr |= UART_LCR_EPAR;
969
970 if (C_CMSPAR(tty))
971 new_lcr |= UART_LCR_SPAR;
972 }
973
974 if (C_CSTOPB(tty))
975 new_lcr |= UART_LCR_STOP;
976
977 new_lcr |= UART_LCR_WLEN(tty_get_char_size(tty->termios.c_cflag));
978
979 baud = tty_get_baud_rate(tty);
980 if (!baud)
981 return;
982
983 if (old_termios)
984 old_baud = tty_termios_baud_rate(old_termios);
985 else
986 old_baud = F81534_DEFAULT_BAUD_RATE;
987
988 dev_dbg(&port->dev, "%s: baud: %d\n", __func__, baud);
989
990 status = f81534_set_port_config(port, tty, baud, old_baud, new_lcr);
991 if (status < 0) {
992 dev_err(&port->dev, "%s: set port config failed: %d\n",
993 __func__, status);
994 }
995 }
996
997 static int f81534_submit_read_urb(struct usb_serial *serial, gfp_t flags)
998 {
999 return usb_serial_generic_submit_read_urbs(serial->port[0], flags);
1000 }
1001
1002 static void f81534_msr_changed(struct usb_serial_port *port, u8 msr)
1003 {
1004 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1005 struct tty_struct *tty;
1006 unsigned long flags;
1007 u8 old_msr;
1008
1009 if (!(msr & UART_MSR_ANY_DELTA))
1010 return;
1011
1012 spin_lock_irqsave(&port_priv->msr_lock, flags);
1013 old_msr = port_priv->shadow_msr;
1014 port_priv->shadow_msr = msr;
1015 spin_unlock_irqrestore(&port_priv->msr_lock, flags);
1016
1017 dev_dbg(&port->dev, "%s: MSR from %02x to %02x\n", __func__, old_msr,
1018 msr);
1019
1020 /* Update input line counters */
1021 if (msr & UART_MSR_DCTS)
1022 port->icount.cts++;
1023 if (msr & UART_MSR_DDSR)
1024 port->icount.dsr++;
1025 if (msr & UART_MSR_DDCD)
1026 port->icount.dcd++;
1027 if (msr & UART_MSR_TERI)
1028 port->icount.rng++;
1029
1030 wake_up_interruptible(&port->port.delta_msr_wait);
1031
1032 if (!(msr & UART_MSR_DDCD))
1033 return;
1034
1035 dev_dbg(&port->dev, "%s: DCD Changed: phy_num: %d from %x to %x\n",
1036 __func__, port_priv->phy_num, old_msr, msr);
1037
1038 tty = tty_port_tty_get(&port->port);
1039 if (!tty)
1040 return;
1041
1042 usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD);
1043 tty_kref_put(tty);
1044 }
1045
1046 static int f81534_read_msr(struct usb_serial_port *port)
1047 {
1048 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1049 unsigned long flags;
1050 int status;
1051 u8 msr;
1052
1053 /* Get MSR initial value */
1054 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
1055 if (status)
1056 return status;
1057
1058 /* Force update current state */
1059 spin_lock_irqsave(&port_priv->msr_lock, flags);
1060 port_priv->shadow_msr = msr;
1061 spin_unlock_irqrestore(&port_priv->msr_lock, flags);
1062
1063 return 0;
1064 }
1065
1066 static int f81534_open(struct tty_struct *tty, struct usb_serial_port *port)
1067 {
1068 struct f81534_serial_private *serial_priv =
1069 usb_get_serial_data(port->serial);
1070 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1071 int status;
1072
1073 status = f81534_set_port_register(port,
1074 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
1075 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
1076 if (status) {
1077 dev_err(&port->dev, "%s: Clear FIFO failed: %d\n", __func__,
1078 status);
1079 return status;
1080 }
1081
1082 if (tty)
1083 f81534_set_termios(tty, port, NULL);
1084
1085 status = f81534_read_msr(port);
1086 if (status)
1087 return status;
1088
1089 mutex_lock(&serial_priv->urb_mutex);
1090
1091 /* Submit Read URBs for first port opened */
1092 if (!serial_priv->opened_port) {
1093 status = f81534_submit_read_urb(port->serial, GFP_KERNEL);
1094 if (status)
1095 goto exit;
1096 }
1097
1098 serial_priv->opened_port++;
1099
1100 exit:
1101 mutex_unlock(&serial_priv->urb_mutex);
1102
1103 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1104 return status;
1105 }
1106
1107 static void f81534_close(struct usb_serial_port *port)
1108 {
1109 struct f81534_serial_private *serial_priv =
1110 usb_get_serial_data(port->serial);
1111 struct usb_serial_port *port0 = port->serial->port[0];
1112 unsigned long flags;
1113 size_t i;
1114
1115 usb_kill_urb(port->write_urbs[0]);
1116
1117 spin_lock_irqsave(&port->lock, flags);
1118 kfifo_reset_out(&port->write_fifo);
1119 spin_unlock_irqrestore(&port->lock, flags);
1120
1121 /* Kill Read URBs when final port closed */
1122 mutex_lock(&serial_priv->urb_mutex);
1123 serial_priv->opened_port--;
1124
1125 if (!serial_priv->opened_port) {
1126 for (i = 0; i < ARRAY_SIZE(port0->read_urbs); ++i)
1127 usb_kill_urb(port0->read_urbs[i]);
1128 }
1129
1130 mutex_unlock(&serial_priv->urb_mutex);
1131 }
1132
1133 static void f81534_get_serial_info(struct tty_struct *tty, struct serial_struct *ss)
1134 {
1135 struct usb_serial_port *port = tty->driver_data;
1136 struct f81534_port_private *port_priv;
1137
1138 port_priv = usb_get_serial_port_data(port);
1139
1140 ss->baud_base = port_priv->baud_base;
1141 }
1142
1143 static void f81534_process_per_serial_block(struct usb_serial_port *port,
1144 u8 *data)
1145 {
1146 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1147 int phy_num = data[0];
1148 size_t read_size = 0;
1149 size_t i;
1150 char tty_flag;
1151 int status;
1152 u8 lsr;
1153
1154 /*
1155 * The block layout is 128 Bytes
1156 * index 0: port phy idx (e.g., 0,1,2,3),
1157 * index 1: It's could be
1158 * F81534_TOKEN_RECEIVE
1159 * F81534_TOKEN_TX_EMPTY
1160 * F81534_TOKEN_MSR_CHANGE
1161 * index 2: serial in size (data+lsr, must be even)
1162 * meaningful for F81534_TOKEN_RECEIVE only
1163 * index 3: current MSR with this device
1164 * index 4~127: serial in data block (data+lsr, must be even)
1165 */
1166 switch (data[1]) {
1167 case F81534_TOKEN_TX_EMPTY:
1168 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1169
1170 /* Try to submit writer */
1171 status = f81534_submit_writer(port, GFP_ATOMIC);
1172 if (status)
1173 dev_err(&port->dev, "%s: submit failed\n", __func__);
1174 return;
1175
1176 case F81534_TOKEN_MSR_CHANGE:
1177 f81534_msr_changed(port, data[3]);
1178 return;
1179
1180 case F81534_TOKEN_RECEIVE:
1181 read_size = data[2];
1182 if (read_size > F81534_MAX_RX_SIZE) {
1183 dev_err(&port->dev,
1184 "%s: phy: %d read_size: %zu larger than: %d\n",
1185 __func__, phy_num, read_size,
1186 F81534_MAX_RX_SIZE);
1187 return;
1188 }
1189
1190 break;
1191
1192 default:
1193 dev_warn(&port->dev, "%s: unknown token: %02x\n", __func__,
1194 data[1]);
1195 return;
1196 }
1197
1198 for (i = 4; i < 4 + read_size; i += 2) {
1199 tty_flag = TTY_NORMAL;
1200 lsr = data[i + 1];
1201
1202 if (lsr & UART_LSR_BRK_ERROR_BITS) {
1203 if (lsr & UART_LSR_BI) {
1204 tty_flag = TTY_BREAK;
1205 port->icount.brk++;
1206 usb_serial_handle_break(port);
1207 } else if (lsr & UART_LSR_PE) {
1208 tty_flag = TTY_PARITY;
1209 port->icount.parity++;
1210 } else if (lsr & UART_LSR_FE) {
1211 tty_flag = TTY_FRAME;
1212 port->icount.frame++;
1213 }
1214
1215 if (lsr & UART_LSR_OE) {
1216 port->icount.overrun++;
1217 tty_insert_flip_char(&port->port, 0,
1218 TTY_OVERRUN);
1219 }
1220
1221 schedule_work(&port_priv->lsr_work);
1222 }
1223
1224 if (port->sysrq) {
1225 if (usb_serial_handle_sysrq_char(port, data[i]))
1226 continue;
1227 }
1228
1229 tty_insert_flip_char(&port->port, data[i], tty_flag);
1230 }
1231
1232 tty_flip_buffer_push(&port->port);
1233 }
1234
1235 static void f81534_process_read_urb(struct urb *urb)
1236 {
1237 struct f81534_serial_private *serial_priv;
1238 struct usb_serial_port *port;
1239 struct usb_serial *serial;
1240 u8 *buf;
1241 int phy_port_num;
1242 int tty_port_num;
1243 size_t i;
1244
1245 if (!urb->actual_length ||
1246 urb->actual_length % F81534_RECEIVE_BLOCK_SIZE) {
1247 return;
1248 }
1249
1250 port = urb->context;
1251 serial = port->serial;
1252 buf = urb->transfer_buffer;
1253 serial_priv = usb_get_serial_data(serial);
1254
1255 for (i = 0; i < urb->actual_length; i += F81534_RECEIVE_BLOCK_SIZE) {
1256 phy_port_num = buf[i];
1257 if (phy_port_num >= F81534_NUM_PORT) {
1258 dev_err(&port->dev,
1259 "%s: phy_port_num: %d larger than: %d\n",
1260 __func__, phy_port_num, F81534_NUM_PORT);
1261 continue;
1262 }
1263
1264 tty_port_num = serial_priv->tty_idx[phy_port_num];
1265 port = serial->port[tty_port_num];
1266
1267 if (tty_port_initialized(&port->port))
1268 f81534_process_per_serial_block(port, &buf[i]);
1269 }
1270 }
1271
1272 static void f81534_write_usb_callback(struct urb *urb)
1273 {
1274 struct usb_serial_port *port = urb->context;
1275
1276 switch (urb->status) {
1277 case 0:
1278 break;
1279 case -ENOENT:
1280 case -ECONNRESET:
1281 case -ESHUTDOWN:
1282 dev_dbg(&port->dev, "%s - urb stopped: %d\n",
1283 __func__, urb->status);
1284 return;
1285 case -EPIPE:
1286 dev_err(&port->dev, "%s - urb stopped: %d\n",
1287 __func__, urb->status);
1288 return;
1289 default:
1290 dev_dbg(&port->dev, "%s - nonzero urb status: %d\n",
1291 __func__, urb->status);
1292 break;
1293 }
1294 }
1295
1296 static void f81534_lsr_worker(struct work_struct *work)
1297 {
1298 struct f81534_port_private *port_priv;
1299 struct usb_serial_port *port;
1300 int status;
1301 u8 tmp;
1302
1303 port_priv = container_of(work, struct f81534_port_private, lsr_work);
1304 port = port_priv->port;
1305
1306 status = f81534_get_port_register(port, F81534_LINE_STATUS_REG, &tmp);
1307 if (status)
1308 dev_warn(&port->dev, "read LSR failed: %d\n", status);
1309 }
1310
1311 static int f81534_set_port_output_pin(struct usb_serial_port *port)
1312 {
1313 struct f81534_serial_private *serial_priv;
1314 struct f81534_port_private *port_priv;
1315 struct usb_serial *serial;
1316 const struct f81534_port_out_pin *pins;
1317 int status;
1318 int i;
1319 u8 value;
1320 u8 idx;
1321
1322 serial = port->serial;
1323 serial_priv = usb_get_serial_data(serial);
1324 port_priv = usb_get_serial_port_data(port);
1325
1326 idx = F81534_CONF_INIT_GPIO_OFFSET + port_priv->phy_num;
1327 value = serial_priv->conf_data[idx];
1328 if (value >= F81534_CONF_GPIO_SHUTDOWN) {
1329 /*
1330 * Newer IC configure will make transceiver in shutdown mode on
1331 * initial power on. We need enable it before using UARTs.
1332 */
1333 idx = F81534_CONF_WORK_GPIO_OFFSET + port_priv->phy_num;
1334 value = serial_priv->conf_data[idx];
1335 if (value >= F81534_CONF_GPIO_SHUTDOWN)
1336 value = F81534_CONF_GPIO_RS232;
1337 }
1338
1339 pins = &f81534_port_out_pins[port_priv->phy_num];
1340
1341 for (i = 0; i < ARRAY_SIZE(pins->pin); ++i) {
1342 status = f81534_set_mask_register(serial,
1343 pins->pin[i].reg_addr, pins->pin[i].reg_mask,
1344 value & BIT(i) ? pins->pin[i].reg_mask : 0);
1345 if (status)
1346 return status;
1347 }
1348
1349 dev_dbg(&port->dev, "Output pin (M0/M1/M2): %d\n", value);
1350 return 0;
1351 }
1352
1353 static int f81534_port_probe(struct usb_serial_port *port)
1354 {
1355 struct f81534_serial_private *serial_priv;
1356 struct f81534_port_private *port_priv;
1357 int ret;
1358 u8 value;
1359
1360 serial_priv = usb_get_serial_data(port->serial);
1361 port_priv = devm_kzalloc(&port->dev, sizeof(*port_priv), GFP_KERNEL);
1362 if (!port_priv)
1363 return -ENOMEM;
1364
1365 /*
1366 * We'll make tx frame error when baud rate from 384~500kps. So we'll
1367 * delay all tx data frame with 1bit.
1368 */
1369 port_priv->shadow_clk = F81534_UART_EN | F81534_CLK_TX_DELAY_1BIT;
1370 spin_lock_init(&port_priv->msr_lock);
1371 mutex_init(&port_priv->mcr_mutex);
1372 mutex_init(&port_priv->lcr_mutex);
1373 INIT_WORK(&port_priv->lsr_work, f81534_lsr_worker);
1374
1375 /* Assign logic-to-phy mapping */
1376 ret = f81534_logic_to_phy_port(port->serial, port);
1377 if (ret < 0)
1378 return ret;
1379
1380 port_priv->phy_num = ret;
1381 port_priv->port = port;
1382 usb_set_serial_port_data(port, port_priv);
1383 dev_dbg(&port->dev, "%s: port_number: %d, phy_num: %d\n", __func__,
1384 port->port_number, port_priv->phy_num);
1385
1386 /*
1387 * The F81532/534 will hang-up when enable LSR interrupt in IER and
1388 * occur data overrun. So we'll disable the LSR interrupt in probe()
1389 * and submit the LSR worker to clear LSR state when reported LSR error
1390 * bit with bulk-in data in f81534_process_per_serial_block().
1391 */
1392 ret = f81534_set_port_register(port, F81534_INTERRUPT_ENABLE_REG,
1393 UART_IER_RDI | UART_IER_THRI | UART_IER_MSI);
1394 if (ret)
1395 return ret;
1396
1397 value = serial_priv->conf_data[port_priv->phy_num];
1398 switch (value & F81534_PORT_CONF_MODE_MASK) {
1399 case F81534_PORT_CONF_RS485_INVERT:
1400 port_priv->shadow_clk |= F81534_CLK_RS485_MODE |
1401 F81534_CLK_RS485_INVERT;
1402 dev_dbg(&port->dev, "RS485 invert mode\n");
1403 break;
1404 case F81534_PORT_CONF_RS485:
1405 port_priv->shadow_clk |= F81534_CLK_RS485_MODE;
1406 dev_dbg(&port->dev, "RS485 mode\n");
1407 break;
1408
1409 default:
1410 case F81534_PORT_CONF_RS232:
1411 dev_dbg(&port->dev, "RS232 mode\n");
1412 break;
1413 }
1414
1415 return f81534_set_port_output_pin(port);
1416 }
1417
1418 static void f81534_port_remove(struct usb_serial_port *port)
1419 {
1420 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1421
1422 flush_work(&port_priv->lsr_work);
1423 }
1424
1425 static int f81534_tiocmget(struct tty_struct *tty)
1426 {
1427 struct usb_serial_port *port = tty->driver_data;
1428 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1429 int status;
1430 int r;
1431 u8 msr;
1432 u8 mcr;
1433
1434 /* Read current MSR from device */
1435 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
1436 if (status)
1437 return status;
1438
1439 mutex_lock(&port_priv->mcr_mutex);
1440 mcr = port_priv->shadow_mcr;
1441 mutex_unlock(&port_priv->mcr_mutex);
1442
1443 r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) |
1444 (mcr & UART_MCR_RTS ? TIOCM_RTS : 0) |
1445 (msr & UART_MSR_CTS ? TIOCM_CTS : 0) |
1446 (msr & UART_MSR_DCD ? TIOCM_CAR : 0) |
1447 (msr & UART_MSR_RI ? TIOCM_RI : 0) |
1448 (msr & UART_MSR_DSR ? TIOCM_DSR : 0);
1449
1450 return r;
1451 }
1452
1453 static int f81534_tiocmset(struct tty_struct *tty, unsigned int set,
1454 unsigned int clear)
1455 {
1456 struct usb_serial_port *port = tty->driver_data;
1457
1458 return f81534_update_mctrl(port, set, clear);
1459 }
1460
1461 static void f81534_dtr_rts(struct usb_serial_port *port, int on)
1462 {
1463 if (on)
1464 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
1465 else
1466 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
1467 }
1468
1469 static int f81534_write(struct tty_struct *tty, struct usb_serial_port *port,
1470 const u8 *buf, int count)
1471 {
1472 int bytes_out, status;
1473
1474 if (!count)
1475 return 0;
1476
1477 bytes_out = kfifo_in_locked(&port->write_fifo, buf, count,
1478 &port->lock);
1479
1480 status = f81534_submit_writer(port, GFP_ATOMIC);
1481 if (status) {
1482 dev_err(&port->dev, "%s: submit failed\n", __func__);
1483 return status;
1484 }
1485
1486 return bytes_out;
1487 }
1488
1489 static bool f81534_tx_empty(struct usb_serial_port *port)
1490 {
1491 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1492
1493 return test_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1494 }
1495
1496 static int f81534_resume(struct usb_serial *serial)
1497 {
1498 struct f81534_serial_private *serial_priv =
1499 usb_get_serial_data(serial);
1500 struct usb_serial_port *port;
1501 int error = 0;
1502 int status;
1503 size_t i;
1504
1505 /*
1506 * We'll register port 0 bulkin when port had opened, It'll take all
1507 * port received data, MSR register change and TX_EMPTY information.
1508 */
1509 mutex_lock(&serial_priv->urb_mutex);
1510
1511 if (serial_priv->opened_port) {
1512 status = f81534_submit_read_urb(serial, GFP_NOIO);
1513 if (status) {
1514 mutex_unlock(&serial_priv->urb_mutex);
1515 return status;
1516 }
1517 }
1518
1519 mutex_unlock(&serial_priv->urb_mutex);
1520
1521 for (i = 0; i < serial->num_ports; i++) {
1522 port = serial->port[i];
1523 if (!tty_port_initialized(&port->port))
1524 continue;
1525
1526 status = f81534_submit_writer(port, GFP_NOIO);
1527 if (status) {
1528 dev_err(&port->dev, "%s: submit failed\n", __func__);
1529 ++error;
1530 }
1531 }
1532
1533 if (error)
1534 return -EIO;
1535
1536 return 0;
1537 }
1538
1539 static struct usb_serial_driver f81534_device = {
1540 .driver = {
1541 .name = "f81534",
1542 },
1543 .description = DRIVER_DESC,
1544 .id_table = f81534_id_table,
1545 .num_bulk_in = 1,
1546 .num_bulk_out = 1,
1547 .open = f81534_open,
1548 .close = f81534_close,
1549 .write = f81534_write,
1550 .tx_empty = f81534_tx_empty,
1551 .calc_num_ports = f81534_calc_num_ports,
1552 .port_probe = f81534_port_probe,
1553 .port_remove = f81534_port_remove,
1554 .break_ctl = f81534_break_ctl,
1555 .dtr_rts = f81534_dtr_rts,
1556 .process_read_urb = f81534_process_read_urb,
1557 .get_serial = f81534_get_serial_info,
1558 .tiocmget = f81534_tiocmget,
1559 .tiocmset = f81534_tiocmset,
1560 .write_bulk_callback = f81534_write_usb_callback,
1561 .set_termios = f81534_set_termios,
1562 .resume = f81534_resume,
1563 };
1564
1565 static struct usb_serial_driver *const serial_drivers[] = {
1566 &f81534_device, NULL
1567 };
1568
1569 module_usb_serial_driver(serial_drivers, f81534_id_table);
1570
1571 MODULE_DEVICE_TABLE(usb, f81534_id_table);
1572 MODULE_DESCRIPTION(DRIVER_DESC);
1573 MODULE_AUTHOR("Peter Hong <Peter_Hong@fintek.com.tw>");
1574 MODULE_AUTHOR("Tom Tsai <Tom_Tsai@fintek.com.tw>");
1575 MODULE_LICENSE("GPL");
Kernel DRM miscellaneous fixes and cross-tree changes