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Merge tag 'trace-printf-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/trace...
[drm/drm-misc.git] / drivers / video / fbdev / matrox / matroxfb_base.c
blob81603ce05a2296d0b70c41467a1159478605e2bf
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 *
4 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
5 *
6 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
7 *
8 * Portions Copyright (c) 2001 Matrox Graphics Inc.
9 *
10 * Version: 1.65 2002/08/14
11 *
12 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
13 *
14 * Contributors: "menion?" <menion@mindless.com>
15 * Betatesting, fixes, ideas
16 *
17 * "Kurt Garloff" <garloff@suse.de>
18 * Betatesting, fixes, ideas, videomodes, videomodes timmings
19 *
20 * "Tom Rini" <trini@kernel.crashing.org>
21 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
22 *
23 * "Bibek Sahu" <scorpio@dodds.net>
24 * Access device through readb|w|l and write b|w|l
25 * Extensive debugging stuff
26 *
27 * "Daniel Haun" <haund@usa.net>
28 * Testing, hardware cursor fixes
29 *
30 * "Scott Wood" <sawst46+@pitt.edu>
31 * Fixes
32 *
33 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
34 * Betatesting
35 *
36 * "Kelly French" <targon@hazmat.com>
37 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
38 * Betatesting, bug reporting
39 *
40 * "Pablo Bianucci" <pbian@pccp.com.ar>
41 * Fixes, ideas, betatesting
42 *
43 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
44 * Fixes, enhandcements, ideas, betatesting
45 *
46 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
47 * PPC betatesting, PPC support, backward compatibility
48 *
49 * "Paul Womar" <Paul@pwomar.demon.co.uk>
50 * "Owen Waller" <O.Waller@ee.qub.ac.uk>
51 * PPC betatesting
52 *
53 * "Thomas Pornin" <pornin@bolet.ens.fr>
54 * Alpha betatesting
55 *
56 * "Pieter van Leuven" <pvl@iae.nl>
57 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
58 * G100 testing
59 *
60 * "H. Peter Arvin" <hpa@transmeta.com>
61 * Ideas
62 *
63 * "Cort Dougan" <cort@cs.nmt.edu>
64 * CHRP fixes and PReP cleanup
65 *
66 * "Mark Vojkovich" <mvojkovi@ucsd.edu>
67 * G400 support
68 *
69 * "Samuel Hocevar" <sam@via.ecp.fr>
70 * Fixes
71 *
72 * "Anton Altaparmakov" <AntonA@bigfoot.com>
73 * G400 MAX/non-MAX distinction
74 *
75 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
76 * memtype extension (needed for GXT130P RS/6000 adapter)
77 *
78 * "Uns Lider" <unslider@miranda.org>
79 * G100 PLNWT fixes
80 *
81 * "Denis Zaitsev" <zzz@cd-club.ru>
82 * Fixes
83 *
84 * "Mike Pieper" <mike@pieper-family.de>
85 * TVOut enhandcements, V4L2 control interface.
86 *
87 * "Diego Biurrun" <diego@biurrun.de>
88 * DFP testing
89 *
90 * (following author is not in any relation with this code, but his code
91 * is included in this driver)
92 *
93 * Based on framebuffer driver for VBE 2.0 compliant graphic boards
94 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
95 *
96 * (following author is not in any relation with this code, but his ideas
97 * were used when writing this driver)
98 *
99 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
100 *
101 */
102
103 #include <linux/aperture.h>
104 #include <linux/version.h>
105
106 #include "matroxfb_base.h"
107 #include "matroxfb_misc.h"
108 #include "matroxfb_accel.h"
109 #include "matroxfb_DAC1064.h"
110 #include "matroxfb_Ti3026.h"
111 #include "matroxfb_maven.h"
112 #include "matroxfb_crtc2.h"
113 #include "matroxfb_g450.h"
114 #include <linux/matroxfb.h>
115 #include <linux/interrupt.h>
116 #include <linux/nvram.h>
117 #include <linux/slab.h>
118 #include <linux/uaccess.h>
119
120 #ifdef CONFIG_PPC_PMAC
121 #include <asm/machdep.h>
122 static int default_vmode = VMODE_NVRAM;
123 static int default_cmode = CMODE_NVRAM;
124 #endif
125
126 static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
127
128 /* --------------------------------------------------------------------- */
129
130 /*
131 * card parameters
132 */
133
134 /* --------------------------------------------------------------------- */
135
136 static struct fb_var_screeninfo vesafb_defined = {
137 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
138 0,0, /* virtual -> visible no offset */
139 8, /* depth -> load bits_per_pixel */
140 0, /* greyscale ? */
141 {0,0,0}, /* R */
142 {0,0,0}, /* G */
143 {0,0,0}, /* B */
144 {0,0,0}, /* transparency */
145 0, /* standard pixel format */
146 FB_ACTIVATE_NOW,
147 -1,-1,
148 FB_ACCELF_TEXT, /* accel flags */
149 39721L,48L,16L,33L,10L,
150 96L,2L,~0, /* No sync info */
151 FB_VMODE_NONINTERLACED,
152 };
153
154
155
156 /* --------------------------------------------------------------------- */
157 static void update_crtc2(struct matrox_fb_info *minfo, unsigned int pos)
158 {
159 struct matroxfb_dh_fb_info *info = minfo->crtc2.info;
160
161 /* Make sure that displays are compatible */
162 if (info && (info->fbcon.var.bits_per_pixel == minfo->fbcon.var.bits_per_pixel)
163 && (info->fbcon.var.xres_virtual == minfo->fbcon.var.xres_virtual)
164 && (info->fbcon.var.green.length == minfo->fbcon.var.green.length)
165 ) {
166 switch (minfo->fbcon.var.bits_per_pixel) {
167 case 16:
168 case 32:
169 pos = pos * 8;
170 if (info->interlaced) {
171 mga_outl(0x3C2C, pos);
172 mga_outl(0x3C28, pos + minfo->fbcon.var.xres_virtual * minfo->fbcon.var.bits_per_pixel / 8);
173 } else {
174 mga_outl(0x3C28, pos);
175 }
176 break;
177 }
178 }
179 }
180
181 static void matroxfb_crtc1_panpos(struct matrox_fb_info *minfo)
182 {
183 if (minfo->crtc1.panpos >= 0) {
184 unsigned long flags;
185 int panpos;
186
187 matroxfb_DAC_lock_irqsave(flags);
188 panpos = minfo->crtc1.panpos;
189 if (panpos >= 0) {
190 unsigned int extvga_reg;
191
192 minfo->crtc1.panpos = -1; /* No update pending anymore */
193 extvga_reg = mga_inb(M_EXTVGA_INDEX);
194 mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
195 if (extvga_reg != 0x00) {
196 mga_outb(M_EXTVGA_INDEX, extvga_reg);
197 }
198 }
199 matroxfb_DAC_unlock_irqrestore(flags);
200 }
201 }
202
203 static irqreturn_t matrox_irq(int irq, void *dev_id)
204 {
205 u_int32_t status;
206 int handled = 0;
207 struct matrox_fb_info *minfo = dev_id;
208
209 status = mga_inl(M_STATUS);
210
211 if (status & 0x20) {
212 mga_outl(M_ICLEAR, 0x20);
213 minfo->crtc1.vsync.cnt++;
214 matroxfb_crtc1_panpos(minfo);
215 wake_up_interruptible(&minfo->crtc1.vsync.wait);
216 handled = 1;
217 }
218 if (status & 0x200) {
219 mga_outl(M_ICLEAR, 0x200);
220 minfo->crtc2.vsync.cnt++;
221 wake_up_interruptible(&minfo->crtc2.vsync.wait);
222 handled = 1;
223 }
224 return IRQ_RETVAL(handled);
225 }
226
227 int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable)
228 {
229 u_int32_t bm;
230
231 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
232 bm = 0x220;
233 else
234 bm = 0x020;
235
236 if (!test_and_set_bit(0, &minfo->irq_flags)) {
237 if (request_irq(minfo->pcidev->irq, matrox_irq,
238 IRQF_SHARED, "matroxfb", minfo)) {
239 clear_bit(0, &minfo->irq_flags);
240 return -EINVAL;
241 }
242 /* Clear any pending field interrupts */
243 mga_outl(M_ICLEAR, bm);
244 mga_outl(M_IEN, mga_inl(M_IEN) | bm);
245 } else if (reenable) {
246 u_int32_t ien;
247
248 ien = mga_inl(M_IEN);
249 if ((ien & bm) != bm) {
250 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
251 mga_outl(M_IEN, ien | bm);
252 }
253 }
254 return 0;
255 }
256
257 static void matroxfb_disable_irq(struct matrox_fb_info *minfo)
258 {
259 if (test_and_clear_bit(0, &minfo->irq_flags)) {
260 /* Flush pending pan-at-vbl request... */
261 matroxfb_crtc1_panpos(minfo);
262 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
263 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
264 else
265 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
266 free_irq(minfo->pcidev->irq, minfo);
267 }
268 }
269
270 int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc)
271 {
272 struct matrox_vsync *vs;
273 unsigned int cnt;
274 int ret;
275
276 switch (crtc) {
277 case 0:
278 vs = &minfo->crtc1.vsync;
279 break;
280 case 1:
281 if (minfo->devflags.accelerator != FB_ACCEL_MATROX_MGAG400) {
282 return -ENODEV;
283 }
284 vs = &minfo->crtc2.vsync;
285 break;
286 default:
287 return -ENODEV;
288 }
289 ret = matroxfb_enable_irq(minfo, 0);
290 if (ret) {
291 return ret;
292 }
293
294 cnt = vs->cnt;
295 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
296 if (ret < 0) {
297 return ret;
298 }
299 if (ret == 0) {
300 matroxfb_enable_irq(minfo, 1);
301 return -ETIMEDOUT;
302 }
303 return 0;
304 }
305
306 /* --------------------------------------------------------------------- */
307
308 static void matrox_pan_var(struct matrox_fb_info *minfo,
309 struct fb_var_screeninfo *var)
310 {
311 unsigned int pos;
312 unsigned short p0, p1, p2;
313 unsigned int p3;
314 int vbl;
315 unsigned long flags;
316
317 CRITFLAGS
318
319 DBG(__func__)
320
321 if (minfo->dead)
322 return;
323
324 minfo->fbcon.var.xoffset = var->xoffset;
325 minfo->fbcon.var.yoffset = var->yoffset;
326 pos = (minfo->fbcon.var.yoffset * minfo->fbcon.var.xres_virtual + minfo->fbcon.var.xoffset) * minfo->curr.final_bppShift / 32;
327 pos += minfo->curr.ydstorg.chunks;
328 p0 = minfo->hw.CRTC[0x0D] = pos & 0xFF;
329 p1 = minfo->hw.CRTC[0x0C] = (pos & 0xFF00) >> 8;
330 p2 = minfo->hw.CRTCEXT[0] = (minfo->hw.CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
331 p3 = minfo->hw.CRTCEXT[8] = pos >> 21;
332
333 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
334 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0);
335
336 CRITBEGIN
337
338 matroxfb_DAC_lock_irqsave(flags);
339 mga_setr(M_CRTC_INDEX, 0x0D, p0);
340 mga_setr(M_CRTC_INDEX, 0x0C, p1);
341 if (minfo->devflags.support32MB)
342 mga_setr(M_EXTVGA_INDEX, 0x08, p3);
343 if (vbl) {
344 minfo->crtc1.panpos = p2;
345 } else {
346 /* Abort any pending change */
347 minfo->crtc1.panpos = -1;
348 mga_setr(M_EXTVGA_INDEX, 0x00, p2);
349 }
350 matroxfb_DAC_unlock_irqrestore(flags);
351
352 update_crtc2(minfo, pos);
353
354 CRITEND
355 }
356
357 static void matroxfb_remove(struct matrox_fb_info *minfo, int dummy)
358 {
359 /* Currently we are holding big kernel lock on all dead & usecount updates.
360 * Destroy everything after all users release it. Especially do not unregister
361 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
362 * for device unplugged when in use.
363 * In future we should point mmio.vbase & video.vbase somewhere where we can
364 * write data without causing too much damage...
365 */
366
367 minfo->dead = 1;
368 if (minfo->usecount) {
369 /* destroy it later */
370 return;
371 }
372 matroxfb_unregister_device(minfo);
373 unregister_framebuffer(&minfo->fbcon);
374 matroxfb_g450_shutdown(minfo);
375 arch_phys_wc_del(minfo->wc_cookie);
376 iounmap(minfo->mmio.vbase.vaddr);
377 iounmap(minfo->video.vbase.vaddr);
378 release_mem_region(minfo->video.base, minfo->video.len_maximum);
379 release_mem_region(minfo->mmio.base, 16384);
380 kfree(minfo);
381 }
382
383 /*
384 * Open/Release the frame buffer device
385 */
386
387 static int matroxfb_open(struct fb_info *info, int user)
388 {
389 struct matrox_fb_info *minfo = info2minfo(info);
390
391 DBG_LOOP(__func__)
392
393 if (minfo->dead) {
394 return -ENXIO;
395 }
396 minfo->usecount++;
397 if (user) {
398 minfo->userusecount++;
399 }
400 return(0);
401 }
402
403 static int matroxfb_release(struct fb_info *info, int user)
404 {
405 struct matrox_fb_info *minfo = info2minfo(info);
406
407 DBG_LOOP(__func__)
408
409 if (user) {
410 if (0 == --minfo->userusecount) {
411 matroxfb_disable_irq(minfo);
412 }
413 }
414 if (!(--minfo->usecount) && minfo->dead) {
415 matroxfb_remove(minfo, 0);
416 }
417 return(0);
418 }
419
420 static int matroxfb_pan_display(struct fb_var_screeninfo *var,
421 struct fb_info* info) {
422 struct matrox_fb_info *minfo = info2minfo(info);
423
424 DBG(__func__)
425
426 matrox_pan_var(minfo, var);
427 return 0;
428 }
429
430 static int matroxfb_get_final_bppShift(const struct matrox_fb_info *minfo,
431 int bpp)
432 {
433 int bppshft2;
434
435 DBG(__func__)
436
437 bppshft2 = bpp;
438 if (!bppshft2) {
439 return 8;
440 }
441 if (isInterleave(minfo))
442 bppshft2 >>= 1;
443 if (minfo->devflags.video64bits)
444 bppshft2 >>= 1;
445 return bppshft2;
446 }
447
448 static int matroxfb_test_and_set_rounding(const struct matrox_fb_info *minfo,
449 int xres, int bpp)
450 {
451 int over;
452 int rounding;
453
454 DBG(__func__)
455
456 switch (bpp) {
457 case 0: return xres;
458 case 4: rounding = 128;
459 break;
460 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
461 break;
462 case 16: rounding = 32;
463 break;
464 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
465 break;
466 default: rounding = 16;
467 /* on G400, 16 really does not work */
468 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
469 rounding = 32;
470 break;
471 }
472 if (isInterleave(minfo)) {
473 rounding *= 2;
474 }
475 over = xres % rounding;
476 if (over)
477 xres += rounding-over;
478 return xres;
479 }
480
481 static int matroxfb_pitch_adjust(const struct matrox_fb_info *minfo, int xres,
482 int bpp)
483 {
484 const int* width;
485 int xres_new;
486
487 DBG(__func__)
488
489 if (!bpp) return xres;
490
491 width = minfo->capable.vxres;
492
493 if (minfo->devflags.precise_width) {
494 while (*width) {
495 if ((*width >= xres) && (matroxfb_test_and_set_rounding(minfo, *width, bpp) == *width)) {
496 break;
497 }
498 width++;
499 }
500 xres_new = *width;
501 } else {
502 xres_new = matroxfb_test_and_set_rounding(minfo, xres, bpp);
503 }
504 return xres_new;
505 }
506
507 static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
508
509 DBG(__func__)
510
511 switch (var->bits_per_pixel) {
512 case 4:
513 return 16; /* pseudocolor... 16 entries HW palette */
514 case 8:
515 return 256; /* pseudocolor... 256 entries HW palette */
516 case 16:
517 return 16; /* directcolor... 16 entries SW palette */
518 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
519 case 24:
520 return 16; /* directcolor... 16 entries SW palette */
521 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
522 case 32:
523 return 16; /* directcolor... 16 entries SW palette */
524 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
525 }
526 return 16; /* return something reasonable... or panic()? */
527 }
528
529 static int matroxfb_decode_var(const struct matrox_fb_info *minfo,
530 struct fb_var_screeninfo *var, int *visual,
531 int *video_cmap_len, unsigned int* ydstorg)
532 {
533 struct RGBT {
534 unsigned char bpp;
535 struct {
536 unsigned char offset,
537 length;
538 } red,
539 green,
540 blue,
541 transp;
542 signed char visual;
543 };
544 static const struct RGBT table[]= {
545 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
546 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
547 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
548 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
549 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
550 };
551 struct RGBT const *rgbt;
552 unsigned int bpp = var->bits_per_pixel;
553 unsigned int vramlen;
554 unsigned int memlen;
555
556 DBG(__func__)
557
558 switch (bpp) {
559 case 4: if (!minfo->capable.cfb4) return -EINVAL;
560 break;
561 case 8: break;
562 case 16: break;
563 case 24: break;
564 case 32: break;
565 default: return -EINVAL;
566 }
567 *ydstorg = 0;
568 vramlen = minfo->video.len_usable;
569 if (var->yres_virtual < var->yres)
570 var->yres_virtual = var->yres;
571 if (var->xres_virtual < var->xres)
572 var->xres_virtual = var->xres;
573
574 var->xres_virtual = matroxfb_pitch_adjust(minfo, var->xres_virtual, bpp);
575 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
576 if (memlen > vramlen) {
577 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
578 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
579 }
580 /* There is hardware bug that no line can cross 4MB boundary */
581 /* give up for CFB24, it is impossible to easy workaround it */
582 /* for other try to do something */
583 if (!minfo->capable.cross4MB && (memlen > 0x400000)) {
584 if (bpp == 24) {
585 /* sorry */
586 } else {
587 unsigned int linelen;
588 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
589 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
590 unsigned int max_yres;
591
592 while (m1) {
593 while (m2 >= m1) m2 -= m1;
594 swap(m1, m2);
595 }
596 m2 = linelen * PAGE_SIZE / m2;
597 *ydstorg = m2 = 0x400000 % m2;
598 max_yres = (vramlen - m2) / linelen;
599 if (var->yres_virtual > max_yres)
600 var->yres_virtual = max_yres;
601 }
602 }
603 /* YDSTLEN contains only signed 16bit value */
604 if (var->yres_virtual > 32767)
605 var->yres_virtual = 32767;
606 /* we must round yres/xres down, we already rounded y/xres_virtual up
607 if it was possible. We should return -EINVAL, but I disagree */
608 if (var->yres_virtual < var->yres)
609 var->yres = var->yres_virtual;
610 if (var->xres_virtual < var->xres)
611 var->xres = var->xres_virtual;
612 if (var->xoffset + var->xres > var->xres_virtual)
613 var->xoffset = var->xres_virtual - var->xres;
614 if (var->yoffset + var->yres > var->yres_virtual)
615 var->yoffset = var->yres_virtual - var->yres;
616
617 if (bpp == 16 && var->green.length == 5) {
618 bpp--; /* an artificial value - 15 */
619 }
620
621 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
622 #define SETCLR(clr)\
623 var->clr.offset = rgbt->clr.offset;\
624 var->clr.length = rgbt->clr.length
625 SETCLR(red);
626 SETCLR(green);
627 SETCLR(blue);
628 SETCLR(transp);
629 #undef SETCLR
630 *visual = rgbt->visual;
631
632 if (bpp > 8)
633 dprintk("matroxfb: truecolor: "
634 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
635 var->transp.length, var->red.length, var->green.length, var->blue.length,
636 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
637
638 *video_cmap_len = matroxfb_get_cmap_len(var);
639 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
640 var->xres_virtual, var->yres_virtual);
641 return 0;
642 }
643
644 static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
645 unsigned blue, unsigned transp,
646 struct fb_info *fb_info)
647 {
648 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
649
650 DBG(__func__)
651
652 /*
653 * Set a single color register. The values supplied are
654 * already rounded down to the hardware's capabilities
655 * (according to the entries in the `var' structure). Return
656 * != 0 for invalid regno.
657 */
658
659 if (regno >= minfo->curr.cmap_len)
660 return 1;
661
662 if (minfo->fbcon.var.grayscale) {
663 /* gray = 0.30*R + 0.59*G + 0.11*B */
664 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
665 }
666
667 red = CNVT_TOHW(red, minfo->fbcon.var.red.length);
668 green = CNVT_TOHW(green, minfo->fbcon.var.green.length);
669 blue = CNVT_TOHW(blue, minfo->fbcon.var.blue.length);
670 transp = CNVT_TOHW(transp, minfo->fbcon.var.transp.length);
671
672 switch (minfo->fbcon.var.bits_per_pixel) {
673 case 4:
674 case 8:
675 mga_outb(M_DAC_REG, regno);
676 mga_outb(M_DAC_VAL, red);
677 mga_outb(M_DAC_VAL, green);
678 mga_outb(M_DAC_VAL, blue);
679 break;
680 case 16:
681 if (regno >= 16)
682 break;
683 {
684 u_int16_t col =
685 (red << minfo->fbcon.var.red.offset) |
686 (green << minfo->fbcon.var.green.offset) |
687 (blue << minfo->fbcon.var.blue.offset) |
688 (transp << minfo->fbcon.var.transp.offset); /* for 1:5:5:5 */
689 minfo->cmap[regno] = col | (col << 16);
690 }
691 break;
692 case 24:
693 case 32:
694 if (regno >= 16)
695 break;
696 minfo->cmap[regno] =
697 (red << minfo->fbcon.var.red.offset) |
698 (green << minfo->fbcon.var.green.offset) |
699 (blue << minfo->fbcon.var.blue.offset) |
700 (transp << minfo->fbcon.var.transp.offset); /* 8:8:8:8 */
701 break;
702 }
703 return 0;
704 }
705
706 static void matroxfb_init_fix(struct matrox_fb_info *minfo)
707 {
708 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
709 DBG(__func__)
710
711 strcpy(fix->id,"MATROX");
712
713 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
714 fix->ypanstep = 1;
715 fix->ywrapstep = 0;
716 fix->mmio_start = minfo->mmio.base;
717 fix->mmio_len = minfo->mmio.len;
718 fix->accel = minfo->devflags.accelerator;
719 }
720
721 static void matroxfb_update_fix(struct matrox_fb_info *minfo)
722 {
723 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
724 DBG(__func__)
725
726 mutex_lock(&minfo->fbcon.mm_lock);
727 fix->smem_start = minfo->video.base + minfo->curr.ydstorg.bytes;
728 fix->smem_len = minfo->video.len_usable - minfo->curr.ydstorg.bytes;
729 mutex_unlock(&minfo->fbcon.mm_lock);
730 }
731
732 static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
733 {
734 int err;
735 int visual;
736 int cmap_len;
737 unsigned int ydstorg;
738 struct matrox_fb_info *minfo = info2minfo(info);
739
740 if (minfo->dead) {
741 return -ENXIO;
742 }
743 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
744 return err;
745 return 0;
746 }
747
748 static int matroxfb_set_par(struct fb_info *info)
749 {
750 int err;
751 int visual;
752 int cmap_len;
753 unsigned int ydstorg;
754 struct fb_var_screeninfo *var;
755 struct matrox_fb_info *minfo = info2minfo(info);
756
757 DBG(__func__)
758
759 if (minfo->dead) {
760 return -ENXIO;
761 }
762
763 var = &info->var;
764 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
765 return err;
766 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase) + ydstorg;
767 matroxfb_update_fix(minfo);
768 minfo->fbcon.fix.visual = visual;
769 minfo->fbcon.fix.type = FB_TYPE_PACKED_PIXELS;
770 minfo->fbcon.fix.type_aux = 0;
771 minfo->fbcon.fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
772 {
773 unsigned int pos;
774
775 minfo->curr.cmap_len = cmap_len;
776 ydstorg += minfo->devflags.ydstorg;
777 minfo->curr.ydstorg.bytes = ydstorg;
778 minfo->curr.ydstorg.chunks = ydstorg >> (isInterleave(minfo) ? 3 : 2);
779 if (var->bits_per_pixel == 4)
780 minfo->curr.ydstorg.pixels = ydstorg;
781 else
782 minfo->curr.ydstorg.pixels = (ydstorg * 8) / var->bits_per_pixel;
783 minfo->curr.final_bppShift = matroxfb_get_final_bppShift(minfo, var->bits_per_pixel);
784 { struct my_timming mt;
785 struct matrox_hw_state* hw;
786 int out;
787
788 matroxfb_var2my(var, &mt);
789 mt.crtc = MATROXFB_SRC_CRTC1;
790 /* CRTC1 delays */
791 switch (var->bits_per_pixel) {
792 case 0: mt.delay = 31 + 0; break;
793 case 16: mt.delay = 21 + 8; break;
794 case 24: mt.delay = 17 + 8; break;
795 case 32: mt.delay = 16 + 8; break;
796 default: mt.delay = 31 + 8; break;
797 }
798
799 hw = &minfo->hw;
800
801 down_read(&minfo->altout.lock);
802 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
803 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
804 minfo->outputs[out].output->compute) {
805 minfo->outputs[out].output->compute(minfo->outputs[out].data, &mt);
806 }
807 }
808 up_read(&minfo->altout.lock);
809 minfo->crtc1.pixclock = mt.pixclock;
810 minfo->crtc1.mnp = mt.mnp;
811 minfo->hw_switch->init(minfo, &mt);
812 pos = (var->yoffset * var->xres_virtual + var->xoffset) * minfo->curr.final_bppShift / 32;
813 pos += minfo->curr.ydstorg.chunks;
814
815 hw->CRTC[0x0D] = pos & 0xFF;
816 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
817 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
818 hw->CRTCEXT[8] = pos >> 21;
819 minfo->hw_switch->restore(minfo);
820 update_crtc2(minfo, pos);
821 down_read(&minfo->altout.lock);
822 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
823 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
824 minfo->outputs[out].output->program) {
825 minfo->outputs[out].output->program(minfo->outputs[out].data);
826 }
827 }
828 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
829 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
830 minfo->outputs[out].output->start) {
831 minfo->outputs[out].output->start(minfo->outputs[out].data);
832 }
833 }
834 up_read(&minfo->altout.lock);
835 matrox_cfbX_init(minfo);
836 }
837 }
838 minfo->initialized = 1;
839 return 0;
840 }
841
842 static int matroxfb_get_vblank(struct matrox_fb_info *minfo,
843 struct fb_vblank *vblank)
844 {
845 unsigned int sts1;
846
847 matroxfb_enable_irq(minfo, 0);
848 memset(vblank, 0, sizeof(*vblank));
849 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
850 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
851 sts1 = mga_inb(M_INSTS1);
852 vblank->vcount = mga_inl(M_VCOUNT);
853 /* BTW, on my PIII/450 with G400, reading M_INSTS1
854 byte makes this call about 12% slower (1.70 vs. 2.05 us
855 per ioctl()) */
856 if (sts1 & 1)
857 vblank->flags |= FB_VBLANK_HBLANKING;
858 if (sts1 & 8)
859 vblank->flags |= FB_VBLANK_VSYNCING;
860 if (vblank->vcount >= minfo->fbcon.var.yres)
861 vblank->flags |= FB_VBLANK_VBLANKING;
862 if (test_bit(0, &minfo->irq_flags)) {
863 vblank->flags |= FB_VBLANK_HAVE_COUNT;
864 /* Only one writer, aligned int value...
865 it should work without lock and without atomic_t */
866 vblank->count = minfo->crtc1.vsync.cnt;
867 }
868 return 0;
869 }
870
871 static struct matrox_altout panellink_output = {
872 .name = "Panellink output",
873 };
874
875 static int matroxfb_ioctl(struct fb_info *info,
876 unsigned int cmd, unsigned long arg)
877 {
878 void __user *argp = (void __user *)arg;
879 struct matrox_fb_info *minfo = info2minfo(info);
880
881 DBG(__func__)
882
883 if (minfo->dead) {
884 return -ENXIO;
885 }
886
887 switch (cmd) {
888 case FBIOGET_VBLANK:
889 {
890 struct fb_vblank vblank;
891 int err;
892
893 err = matroxfb_get_vblank(minfo, &vblank);
894 if (err)
895 return err;
896 if (copy_to_user(argp, &vblank, sizeof(vblank)))
897 return -EFAULT;
898 return 0;
899 }
900 case FBIO_WAITFORVSYNC:
901 {
902 u_int32_t crt;
903
904 if (get_user(crt, (u_int32_t __user *)arg))
905 return -EFAULT;
906
907 return matroxfb_wait_for_sync(minfo, crt);
908 }
909 case MATROXFB_SET_OUTPUT_MODE:
910 {
911 struct matroxioc_output_mode mom;
912 struct matrox_altout *oproc;
913 int val;
914
915 if (copy_from_user(&mom, argp, sizeof(mom)))
916 return -EFAULT;
917 if (mom.output >= MATROXFB_MAX_OUTPUTS)
918 return -ENXIO;
919 down_read(&minfo->altout.lock);
920 oproc = minfo->outputs[mom.output].output;
921 if (!oproc) {
922 val = -ENXIO;
923 } else if (!oproc->verifymode) {
924 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
925 val = 0;
926 } else {
927 val = -EINVAL;
928 }
929 } else {
930 val = oproc->verifymode(minfo->outputs[mom.output].data, mom.mode);
931 }
932 if (!val) {
933 if (minfo->outputs[mom.output].mode != mom.mode) {
934 minfo->outputs[mom.output].mode = mom.mode;
935 val = 1;
936 }
937 }
938 up_read(&minfo->altout.lock);
939 if (val != 1)
940 return val;
941 switch (minfo->outputs[mom.output].src) {
942 case MATROXFB_SRC_CRTC1:
943 matroxfb_set_par(info);
944 break;
945 case MATROXFB_SRC_CRTC2:
946 {
947 struct matroxfb_dh_fb_info* crtc2;
948
949 down_read(&minfo->crtc2.lock);
950 crtc2 = minfo->crtc2.info;
951 if (crtc2)
952 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
953 up_read(&minfo->crtc2.lock);
954 }
955 break;
956 }
957 return 0;
958 }
959 case MATROXFB_GET_OUTPUT_MODE:
960 {
961 struct matroxioc_output_mode mom;
962 struct matrox_altout *oproc;
963 int val;
964
965 if (copy_from_user(&mom, argp, sizeof(mom)))
966 return -EFAULT;
967 if (mom.output >= MATROXFB_MAX_OUTPUTS)
968 return -ENXIO;
969 down_read(&minfo->altout.lock);
970 oproc = minfo->outputs[mom.output].output;
971 if (!oproc) {
972 val = -ENXIO;
973 } else {
974 mom.mode = minfo->outputs[mom.output].mode;
975 val = 0;
976 }
977 up_read(&minfo->altout.lock);
978 if (val)
979 return val;
980 if (copy_to_user(argp, &mom, sizeof(mom)))
981 return -EFAULT;
982 return 0;
983 }
984 case MATROXFB_SET_OUTPUT_CONNECTION:
985 {
986 u_int32_t tmp;
987 int i;
988 int changes;
989
990 if (copy_from_user(&tmp, argp, sizeof(tmp)))
991 return -EFAULT;
992 for (i = 0; i < 32; i++) {
993 if (tmp & (1 << i)) {
994 if (i >= MATROXFB_MAX_OUTPUTS)
995 return -ENXIO;
996 if (!minfo->outputs[i].output)
997 return -ENXIO;
998 switch (minfo->outputs[i].src) {
999 case MATROXFB_SRC_NONE:
1000 case MATROXFB_SRC_CRTC1:
1001 break;
1002 default:
1003 return -EBUSY;
1004 }
1005 }
1006 }
1007 if (minfo->devflags.panellink) {
1008 if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1009 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1010 return -EINVAL;
1011 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1012 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC2) {
1013 return -EBUSY;
1014 }
1015 }
1016 }
1017 }
1018 changes = 0;
1019 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1020 if (tmp & (1 << i)) {
1021 if (minfo->outputs[i].src != MATROXFB_SRC_CRTC1) {
1022 changes = 1;
1023 minfo->outputs[i].src = MATROXFB_SRC_CRTC1;
1024 }
1025 } else if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1026 changes = 1;
1027 minfo->outputs[i].src = MATROXFB_SRC_NONE;
1028 }
1029 }
1030 if (!changes)
1031 return 0;
1032 matroxfb_set_par(info);
1033 return 0;
1034 }
1035 case MATROXFB_GET_OUTPUT_CONNECTION:
1036 {
1037 u_int32_t conn = 0;
1038 int i;
1039
1040 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1041 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1042 conn |= 1 << i;
1043 }
1044 }
1045 if (put_user(conn, (u_int32_t __user *)arg))
1046 return -EFAULT;
1047 return 0;
1048 }
1049 case MATROXFB_GET_AVAILABLE_OUTPUTS:
1050 {
1051 u_int32_t conn = 0;
1052 int i;
1053
1054 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1055 if (minfo->outputs[i].output) {
1056 switch (minfo->outputs[i].src) {
1057 case MATROXFB_SRC_NONE:
1058 case MATROXFB_SRC_CRTC1:
1059 conn |= 1 << i;
1060 break;
1061 }
1062 }
1063 }
1064 if (minfo->devflags.panellink) {
1065 if (conn & MATROXFB_OUTPUT_CONN_DFP)
1066 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1067 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1068 conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1069 }
1070 if (put_user(conn, (u_int32_t __user *)arg))
1071 return -EFAULT;
1072 return 0;
1073 }
1074 case MATROXFB_GET_ALL_OUTPUTS:
1075 {
1076 u_int32_t conn = 0;
1077 int i;
1078
1079 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1080 if (minfo->outputs[i].output) {
1081 conn |= 1 << i;
1082 }
1083 }
1084 if (put_user(conn, (u_int32_t __user *)arg))
1085 return -EFAULT;
1086 return 0;
1087 }
1088 case VIDIOC_QUERYCAP:
1089 {
1090 struct v4l2_capability r;
1091
1092 memset(&r, 0, sizeof(r));
1093 strcpy(r.driver, "matroxfb");
1094 strcpy(r.card, "Matrox");
1095 sprintf(r.bus_info, "PCI:%s", pci_name(minfo->pcidev));
1096 r.version = KERNEL_VERSION(1,0,0);
1097 r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
1098 if (copy_to_user(argp, &r, sizeof(r)))
1099 return -EFAULT;
1100 return 0;
1101
1102 }
1103 case VIDIOC_QUERYCTRL:
1104 {
1105 struct v4l2_queryctrl qctrl;
1106 int err;
1107
1108 if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
1109 return -EFAULT;
1110
1111 down_read(&minfo->altout.lock);
1112 if (!minfo->outputs[1].output) {
1113 err = -ENXIO;
1114 } else if (minfo->outputs[1].output->getqueryctrl) {
1115 err = minfo->outputs[1].output->getqueryctrl(minfo->outputs[1].data, &qctrl);
1116 } else {
1117 err = -EINVAL;
1118 }
1119 up_read(&minfo->altout.lock);
1120 if (err >= 0 &&
1121 copy_to_user(argp, &qctrl, sizeof(qctrl)))
1122 return -EFAULT;
1123 return err;
1124 }
1125 case VIDIOC_G_CTRL:
1126 {
1127 struct v4l2_control ctrl;
1128 int err;
1129
1130 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1131 return -EFAULT;
1132
1133 down_read(&minfo->altout.lock);
1134 if (!minfo->outputs[1].output) {
1135 err = -ENXIO;
1136 } else if (minfo->outputs[1].output->getctrl) {
1137 err = minfo->outputs[1].output->getctrl(minfo->outputs[1].data, &ctrl);
1138 } else {
1139 err = -EINVAL;
1140 }
1141 up_read(&minfo->altout.lock);
1142 if (err >= 0 &&
1143 copy_to_user(argp, &ctrl, sizeof(ctrl)))
1144 return -EFAULT;
1145 return err;
1146 }
1147 case VIDIOC_S_CTRL:
1148 {
1149 struct v4l2_control ctrl;
1150 int err;
1151
1152 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1153 return -EFAULT;
1154
1155 down_read(&minfo->altout.lock);
1156 if (!minfo->outputs[1].output) {
1157 err = -ENXIO;
1158 } else if (minfo->outputs[1].output->setctrl) {
1159 err = minfo->outputs[1].output->setctrl(minfo->outputs[1].data, &ctrl);
1160 } else {
1161 err = -EINVAL;
1162 }
1163 up_read(&minfo->altout.lock);
1164 return err;
1165 }
1166 }
1167 return -ENOTTY;
1168 }
1169
1170 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1171
1172 static int matroxfb_blank(int blank, struct fb_info *info)
1173 {
1174 int seq;
1175 int crtc;
1176 CRITFLAGS
1177 struct matrox_fb_info *minfo = info2minfo(info);
1178
1179 DBG(__func__)
1180
1181 if (minfo->dead)
1182 return 1;
1183
1184 switch (blank) {
1185 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */
1186 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;
1187 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;
1188 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;
1189 default: seq = 0x00; crtc = 0x00; break;
1190 }
1191
1192 CRITBEGIN
1193
1194 mga_outb(M_SEQ_INDEX, 1);
1195 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1196 mga_outb(M_EXTVGA_INDEX, 1);
1197 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1198
1199 CRITEND
1200 return 0;
1201 }
1202
1203 static const struct fb_ops matroxfb_ops = {
1204 .owner = THIS_MODULE,
1205 .fb_open = matroxfb_open,
1206 .fb_release = matroxfb_release,
1207 __FB_DEFAULT_IOMEM_OPS_RDWR,
1208 .fb_check_var = matroxfb_check_var,
1209 .fb_set_par = matroxfb_set_par,
1210 .fb_setcolreg = matroxfb_setcolreg,
1211 .fb_pan_display =matroxfb_pan_display,
1212 .fb_blank = matroxfb_blank,
1213 .fb_ioctl = matroxfb_ioctl,
1214 /* .fb_fillrect = <set by matrox_cfbX_init>, */
1215 /* .fb_copyarea = <set by matrox_cfbX_init>, */
1216 /* .fb_imageblit = <set by matrox_cfbX_init>, */
1217 /* .fb_cursor = <set by matrox_cfbX_init>, */
1218 __FB_DEFAULT_IOMEM_OPS_MMAP,
1219 };
1220
1221 #define RSDepth(X) (((X) >> 8) & 0x0F)
1222 #define RS8bpp 0x1
1223 #define RS15bpp 0x2
1224 #define RS16bpp 0x3
1225 #define RS32bpp 0x4
1226 #define RS4bpp 0x5
1227 #define RS24bpp 0x6
1228 #define RSText 0x7
1229 #define RSText8 0x8
1230 /* 9-F */
1231 static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1232 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1233 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1234 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1235 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1236 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1237 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1238 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
1239 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
1240 };
1241
1242 /* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
1243 static unsigned int mem; /* "matroxfb:mem:xxxxxM" */
1244 static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
1245 static int inv24; /* "matroxfb:inv24" */
1246 static int cross4MB = -1; /* "matroxfb:cross4MB" */
1247 static int disabled; /* "matroxfb:disabled" */
1248 static int noaccel; /* "matroxfb:noaccel" */
1249 static int nopan; /* "matroxfb:nopan" */
1250 static int no_pci_retry; /* "matroxfb:nopciretry" */
1251 static int novga; /* "matroxfb:novga" */
1252 static int nobios; /* "matroxfb:nobios" */
1253 static int noinit = 1; /* "matroxfb:init" */
1254 static int inverse; /* "matroxfb:inverse" */
1255 static int sgram; /* "matroxfb:sgram" */
1256 static int mtrr = 1; /* "matroxfb:nomtrr" */
1257 static int grayscale; /* "matroxfb:grayscale" */
1258 static int dev = -1; /* "matroxfb:dev:xxxxx" */
1259 static unsigned int vesa = ~0; /* "matroxfb:vesa:xxxxx" */
1260 static int depth = -1; /* "matroxfb:depth:xxxxx" */
1261 static unsigned int xres; /* "matroxfb:xres:xxxxx" */
1262 static unsigned int yres; /* "matroxfb:yres:xxxxx" */
1263 static unsigned int upper = ~0; /* "matroxfb:upper:xxxxx" */
1264 static unsigned int lower = ~0; /* "matroxfb:lower:xxxxx" */
1265 static unsigned int vslen; /* "matroxfb:vslen:xxxxx" */
1266 static unsigned int left = ~0; /* "matroxfb:left:xxxxx" */
1267 static unsigned int right = ~0; /* "matroxfb:right:xxxxx" */
1268 static unsigned int hslen; /* "matroxfb:hslen:xxxxx" */
1269 static unsigned int pixclock; /* "matroxfb:pixclock:xxxxx" */
1270 static int sync = -1; /* "matroxfb:sync:xxxxx" */
1271 static unsigned int fv; /* "matroxfb:fv:xxxxx" */
1272 static unsigned int fh; /* "matroxfb:fh:xxxxxk" */
1273 static unsigned int maxclk; /* "matroxfb:maxclk:xxxxM" */
1274 static int dfp; /* "matroxfb:dfp */
1275 static int dfp_type = -1; /* "matroxfb:dfp:xxx */
1276 static int memtype = -1; /* "matroxfb:memtype:xxx" */
1277 static char outputs[8]; /* "matroxfb:outputs:xxx" */
1278
1279 #ifndef MODULE
1280 static char videomode[64]; /* "matroxfb:mode:xxxxx" or "matroxfb:xxxxx" */
1281 #endif
1282
1283 static int matroxfb_getmemory(struct matrox_fb_info *minfo,
1284 unsigned int maxSize, unsigned int *realSize)
1285 {
1286 vaddr_t vm;
1287 unsigned int offs;
1288 unsigned int offs2;
1289 unsigned char orig;
1290 unsigned char bytes[32];
1291 unsigned char* tmp;
1292
1293 DBG(__func__)
1294
1295 vm = minfo->video.vbase;
1296 maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */
1297 /* at least 2MB */
1298 if (maxSize < 0x0200000) return 0;
1299 if (maxSize > 0x2000000) maxSize = 0x2000000;
1300
1301 mga_outb(M_EXTVGA_INDEX, 0x03);
1302 orig = mga_inb(M_EXTVGA_DATA);
1303 mga_outb(M_EXTVGA_DATA, orig | 0x80);
1304
1305 tmp = bytes;
1306 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1307 *tmp++ = mga_readb(vm, offs);
1308 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1309 mga_writeb(vm, offs, 0x02);
1310 mga_outb(M_CACHEFLUSH, 0x00);
1311 for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
1312 if (mga_readb(vm, offs) != 0x02)
1313 break;
1314 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
1315 if (mga_readb(vm, offs))
1316 break;
1317 }
1318 tmp = bytes;
1319 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
1320 mga_writeb(vm, offs2, *tmp++);
1321
1322 mga_outb(M_EXTVGA_INDEX, 0x03);
1323 mga_outb(M_EXTVGA_DATA, orig);
1324
1325 *realSize = offs - 0x100000;
1326 #ifdef CONFIG_FB_MATROX_MILLENIUM
1327 minfo->interleave = !(!isMillenium(minfo) || ((offs - 0x100000) & 0x3FFFFF));
1328 #endif
1329 return 1;
1330 }
1331
1332 struct video_board {
1333 int maxvram;
1334 int maxdisplayable;
1335 int accelID;
1336 struct matrox_switch* lowlevel;
1337 };
1338 #ifdef CONFIG_FB_MATROX_MILLENIUM
1339 static struct video_board vbMillennium = {
1340 .maxvram = 0x0800000,
1341 .maxdisplayable = 0x0800000,
1342 .accelID = FB_ACCEL_MATROX_MGA2064W,
1343 .lowlevel = &matrox_millennium
1344 };
1345
1346 static struct video_board vbMillennium2 = {
1347 .maxvram = 0x1000000,
1348 .maxdisplayable = 0x0800000,
1349 .accelID = FB_ACCEL_MATROX_MGA2164W,
1350 .lowlevel = &matrox_millennium
1351 };
1352
1353 static struct video_board vbMillennium2A = {
1354 .maxvram = 0x1000000,
1355 .maxdisplayable = 0x0800000,
1356 .accelID = FB_ACCEL_MATROX_MGA2164W_AGP,
1357 .lowlevel = &matrox_millennium
1358 };
1359 #endif /* CONFIG_FB_MATROX_MILLENIUM */
1360 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1361 static struct video_board vbMystique = {
1362 .maxvram = 0x0800000,
1363 .maxdisplayable = 0x0800000,
1364 .accelID = FB_ACCEL_MATROX_MGA1064SG,
1365 .lowlevel = &matrox_mystique
1366 };
1367 #endif /* CONFIG_FB_MATROX_MYSTIQUE */
1368 #ifdef CONFIG_FB_MATROX_G
1369 static struct video_board vbG100 = {
1370 .maxvram = 0x0800000,
1371 .maxdisplayable = 0x0800000,
1372 .accelID = FB_ACCEL_MATROX_MGAG100,
1373 .lowlevel = &matrox_G100
1374 };
1375
1376 static struct video_board vbG200 = {
1377 .maxvram = 0x1000000,
1378 .maxdisplayable = 0x1000000,
1379 .accelID = FB_ACCEL_MATROX_MGAG200,
1380 .lowlevel = &matrox_G100
1381 };
1382 static struct video_board vbG200eW = {
1383 .maxvram = 0x1000000,
1384 .maxdisplayable = 0x0800000,
1385 .accelID = FB_ACCEL_MATROX_MGAG200,
1386 .lowlevel = &matrox_G100
1387 };
1388 /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
1389 whole 32MB */
1390 static struct video_board vbG400 = {
1391 .maxvram = 0x2000000,
1392 .maxdisplayable = 0x1000000,
1393 .accelID = FB_ACCEL_MATROX_MGAG400,
1394 .lowlevel = &matrox_G100
1395 };
1396 #endif
1397
1398 #define DEVF_VIDEO64BIT 0x0001
1399 #define DEVF_SWAPS 0x0002
1400 #define DEVF_SRCORG 0x0004
1401 #define DEVF_DUALHEAD 0x0008
1402 #define DEVF_CROSS4MB 0x0010
1403 #define DEVF_TEXT4B 0x0020
1404 /* #define DEVF_recycled 0x0040 */
1405 /* #define DEVF_recycled 0x0080 */
1406 #define DEVF_SUPPORT32MB 0x0100
1407 #define DEVF_ANY_VXRES 0x0200
1408 #define DEVF_TEXT16B 0x0400
1409 #define DEVF_CRTC2 0x0800
1410 #define DEVF_MAVEN_CAPABLE 0x1000
1411 #define DEVF_PANELLINK_CAPABLE 0x2000
1412 #define DEVF_G450DAC 0x4000
1413
1414 #define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB)
1415 #define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD)
1416 #define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */
1417 #define DEVF_G200 (DEVF_G2CORE)
1418 #define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2)
1419 /* if you'll find how to drive DFP... */
1420 #define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD)
1421 #define DEVF_G550 (DEVF_G450)
1422
1423 static struct board {
1424 unsigned short vendor, device, rev, svid, sid;
1425 unsigned int flags;
1426 unsigned int maxclk;
1427 enum mga_chip chip;
1428 struct video_board* base;
1429 const char* name;
1430 } dev_list[] = {
1431 #ifdef CONFIG_FB_MATROX_MILLENIUM
1432 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
1433 0, 0,
1434 DEVF_TEXT4B,
1435 230000,
1436 MGA_2064,
1437 &vbMillennium,
1438 "Millennium (PCI)"},
1439 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
1440 0, 0,
1441 DEVF_SWAPS,
1442 220000,
1443 MGA_2164,
1444 &vbMillennium2,
1445 "Millennium II (PCI)"},
1446 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
1447 0, 0,
1448 DEVF_SWAPS,
1449 250000,
1450 MGA_2164,
1451 &vbMillennium2A,
1452 "Millennium II (AGP)"},
1453 #endif
1454 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1455 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
1456 0, 0,
1457 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1458 180000,
1459 MGA_1064,
1460 &vbMystique,
1461 "Mystique (PCI)"},
1462 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
1463 0, 0,
1464 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1465 220000,
1466 MGA_1164,
1467 &vbMystique,
1468 "Mystique 220 (PCI)"},
1469 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0x02,
1470 0, 0,
1471 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1472 180000,
1473 MGA_1064,
1474 &vbMystique,
1475 "Mystique (AGP)"},
1476 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0xFF,
1477 0, 0,
1478 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1479 220000,
1480 MGA_1164,
1481 &vbMystique,
1482 "Mystique 220 (AGP)"},
1483 #endif
1484 #ifdef CONFIG_FB_MATROX_G
1485 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
1486 0, 0,
1487 DEVF_G100,
1488 230000,
1489 MGA_G100,
1490 &vbG100,
1491 "MGA-G100 (PCI)"},
1492 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
1493 0, 0,
1494 DEVF_G100,
1495 230000,
1496 MGA_G100,
1497 &vbG100,
1498 "MGA-G100 (AGP)"},
1499 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
1500 0, 0,
1501 DEVF_G200,
1502 250000,
1503 MGA_G200,
1504 &vbG200,
1505 "MGA-G200 (PCI)"},
1506 {PCI_VENDOR_ID_MATROX, 0x0532, 0xFF,
1507 0, 0,
1508 DEVF_G200,
1509 250000,
1510 MGA_G200,
1511 &vbG200eW,
1512 "MGA-G200eW (PCI)"},
1513 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1514 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
1515 DEVF_G200,
1516 220000,
1517 MGA_G200,
1518 &vbG200,
1519 "MGA-G200 (AGP)"},
1520 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1521 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
1522 DEVF_G200,
1523 230000,
1524 MGA_G200,
1525 &vbG200,
1526 "Mystique G200 (AGP)"},
1527 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1528 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
1529 DEVF_G200,
1530 250000,
1531 MGA_G200,
1532 &vbG200,
1533 "Millennium G200 (AGP)"},
1534 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1535 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
1536 DEVF_G200,
1537 230000,
1538 MGA_G200,
1539 &vbG200,
1540 "Marvel G200 (AGP)"},
1541 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1542 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
1543 DEVF_G200,
1544 230000,
1545 MGA_G200,
1546 &vbG200,
1547 "MGA-G200 (AGP)"},
1548 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1549 0, 0,
1550 DEVF_G200,
1551 230000,
1552 MGA_G200,
1553 &vbG200,
1554 "G200 (AGP)"},
1555 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1556 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
1557 DEVF_G400,
1558 360000,
1559 MGA_G400,
1560 &vbG400,
1561 "Millennium G400 MAX (AGP)"},
1562 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1563 0, 0,
1564 DEVF_G400,
1565 300000,
1566 MGA_G400,
1567 &vbG400,
1568 "G400 (AGP)"},
1569 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
1570 0, 0,
1571 DEVF_G450,
1572 360000,
1573 MGA_G450,
1574 &vbG400,
1575 "G450"},
1576 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
1577 0, 0,
1578 DEVF_G550,
1579 360000,
1580 MGA_G550,
1581 &vbG400,
1582 "G550"},
1583 #endif
1584 {0, 0, 0xFF,
1585 0, 0,
1586 0,
1587 0,
1588 0,
1589 NULL,
1590 NULL}};
1591
1592 #ifndef MODULE
1593 static const struct fb_videomode defaultmode = {
1594 /* 640x480 @ 60Hz, 31.5 kHz */
1595 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
1596 0, FB_VMODE_NONINTERLACED
1597 };
1598
1599 static int hotplug = 0;
1600 #endif /* !MODULE */
1601
1602 static void setDefaultOutputs(struct matrox_fb_info *minfo)
1603 {
1604 unsigned int i;
1605 const char* ptr;
1606
1607 minfo->outputs[0].default_src = MATROXFB_SRC_CRTC1;
1608 if (minfo->devflags.g450dac) {
1609 minfo->outputs[1].default_src = MATROXFB_SRC_CRTC1;
1610 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1;
1611 } else if (dfp) {
1612 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1;
1613 }
1614 ptr = outputs;
1615 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1616 char c = *ptr++;
1617
1618 if (c == 0) {
1619 break;
1620 }
1621 if (c == '0') {
1622 minfo->outputs[i].default_src = MATROXFB_SRC_NONE;
1623 } else if (c == '1') {
1624 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC1;
1625 } else if (c == '2' && minfo->devflags.crtc2) {
1626 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC2;
1627 } else {
1628 printk(KERN_ERR "matroxfb: Unknown outputs setting\n");
1629 break;
1630 }
1631 }
1632 /* Nullify this option for subsequent adapters */
1633 outputs[0] = 0;
1634 }
1635
1636 static int initMatrox2(struct matrox_fb_info *minfo, struct board *b)
1637 {
1638 unsigned long ctrlptr_phys = 0;
1639 unsigned long video_base_phys = 0;
1640 unsigned int memsize;
1641 int err;
1642
1643 static const struct pci_device_id intel_82437[] = {
1644 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) },
1645 { },
1646 };
1647
1648 DBG(__func__)
1649
1650 /* set default values... */
1651 vesafb_defined.accel_flags = FB_ACCELF_TEXT;
1652
1653 minfo->hw_switch = b->base->lowlevel;
1654 minfo->devflags.accelerator = b->base->accelID;
1655 minfo->max_pixel_clock = b->maxclk;
1656
1657 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
1658 minfo->capable.plnwt = 1;
1659 minfo->chip = b->chip;
1660 minfo->capable.srcorg = b->flags & DEVF_SRCORG;
1661 minfo->devflags.video64bits = b->flags & DEVF_VIDEO64BIT;
1662 if (b->flags & DEVF_TEXT4B) {
1663 minfo->devflags.vgastep = 4;
1664 minfo->devflags.textmode = 4;
1665 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16;
1666 } else if (b->flags & DEVF_TEXT16B) {
1667 minfo->devflags.vgastep = 16;
1668 minfo->devflags.textmode = 1;
1669 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16;
1670 } else {
1671 minfo->devflags.vgastep = 8;
1672 minfo->devflags.textmode = 1;
1673 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP8;
1674 }
1675 minfo->devflags.support32MB = (b->flags & DEVF_SUPPORT32MB) != 0;
1676 minfo->devflags.precise_width = !(b->flags & DEVF_ANY_VXRES);
1677 minfo->devflags.crtc2 = (b->flags & DEVF_CRTC2) != 0;
1678 minfo->devflags.maven_capable = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
1679 minfo->devflags.dualhead = (b->flags & DEVF_DUALHEAD) != 0;
1680 minfo->devflags.dfp_type = dfp_type;
1681 minfo->devflags.g450dac = (b->flags & DEVF_G450DAC) != 0;
1682 minfo->devflags.textstep = minfo->devflags.vgastep * minfo->devflags.textmode;
1683 minfo->devflags.textvram = 65536 / minfo->devflags.textmode;
1684 setDefaultOutputs(minfo);
1685 if (b->flags & DEVF_PANELLINK_CAPABLE) {
1686 minfo->outputs[2].data = minfo;
1687 minfo->outputs[2].output = &panellink_output;
1688 minfo->outputs[2].src = minfo->outputs[2].default_src;
1689 minfo->outputs[2].mode = MATROXFB_OUTPUT_MODE_MONITOR;
1690 minfo->devflags.panellink = 1;
1691 }
1692
1693 if (minfo->capable.cross4MB < 0)
1694 minfo->capable.cross4MB = b->flags & DEVF_CROSS4MB;
1695 if (b->flags & DEVF_SWAPS) {
1696 ctrlptr_phys = pci_resource_start(minfo->pcidev, 1);
1697 video_base_phys = pci_resource_start(minfo->pcidev, 0);
1698 minfo->devflags.fbResource = PCI_BASE_ADDRESS_0;
1699 } else {
1700 ctrlptr_phys = pci_resource_start(minfo->pcidev, 0);
1701 video_base_phys = pci_resource_start(minfo->pcidev, 1);
1702 minfo->devflags.fbResource = PCI_BASE_ADDRESS_1;
1703 }
1704 err = -EINVAL;
1705 if (!ctrlptr_phys) {
1706 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
1707 goto fail;
1708 }
1709 if (!video_base_phys) {
1710 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
1711 goto fail;
1712 }
1713 memsize = b->base->maxvram;
1714 if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
1715 goto fail;
1716 }
1717 if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
1718 goto failCtrlMR;
1719 }
1720 minfo->video.len_maximum = memsize;
1721 /* convert mem (autodetect k, M) */
1722 if (mem < 1024) mem *= 1024;
1723 if (mem < 0x00100000) mem *= 1024;
1724
1725 if (mem && (mem < memsize))
1726 memsize = mem;
1727 err = -ENOMEM;
1728
1729 minfo->mmio.vbase.vaddr = ioremap(ctrlptr_phys, 16384);
1730 if (!minfo->mmio.vbase.vaddr) {
1731 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
1732 goto failVideoMR;
1733 }
1734 minfo->mmio.base = ctrlptr_phys;
1735 minfo->mmio.len = 16384;
1736 minfo->video.base = video_base_phys;
1737 minfo->video.vbase.vaddr = ioremap_wc(video_base_phys, memsize);
1738 if (!minfo->video.vbase.vaddr) {
1739 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
1740 video_base_phys, memsize);
1741 goto failCtrlIO;
1742 }
1743 {
1744 u_int32_t cmd;
1745 u_int32_t mga_option;
1746
1747 pci_read_config_dword(minfo->pcidev, PCI_OPTION_REG, &mga_option);
1748 pci_read_config_dword(minfo->pcidev, PCI_COMMAND, &cmd);
1749 mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */
1750 mga_option |= MX_OPTION_BSWAP;
1751 /* disable palette snooping */
1752 cmd &= ~PCI_COMMAND_VGA_PALETTE;
1753 if (pci_dev_present(intel_82437)) {
1754 if (!(mga_option & 0x20000000) && !minfo->devflags.nopciretry) {
1755 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
1756 }
1757 mga_option |= 0x20000000;
1758 minfo->devflags.nopciretry = 1;
1759 }
1760 pci_write_config_dword(minfo->pcidev, PCI_COMMAND, cmd);
1761 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, mga_option);
1762 minfo->hw.MXoptionReg = mga_option;
1763
1764 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
1765 /* maybe preinit() candidate, but it is same... for all devices... at this time... */
1766 pci_write_config_dword(minfo->pcidev, PCI_MGA_INDEX, 0x00003C00);
1767 }
1768
1769 err = -ENXIO;
1770 matroxfb_read_pins(minfo);
1771 if (minfo->hw_switch->preinit(minfo)) {
1772 goto failVideoIO;
1773 }
1774
1775 err = -ENOMEM;
1776 if (!matroxfb_getmemory(minfo, memsize, &minfo->video.len) || !minfo->video.len) {
1777 printk(KERN_ERR "matroxfb: cannot determine memory size\n");
1778 goto failVideoIO;
1779 }
1780 minfo->devflags.ydstorg = 0;
1781
1782 minfo->video.base = video_base_phys;
1783 minfo->video.len_usable = minfo->video.len;
1784 if (minfo->video.len_usable > b->base->maxdisplayable)
1785 minfo->video.len_usable = b->base->maxdisplayable;
1786 if (mtrr)
1787 minfo->wc_cookie = arch_phys_wc_add(video_base_phys,
1788 minfo->video.len);
1789
1790 if (!minfo->devflags.novga)
1791 request_region(0x3C0, 32, "matrox");
1792 matroxfb_g450_connect(minfo);
1793 minfo->hw_switch->reset(minfo);
1794
1795 minfo->fbcon.monspecs.hfmin = 0;
1796 minfo->fbcon.monspecs.hfmax = fh;
1797 minfo->fbcon.monspecs.vfmin = 0;
1798 minfo->fbcon.monspecs.vfmax = fv;
1799 minfo->fbcon.monspecs.dpms = 0; /* TBD */
1800
1801 /* static settings */
1802 vesafb_defined.red = colors[depth-1].red;
1803 vesafb_defined.green = colors[depth-1].green;
1804 vesafb_defined.blue = colors[depth-1].blue;
1805 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
1806 vesafb_defined.grayscale = grayscale;
1807 vesafb_defined.vmode = 0;
1808 if (noaccel)
1809 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
1810
1811 minfo->fbops = matroxfb_ops;
1812 minfo->fbcon.fbops = &minfo->fbops;
1813 minfo->fbcon.pseudo_palette = minfo->cmap;
1814 minfo->fbcon.flags = FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */
1815 FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */
1816 FBINFO_HWACCEL_FILLRECT | /* And fillrect */
1817 FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */
1818 FBINFO_HWACCEL_XPAN | /* And we support both horizontal */
1819 FBINFO_HWACCEL_YPAN | /* And vertical panning */
1820 FBINFO_READS_FAST;
1821 minfo->video.len_usable &= PAGE_MASK;
1822 fb_alloc_cmap(&minfo->fbcon.cmap, 256, 1);
1823
1824 #ifndef MODULE
1825 /* mode database is marked __init!!! */
1826 if (!hotplug) {
1827 fb_find_mode(&vesafb_defined, &minfo->fbcon, videomode[0] ? videomode : NULL,
1828 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
1829 }
1830 #endif /* !MODULE */
1831
1832 /* mode modifiers */
1833 if (hslen)
1834 vesafb_defined.hsync_len = hslen;
1835 if (vslen)
1836 vesafb_defined.vsync_len = vslen;
1837 if (left != ~0)
1838 vesafb_defined.left_margin = left;
1839 if (right != ~0)
1840 vesafb_defined.right_margin = right;
1841 if (upper != ~0)
1842 vesafb_defined.upper_margin = upper;
1843 if (lower != ~0)
1844 vesafb_defined.lower_margin = lower;
1845 if (xres)
1846 vesafb_defined.xres = xres;
1847 if (yres)
1848 vesafb_defined.yres = yres;
1849 if (sync != -1)
1850 vesafb_defined.sync = sync;
1851 else if (vesafb_defined.sync == ~0) {
1852 vesafb_defined.sync = 0;
1853 if (yres < 400)
1854 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT;
1855 else if (yres < 480)
1856 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT;
1857 }
1858
1859 /* fv, fh, maxclk limits was specified */
1860 {
1861 unsigned int tmp;
1862
1863 if (fv) {
1864 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
1865 + vesafb_defined.lower_margin + vesafb_defined.vsync_len);
1866 if ((tmp < fh) || (fh == 0)) fh = tmp;
1867 }
1868 if (fh) {
1869 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
1870 + vesafb_defined.right_margin + vesafb_defined.hsync_len);
1871 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp;
1872 }
1873 tmp = (maxclk + 499) / 500;
1874 if (tmp) {
1875 tmp = (2000000000 + tmp) / tmp;
1876 if (tmp > pixclock) pixclock = tmp;
1877 }
1878 }
1879 if (pixclock) {
1880 if (pixclock < 2000) /* > 500MHz */
1881 pixclock = 4000; /* 250MHz */
1882 if (pixclock > 1000000)
1883 pixclock = 1000000; /* 1MHz */
1884 vesafb_defined.pixclock = pixclock;
1885 }
1886
1887 /* FIXME: Where to move this?! */
1888 #if defined(CONFIG_PPC_PMAC)
1889 #ifndef MODULE
1890 if (machine_is(powermac)) {
1891 struct fb_var_screeninfo var;
1892
1893 if (default_vmode <= 0 || default_vmode > VMODE_MAX)
1894 default_vmode = VMODE_640_480_60;
1895 #if defined(CONFIG_PPC32)
1896 if (IS_REACHABLE(CONFIG_NVRAM) && default_cmode == CMODE_NVRAM)
1897 default_cmode = nvram_read_byte(NV_CMODE);
1898 #endif
1899 if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
1900 default_cmode = CMODE_8;
1901 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
1902 var.accel_flags = vesafb_defined.accel_flags;
1903 var.xoffset = var.yoffset = 0;
1904 /* Note: mac_vmode_to_var() does not set all parameters */
1905 vesafb_defined = var;
1906 }
1907 }
1908 #endif /* !MODULE */
1909 #endif /* CONFIG_PPC_PMAC */
1910 vesafb_defined.xres_virtual = vesafb_defined.xres;
1911 if (nopan) {
1912 vesafb_defined.yres_virtual = vesafb_defined.yres;
1913 } else {
1914 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
1915 to yres_virtual * xres_virtual < 2^32 */
1916 }
1917 matroxfb_init_fix(minfo);
1918 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase);
1919 /* Normalize values (namely yres_virtual) */
1920 matroxfb_check_var(&vesafb_defined, &minfo->fbcon);
1921 /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over
1922 * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var,
1923 * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work
1924 * anyway. But we at least tried... */
1925 minfo->fbcon.var = vesafb_defined;
1926 err = -EINVAL;
1927
1928 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
1929 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
1930 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
1931 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
1932 minfo->video.base, vaddr_va(minfo->video.vbase), minfo->video.len);
1933
1934 /* We do not have to set currcon to 0... register_framebuffer do it for us on first console
1935 * and we do not want currcon == 0 for subsequent framebuffers */
1936
1937 minfo->fbcon.device = &minfo->pcidev->dev;
1938 if (register_framebuffer(&minfo->fbcon) < 0) {
1939 goto failVideoIO;
1940 }
1941 fb_info(&minfo->fbcon, "%s frame buffer device\n", minfo->fbcon.fix.id);
1942
1943 /* there is no console on this fb... but we have to initialize hardware
1944 * until someone tells me what is proper thing to do */
1945 if (!minfo->initialized) {
1946 fb_info(&minfo->fbcon, "initializing hardware\n");
1947 /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var
1948 * already before, so register_framebuffer works correctly. */
1949 vesafb_defined.activate |= FB_ACTIVATE_FORCE;
1950 fb_set_var(&minfo->fbcon, &vesafb_defined);
1951 }
1952
1953 return 0;
1954 failVideoIO:;
1955 matroxfb_g450_shutdown(minfo);
1956 iounmap(minfo->video.vbase.vaddr);
1957 failCtrlIO:;
1958 iounmap(minfo->mmio.vbase.vaddr);
1959 failVideoMR:;
1960 release_mem_region(video_base_phys, minfo->video.len_maximum);
1961 failCtrlMR:;
1962 release_mem_region(ctrlptr_phys, 16384);
1963 fail:;
1964 return err;
1965 }
1966
1967 static LIST_HEAD(matroxfb_list);
1968 static LIST_HEAD(matroxfb_driver_list);
1969
1970 #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
1971 #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
1972 int matroxfb_register_driver(struct matroxfb_driver* drv) {
1973 struct matrox_fb_info* minfo;
1974
1975 list_add(&drv->node, &matroxfb_driver_list);
1976 list_for_each_entry(minfo, &matroxfb_list, next_fb) {
1977 void* p;
1978
1979 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
1980 continue;
1981 p = drv->probe(minfo);
1982 if (p) {
1983 minfo->drivers_data[minfo->drivers_count] = p;
1984 minfo->drivers[minfo->drivers_count++] = drv;
1985 }
1986 }
1987 return 0;
1988 }
1989
1990 void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
1991 struct matrox_fb_info* minfo;
1992
1993 list_del(&drv->node);
1994 list_for_each_entry(minfo, &matroxfb_list, next_fb) {
1995 int i;
1996
1997 for (i = 0; i < minfo->drivers_count; ) {
1998 if (minfo->drivers[i] == drv) {
1999 if (drv && drv->remove)
2000 drv->remove(minfo, minfo->drivers_data[i]);
2001 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
2002 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
2003 } else
2004 i++;
2005 }
2006 }
2007 }
2008
2009 static void matroxfb_register_device(struct matrox_fb_info* minfo) {
2010 struct matroxfb_driver* drv;
2011 int i = 0;
2012 list_add(&minfo->next_fb, &matroxfb_list);
2013 for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
2014 drv != matroxfb_driver_l(&matroxfb_driver_list);
2015 drv = matroxfb_driver_l(drv->node.next)) {
2016 if (drv->probe) {
2017 void *p = drv->probe(minfo);
2018 if (p) {
2019 minfo->drivers_data[i] = p;
2020 minfo->drivers[i++] = drv;
2021 if (i == MATROXFB_MAX_FB_DRIVERS)
2022 break;
2023 }
2024 }
2025 }
2026 minfo->drivers_count = i;
2027 }
2028
2029 static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
2030 int i;
2031
2032 list_del(&minfo->next_fb);
2033 for (i = 0; i < minfo->drivers_count; i++) {
2034 struct matroxfb_driver* drv = minfo->drivers[i];
2035
2036 if (drv && drv->remove)
2037 drv->remove(minfo, minfo->drivers_data[i]);
2038 }
2039 }
2040
2041 static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
2042 struct board* b;
2043 u_int16_t svid;
2044 u_int16_t sid;
2045 struct matrox_fb_info* minfo;
2046 int err;
2047 u_int32_t cmd;
2048 DBG(__func__)
2049
2050 err = aperture_remove_conflicting_pci_devices(pdev, "matroxfb");
2051 if (err)
2052 return err;
2053
2054 svid = pdev->subsystem_vendor;
2055 sid = pdev->subsystem_device;
2056 for (b = dev_list; b->vendor; b++) {
2057 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < pdev->revision)) continue;
2058 if (b->svid)
2059 if ((b->svid != svid) || (b->sid != sid)) continue;
2060 break;
2061 }
2062 /* not match... */
2063 if (!b->vendor)
2064 return -ENODEV;
2065 if (dev > 0) {
2066 /* not requested one... */
2067 dev--;
2068 return -ENODEV;
2069 }
2070 pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
2071 if (pci_enable_device(pdev)) {
2072 return -1;
2073 }
2074
2075 minfo = kzalloc(sizeof(*minfo), GFP_KERNEL);
2076 if (!minfo)
2077 return -ENOMEM;
2078
2079 minfo->pcidev = pdev;
2080 minfo->dead = 0;
2081 minfo->usecount = 0;
2082 minfo->userusecount = 0;
2083
2084 pci_set_drvdata(pdev, minfo);
2085 /* DEVFLAGS */
2086 minfo->devflags.memtype = memtype;
2087 if (memtype != -1)
2088 noinit = 0;
2089 if (cmd & PCI_COMMAND_MEMORY) {
2090 minfo->devflags.novga = novga;
2091 minfo->devflags.nobios = nobios;
2092 minfo->devflags.noinit = noinit;
2093 /* subsequent heads always needs initialization and must not enable BIOS */
2094 novga = 1;
2095 nobios = 1;
2096 noinit = 0;
2097 } else {
2098 minfo->devflags.novga = 1;
2099 minfo->devflags.nobios = 1;
2100 minfo->devflags.noinit = 0;
2101 }
2102
2103 minfo->devflags.nopciretry = no_pci_retry;
2104 minfo->devflags.mga_24bpp_fix = inv24;
2105 minfo->devflags.precise_width = option_precise_width;
2106 minfo->devflags.sgram = sgram;
2107 minfo->capable.cross4MB = cross4MB;
2108
2109 spin_lock_init(&minfo->lock.DAC);
2110 spin_lock_init(&minfo->lock.accel);
2111 init_rwsem(&minfo->crtc2.lock);
2112 init_rwsem(&minfo->altout.lock);
2113 mutex_init(&minfo->fbcon.mm_lock);
2114 minfo->irq_flags = 0;
2115 init_waitqueue_head(&minfo->crtc1.vsync.wait);
2116 init_waitqueue_head(&minfo->crtc2.vsync.wait);
2117 minfo->crtc1.panpos = -1;
2118
2119 err = initMatrox2(minfo, b);
2120 if (!err) {
2121 matroxfb_register_device(minfo);
2122 return 0;
2123 }
2124 kfree(minfo);
2125 return -1;
2126 }
2127
2128 static void pci_remove_matrox(struct pci_dev* pdev) {
2129 struct matrox_fb_info* minfo;
2130
2131 minfo = pci_get_drvdata(pdev);
2132 matroxfb_remove(minfo, 1);
2133 }
2134
2135 static const struct pci_device_id matroxfb_devices[] = {
2136 #ifdef CONFIG_FB_MATROX_MILLENIUM
2137 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
2138 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2139 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
2140 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2141 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
2142 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2143 #endif
2144 #ifdef CONFIG_FB_MATROX_MYSTIQUE
2145 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
2146 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2147 #endif
2148 #ifdef CONFIG_FB_MATROX_G
2149 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
2150 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2151 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
2152 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2153 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
2154 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2155 {PCI_VENDOR_ID_MATROX, 0x0532,
2156 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2157 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
2158 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2159 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
2160 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2161 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
2162 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2163 #endif
2164 {0, 0,
2165 0, 0, 0, 0, 0}
2166 };
2167
2168 MODULE_DEVICE_TABLE(pci, matroxfb_devices);
2169
2170
2171 static struct pci_driver matroxfb_driver = {
2172 .name = "matroxfb",
2173 .id_table = matroxfb_devices,
2174 .probe = matroxfb_probe,
2175 .remove = pci_remove_matrox,
2176 };
2177
2178 /* **************************** init-time only **************************** */
2179
2180 #define RSResolution(X) ((X) & 0x0F)
2181 #define RS640x400 1
2182 #define RS640x480 2
2183 #define RS800x600 3
2184 #define RS1024x768 4
2185 #define RS1280x1024 5
2186 #define RS1600x1200 6
2187 #define RS768x576 7
2188 #define RS960x720 8
2189 #define RS1152x864 9
2190 #define RS1408x1056 10
2191 #define RS640x350 11
2192 #define RS1056x344 12 /* 132 x 43 text */
2193 #define RS1056x400 13 /* 132 x 50 text */
2194 #define RS1056x480 14 /* 132 x 60 text */
2195 #define RSNoxNo 15
2196 /* 10-FF */
2197 static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
2198 { 640, 400, 48, 16, 39, 8, 96, 2, 70 },
2199 { 640, 480, 48, 16, 33, 10, 96, 2, 60 },
2200 { 800, 600, 144, 24, 28, 8, 112, 6, 60 },
2201 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
2202 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
2203 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
2204 { 768, 576, 144, 16, 28, 6, 112, 4, 60 },
2205 { 960, 720, 144, 24, 28, 8, 112, 4, 60 },
2206 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
2207 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
2208 { 640, 350, 48, 16, 39, 8, 96, 2, 70 },
2209 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
2210 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
2211 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
2212 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
2213 };
2214
2215 #define RSCreate(X,Y) ((X) | ((Y) << 8))
2216 static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
2217 /* default must be first */
2218 { ~0, RSCreate(RSNoxNo, RS8bpp ) },
2219 { 0x101, RSCreate(RS640x480, RS8bpp ) },
2220 { 0x100, RSCreate(RS640x400, RS8bpp ) },
2221 { 0x180, RSCreate(RS768x576, RS8bpp ) },
2222 { 0x103, RSCreate(RS800x600, RS8bpp ) },
2223 { 0x188, RSCreate(RS960x720, RS8bpp ) },
2224 { 0x105, RSCreate(RS1024x768, RS8bpp ) },
2225 { 0x190, RSCreate(RS1152x864, RS8bpp ) },
2226 { 0x107, RSCreate(RS1280x1024, RS8bpp ) },
2227 { 0x198, RSCreate(RS1408x1056, RS8bpp ) },
2228 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
2229 { 0x110, RSCreate(RS640x480, RS15bpp) },
2230 { 0x181, RSCreate(RS768x576, RS15bpp) },
2231 { 0x113, RSCreate(RS800x600, RS15bpp) },
2232 { 0x189, RSCreate(RS960x720, RS15bpp) },
2233 { 0x116, RSCreate(RS1024x768, RS15bpp) },
2234 { 0x191, RSCreate(RS1152x864, RS15bpp) },
2235 { 0x119, RSCreate(RS1280x1024, RS15bpp) },
2236 { 0x199, RSCreate(RS1408x1056, RS15bpp) },
2237 { 0x11D, RSCreate(RS1600x1200, RS15bpp) },
2238 { 0x111, RSCreate(RS640x480, RS16bpp) },
2239 { 0x182, RSCreate(RS768x576, RS16bpp) },
2240 { 0x114, RSCreate(RS800x600, RS16bpp) },
2241 { 0x18A, RSCreate(RS960x720, RS16bpp) },
2242 { 0x117, RSCreate(RS1024x768, RS16bpp) },
2243 { 0x192, RSCreate(RS1152x864, RS16bpp) },
2244 { 0x11A, RSCreate(RS1280x1024, RS16bpp) },
2245 { 0x19A, RSCreate(RS1408x1056, RS16bpp) },
2246 { 0x11E, RSCreate(RS1600x1200, RS16bpp) },
2247 { 0x1B2, RSCreate(RS640x480, RS24bpp) },
2248 { 0x184, RSCreate(RS768x576, RS24bpp) },
2249 { 0x1B5, RSCreate(RS800x600, RS24bpp) },
2250 { 0x18C, RSCreate(RS960x720, RS24bpp) },
2251 { 0x1B8, RSCreate(RS1024x768, RS24bpp) },
2252 { 0x194, RSCreate(RS1152x864, RS24bpp) },
2253 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
2254 { 0x19C, RSCreate(RS1408x1056, RS24bpp) },
2255 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
2256 { 0x112, RSCreate(RS640x480, RS32bpp) },
2257 { 0x183, RSCreate(RS768x576, RS32bpp) },
2258 { 0x115, RSCreate(RS800x600, RS32bpp) },
2259 { 0x18B, RSCreate(RS960x720, RS32bpp) },
2260 { 0x118, RSCreate(RS1024x768, RS32bpp) },
2261 { 0x193, RSCreate(RS1152x864, RS32bpp) },
2262 { 0x11B, RSCreate(RS1280x1024, RS32bpp) },
2263 { 0x19B, RSCreate(RS1408x1056, RS32bpp) },
2264 { 0x11F, RSCreate(RS1600x1200, RS32bpp) },
2265 { 0x010, RSCreate(RS640x350, RS4bpp ) },
2266 { 0x012, RSCreate(RS640x480, RS4bpp ) },
2267 { 0x102, RSCreate(RS800x600, RS4bpp ) },
2268 { 0x104, RSCreate(RS1024x768, RS4bpp ) },
2269 { 0x106, RSCreate(RS1280x1024, RS4bpp ) },
2270 { 0, 0 }};
2271
2272 static void __init matroxfb_init_params(void) {
2273 /* fh from kHz to Hz */
2274 if (fh < 1000)
2275 fh *= 1000; /* 1kHz minimum */
2276 /* maxclk */
2277 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */
2278 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */
2279 /* fix VESA number */
2280 if (vesa != ~0)
2281 vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */
2282
2283 /* static settings */
2284 for (RSptr = vesamap; RSptr->vesa; RSptr++) {
2285 if (RSptr->vesa == vesa) break;
2286 }
2287 if (!RSptr->vesa) {
2288 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
2289 RSptr = vesamap;
2290 }
2291 {
2292 int res = RSResolution(RSptr->info)-1;
2293 if (left == ~0)
2294 left = timmings[res].left;
2295 if (!xres)
2296 xres = timmings[res].xres;
2297 if (right == ~0)
2298 right = timmings[res].right;
2299 if (!hslen)
2300 hslen = timmings[res].hslen;
2301 if (upper == ~0)
2302 upper = timmings[res].upper;
2303 if (!yres)
2304 yres = timmings[res].yres;
2305 if (lower == ~0)
2306 lower = timmings[res].lower;
2307 if (!vslen)
2308 vslen = timmings[res].vslen;
2309 if (!(fv||fh||maxclk||pixclock))
2310 fv = timmings[res].vfreq;
2311 if (depth == -1)
2312 depth = RSDepth(RSptr->info);
2313 }
2314 }
2315
2316 static int __init matrox_init(void) {
2317 int err;
2318
2319 if (fb_modesetting_disabled("matroxfb"))
2320 return -ENODEV;
2321
2322 matroxfb_init_params();
2323 err = pci_register_driver(&matroxfb_driver);
2324 dev = -1; /* accept all new devices... */
2325 return err;
2326 }
2327
2328 /* **************************** exit-time only **************************** */
2329
2330 static void __exit matrox_done(void) {
2331 pci_unregister_driver(&matroxfb_driver);
2332 }
2333
2334 #ifndef MODULE
2335
2336 /* ************************* init in-kernel code ************************** */
2337
2338 static int __init matroxfb_setup(char *options) {
2339 char *this_opt;
2340
2341 DBG(__func__)
2342
2343 if (!options || !*options)
2344 return 0;
2345
2346 while ((this_opt = strsep(&options, ",")) != NULL) {
2347 if (!*this_opt) continue;
2348
2349 dprintk("matroxfb_setup: option %s\n", this_opt);
2350
2351 if (!strncmp(this_opt, "dev:", 4))
2352 dev = simple_strtoul(this_opt+4, NULL, 0);
2353 else if (!strncmp(this_opt, "depth:", 6)) {
2354 switch (simple_strtoul(this_opt+6, NULL, 0)) {
2355 case 0: depth = RSText; break;
2356 case 4: depth = RS4bpp; break;
2357 case 8: depth = RS8bpp; break;
2358 case 15:depth = RS15bpp; break;
2359 case 16:depth = RS16bpp; break;
2360 case 24:depth = RS24bpp; break;
2361 case 32:depth = RS32bpp; break;
2362 default:
2363 printk(KERN_ERR "matroxfb: unsupported color depth\n");
2364 }
2365 } else if (!strncmp(this_opt, "xres:", 5))
2366 xres = simple_strtoul(this_opt+5, NULL, 0);
2367 else if (!strncmp(this_opt, "yres:", 5))
2368 yres = simple_strtoul(this_opt+5, NULL, 0);
2369 else if (!strncmp(this_opt, "vslen:", 6))
2370 vslen = simple_strtoul(this_opt+6, NULL, 0);
2371 else if (!strncmp(this_opt, "hslen:", 6))
2372 hslen = simple_strtoul(this_opt+6, NULL, 0);
2373 else if (!strncmp(this_opt, "left:", 5))
2374 left = simple_strtoul(this_opt+5, NULL, 0);
2375 else if (!strncmp(this_opt, "right:", 6))
2376 right = simple_strtoul(this_opt+6, NULL, 0);
2377 else if (!strncmp(this_opt, "upper:", 6))
2378 upper = simple_strtoul(this_opt+6, NULL, 0);
2379 else if (!strncmp(this_opt, "lower:", 6))
2380 lower = simple_strtoul(this_opt+6, NULL, 0);
2381 else if (!strncmp(this_opt, "pixclock:", 9))
2382 pixclock = simple_strtoul(this_opt+9, NULL, 0);
2383 else if (!strncmp(this_opt, "sync:", 5))
2384 sync = simple_strtoul(this_opt+5, NULL, 0);
2385 else if (!strncmp(this_opt, "vesa:", 5))
2386 vesa = simple_strtoul(this_opt+5, NULL, 0);
2387 else if (!strncmp(this_opt, "maxclk:", 7))
2388 maxclk = simple_strtoul(this_opt+7, NULL, 0);
2389 else if (!strncmp(this_opt, "fh:", 3))
2390 fh = simple_strtoul(this_opt+3, NULL, 0);
2391 else if (!strncmp(this_opt, "fv:", 3))
2392 fv = simple_strtoul(this_opt+3, NULL, 0);
2393 else if (!strncmp(this_opt, "mem:", 4))
2394 mem = simple_strtoul(this_opt+4, NULL, 0);
2395 else if (!strncmp(this_opt, "mode:", 5))
2396 strscpy(videomode, this_opt + 5, sizeof(videomode));
2397 else if (!strncmp(this_opt, "outputs:", 8))
2398 strscpy(outputs, this_opt + 8, sizeof(outputs));
2399 else if (!strncmp(this_opt, "dfp:", 4)) {
2400 dfp_type = simple_strtoul(this_opt+4, NULL, 0);
2401 dfp = 1;
2402 }
2403 #ifdef CONFIG_PPC_PMAC
2404 else if (!strncmp(this_opt, "vmode:", 6)) {
2405 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
2406 if (vmode > 0 && vmode <= VMODE_MAX)
2407 default_vmode = vmode;
2408 } else if (!strncmp(this_opt, "cmode:", 6)) {
2409 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
2410 switch (cmode) {
2411 case 0:
2412 case 8:
2413 default_cmode = CMODE_8;
2414 break;
2415 case 15:
2416 case 16:
2417 default_cmode = CMODE_16;
2418 break;
2419 case 24:
2420 case 32:
2421 default_cmode = CMODE_32;
2422 break;
2423 }
2424 }
2425 #endif
2426 else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */
2427 disabled = 1;
2428 else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */
2429 disabled = 0;
2430 else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */
2431 sgram = 1;
2432 else if (!strcmp(this_opt, "sdram"))
2433 sgram = 0;
2434 else if (!strncmp(this_opt, "memtype:", 8))
2435 memtype = simple_strtoul(this_opt+8, NULL, 0);
2436 else {
2437 int value = 1;
2438
2439 if (!strncmp(this_opt, "no", 2)) {
2440 value = 0;
2441 this_opt += 2;
2442 }
2443 if (! strcmp(this_opt, "inverse"))
2444 inverse = value;
2445 else if (!strcmp(this_opt, "accel"))
2446 noaccel = !value;
2447 else if (!strcmp(this_opt, "pan"))
2448 nopan = !value;
2449 else if (!strcmp(this_opt, "pciretry"))
2450 no_pci_retry = !value;
2451 else if (!strcmp(this_opt, "vga"))
2452 novga = !value;
2453 else if (!strcmp(this_opt, "bios"))
2454 nobios = !value;
2455 else if (!strcmp(this_opt, "init"))
2456 noinit = !value;
2457 else if (!strcmp(this_opt, "mtrr"))
2458 mtrr = value;
2459 else if (!strcmp(this_opt, "inv24"))
2460 inv24 = value;
2461 else if (!strcmp(this_opt, "cross4MB"))
2462 cross4MB = value;
2463 else if (!strcmp(this_opt, "grayscale"))
2464 grayscale = value;
2465 else if (!strcmp(this_opt, "dfp"))
2466 dfp = value;
2467 else {
2468 strscpy(videomode, this_opt, sizeof(videomode));
2469 }
2470 }
2471 }
2472 return 0;
2473 }
2474
2475 static int __initdata initialized = 0;
2476
2477 static int __init matroxfb_init(void)
2478 {
2479 char *option = NULL;
2480 int err = 0;
2481
2482 DBG(__func__)
2483
2484 if (fb_get_options("matroxfb", &option))
2485 return -ENODEV;
2486 matroxfb_setup(option);
2487
2488 if (disabled)
2489 return -ENXIO;
2490 if (!initialized) {
2491 initialized = 1;
2492 err = matrox_init();
2493 }
2494 hotplug = 1;
2495 /* never return failure, user can hotplug matrox later... */
2496 return err;
2497 }
2498
2499 #else
2500
2501 /* *************************** init module code **************************** */
2502
2503 MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
2504 MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
2505 MODULE_LICENSE("GPL");
2506
2507 module_param(mem, int, 0);
2508 MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
2509 module_param(disabled, int, 0);
2510 MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
2511 module_param(noaccel, int, 0);
2512 MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
2513 module_param(nopan, int, 0);
2514 MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
2515 module_param(no_pci_retry, int, 0);
2516 MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
2517 module_param(novga, int, 0);
2518 MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
2519 module_param(nobios, int, 0);
2520 MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
2521 module_param(noinit, int, 0);
2522 MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
2523 module_param(memtype, int, 0);
2524 MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.rst for explanation) (default=3 for G200, 0 for G400)");
2525 module_param(mtrr, int, 0);
2526 MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
2527 module_param(sgram, int, 0);
2528 MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
2529 module_param(inv24, int, 0);
2530 MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
2531 module_param(inverse, int, 0);
2532 MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
2533 module_param(dev, int, 0);
2534 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
2535 module_param(vesa, int, 0);
2536 MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
2537 module_param(xres, int, 0);
2538 MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
2539 module_param(yres, int, 0);
2540 MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
2541 module_param(upper, int, 0);
2542 MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
2543 module_param(lower, int, 0);
2544 MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
2545 module_param(vslen, int, 0);
2546 MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
2547 module_param(left, int, 0);
2548 MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
2549 module_param(right, int, 0);
2550 MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
2551 module_param(hslen, int, 0);
2552 MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
2553 module_param(pixclock, int, 0);
2554 MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
2555 module_param(sync, int, 0);
2556 MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
2557 module_param(depth, int, 0);
2558 MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
2559 module_param(maxclk, int, 0);
2560 MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
2561 module_param(fh, int, 0);
2562 MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
2563 module_param(fv, int, 0);
2564 MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
2565 "You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"");
2566 module_param(grayscale, int, 0);
2567 MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
2568 module_param(cross4MB, int, 0);
2569 MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
2570 module_param(dfp, int, 0);
2571 MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
2572 module_param(dfp_type, int, 0);
2573 MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
2574 module_param_string(outputs, outputs, sizeof(outputs), 0);
2575 MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)");
2576 #ifdef CONFIG_PPC_PMAC
2577 module_param_named(vmode, default_vmode, int, 0);
2578 MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
2579 module_param_named(cmode, default_cmode, int, 0);
2580 MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
2581 #endif
2582
2583 static int __init matroxfb_init(void){
2584
2585 DBG(__func__)
2586
2587 if (disabled)
2588 return -ENXIO;
2589
2590 if (depth == 0)
2591 depth = RSText;
2592 else if (depth == 4)
2593 depth = RS4bpp;
2594 else if (depth == 8)
2595 depth = RS8bpp;
2596 else if (depth == 15)
2597 depth = RS15bpp;
2598 else if (depth == 16)
2599 depth = RS16bpp;
2600 else if (depth == 24)
2601 depth = RS24bpp;
2602 else if (depth == 32)
2603 depth = RS32bpp;
2604 else if (depth != -1) {
2605 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
2606 depth = -1;
2607 }
2608 matrox_init();
2609 /* never return failure; user can hotplug matrox later... */
2610 return 0;
2611 }
2612 #endif /* MODULE */
2613
2614 module_init(matroxfb_init);
2615 module_exit(matrox_done);
2616 EXPORT_SYMBOL(matroxfb_register_driver);
2617 EXPORT_SYMBOL(matroxfb_unregister_driver);
2618 EXPORT_SYMBOL(matroxfb_wait_for_sync);
2619 EXPORT_SYMBOL(matroxfb_enable_irq);
Kernel DRM miscellaneous fixes and cross-tree changes