Merge tag 'trace-printf-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/trace...
[drm/drm-misc.git] / include / acpi / actbl1.h
blob387fc821703a80b324637743f0d5afe03b8d7943
1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /******************************************************************************
4 * Name: actbl1.h - Additional ACPI table definitions
6 * Copyright (C) 2000 - 2023, Intel Corp.
8 *****************************************************************************/
10 #ifndef __ACTBL1_H__
11 #define __ACTBL1_H__
13 /*******************************************************************************
15 * Additional ACPI Tables
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
20 ******************************************************************************/
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
27 #define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */
28 #define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */
29 #define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */
30 #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */
31 #define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */
32 #define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */
33 #define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */
34 #define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */
35 #define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */
36 #define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */
37 #define ACPI_SIG_DBGP "DBGP" /* Debug Port table */
38 #define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */
39 #define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */
40 #define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */
41 #define ACPI_SIG_EINJ "EINJ" /* Error Injection table */
42 #define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */
43 #define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */
44 #define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */
45 #define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */
46 #define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */
47 #define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */
48 #define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */
49 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
51 #define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */
52 #define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */
54 #define ACPI_SIG_NBFT "NBFT" /* NVMe Boot Firmware Table */
56 /* Reserved table signatures */
58 #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */
59 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
62 * These tables have been seen in the field, but no definition has been found
64 #ifdef ACPI_UNDEFINED_TABLES
65 #define ACPI_SIG_ATKG "ATKG"
66 #define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */
67 #define ACPI_SIG_IEIT "IEIT"
68 #endif
71 * All tables must be byte-packed to match the ACPI specification, since
72 * the tables are provided by the system BIOS.
74 #pragma pack(1)
77 * Note: C bitfields are not used for this reason:
79 * "Bitfields are great and easy to read, but unfortunately the C language
80 * does not specify the layout of bitfields in memory, which means they are
81 * essentially useless for dealing with packed data in on-disk formats or
82 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
83 * this decision was a design error in C. Ritchie could have picked an order
84 * and stuck with it." Norman Ramsey.
85 * See http://stackoverflow.com/a/1053662/41661
88 /*******************************************************************************
90 * Common subtable headers
92 ******************************************************************************/
94 /* Generic subtable header (used in MADT, SRAT, etc.) */
96 struct acpi_subtable_header {
97 u8 type;
98 u8 length;
101 /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */
103 struct acpi_whea_header {
104 u8 action;
105 u8 instruction;
106 u8 flags;
107 u8 reserved;
108 struct acpi_generic_address register_region;
109 u64 value; /* Value used with Read/Write register */
110 u64 mask; /* Bitmask required for this register instruction */
113 /* https://docs.microsoft.com/en-us/windows-hardware/drivers/ddi/acpitabl/ns-acpitabl-aspt_table */
114 #define ASPT_REVISION_ID 0x01
115 struct acpi_table_aspt {
116 struct acpi_table_header header;
117 u32 num_entries;
120 struct acpi_aspt_header {
121 u16 type;
122 u16 length;
125 enum acpi_aspt_type {
126 ACPI_ASPT_TYPE_GLOBAL_REGS = 0,
127 ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1,
128 ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2,
131 /* 0: ASPT Global Registers */
132 struct acpi_aspt_global_regs {
133 struct acpi_aspt_header header;
134 u32 reserved;
135 u64 feature_reg_addr;
136 u64 irq_en_reg_addr;
137 u64 irq_st_reg_addr;
140 /* 1: ASPT SEV Mailbox Registers */
141 struct acpi_aspt_sev_mbox_regs {
142 struct acpi_aspt_header header;
143 u8 mbox_irq_id;
144 u8 reserved[3];
145 u64 cmd_resp_reg_addr;
146 u64 cmd_buf_lo_reg_addr;
147 u64 cmd_buf_hi_reg_addr;
150 /* 2: ASPT ACPI Mailbox Registers */
151 struct acpi_aspt_acpi_mbox_regs {
152 struct acpi_aspt_header header;
153 u32 reserved1;
154 u64 cmd_resp_reg_addr;
155 u64 reserved2[2];
158 /*******************************************************************************
160 * ASF - Alert Standard Format table (Signature "ASF!")
161 * Revision 0x10
163 * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003
165 ******************************************************************************/
167 struct acpi_table_asf {
168 struct acpi_table_header header; /* Common ACPI table header */
171 /* ASF subtable header */
173 struct acpi_asf_header {
174 u8 type;
175 u8 reserved;
176 u16 length;
179 /* Values for Type field above */
181 enum acpi_asf_type {
182 ACPI_ASF_TYPE_INFO = 0,
183 ACPI_ASF_TYPE_ALERT = 1,
184 ACPI_ASF_TYPE_CONTROL = 2,
185 ACPI_ASF_TYPE_BOOT = 3,
186 ACPI_ASF_TYPE_ADDRESS = 4,
187 ACPI_ASF_TYPE_RESERVED = 5
191 * ASF subtables
194 /* 0: ASF Information */
196 struct acpi_asf_info {
197 struct acpi_asf_header header;
198 u8 min_reset_value;
199 u8 min_poll_interval;
200 u16 system_id;
201 u32 mfg_id;
202 u8 flags;
203 u8 reserved2[3];
206 /* Masks for Flags field above */
208 #define ACPI_ASF_SMBUS_PROTOCOLS (1)
210 /* 1: ASF Alerts */
212 struct acpi_asf_alert {
213 struct acpi_asf_header header;
214 u8 assert_mask;
215 u8 deassert_mask;
216 u8 alerts;
217 u8 data_length;
220 struct acpi_asf_alert_data {
221 u8 address;
222 u8 command;
223 u8 mask;
224 u8 value;
225 u8 sensor_type;
226 u8 type;
227 u8 offset;
228 u8 source_type;
229 u8 severity;
230 u8 sensor_number;
231 u8 entity;
232 u8 instance;
235 /* 2: ASF Remote Control */
237 struct acpi_asf_remote {
238 struct acpi_asf_header header;
239 u8 controls;
240 u8 data_length;
241 u16 reserved2;
244 struct acpi_asf_control_data {
245 u8 function;
246 u8 address;
247 u8 command;
248 u8 value;
251 /* 3: ASF RMCP Boot Options */
253 struct acpi_asf_rmcp {
254 struct acpi_asf_header header;
255 u8 capabilities[7];
256 u8 completion_code;
257 u32 enterprise_id;
258 u8 command;
259 u16 parameter;
260 u16 boot_options;
261 u16 oem_parameters;
264 /* 4: ASF Address */
266 struct acpi_asf_address {
267 struct acpi_asf_header header;
268 u8 eprom_address;
269 u8 devices;
272 /*******************************************************************************
274 * BERT - Boot Error Record Table (ACPI 4.0)
275 * Version 1
277 ******************************************************************************/
279 struct acpi_table_bert {
280 struct acpi_table_header header; /* Common ACPI table header */
281 u32 region_length; /* Length of the boot error region */
282 u64 address; /* Physical address of the error region */
285 /* Boot Error Region (not a subtable, pointed to by Address field above) */
287 struct acpi_bert_region {
288 u32 block_status; /* Type of error information */
289 u32 raw_data_offset; /* Offset to raw error data */
290 u32 raw_data_length; /* Length of raw error data */
291 u32 data_length; /* Length of generic error data */
292 u32 error_severity; /* Severity code */
295 /* Values for block_status flags above */
297 #define ACPI_BERT_UNCORRECTABLE (1)
298 #define ACPI_BERT_CORRECTABLE (1<<1)
299 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2)
300 #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3)
301 #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */
303 /* Values for error_severity above */
305 enum acpi_bert_error_severity {
306 ACPI_BERT_ERROR_CORRECTABLE = 0,
307 ACPI_BERT_ERROR_FATAL = 1,
308 ACPI_BERT_ERROR_CORRECTED = 2,
309 ACPI_BERT_ERROR_NONE = 3,
310 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */
314 * Note: The generic error data that follows the error_severity field above
315 * uses the struct acpi_hest_generic_data defined under the HEST table below
318 /*******************************************************************************
320 * BGRT - Boot Graphics Resource Table (ACPI 5.0)
321 * Version 1
323 ******************************************************************************/
325 struct acpi_table_bgrt {
326 struct acpi_table_header header; /* Common ACPI table header */
327 u16 version;
328 u8 status;
329 u8 image_type;
330 u64 image_address;
331 u32 image_offset_x;
332 u32 image_offset_y;
335 /* Flags for Status field above */
337 #define ACPI_BGRT_DISPLAYED (1)
338 #define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1)
340 /*******************************************************************************
342 * BOOT - Simple Boot Flag Table
343 * Version 1
345 * Conforms to the "Simple Boot Flag Specification", Version 2.1
347 ******************************************************************************/
349 struct acpi_table_boot {
350 struct acpi_table_header header; /* Common ACPI table header */
351 u8 cmos_index; /* Index in CMOS RAM for the boot register */
352 u8 reserved[3];
355 /*******************************************************************************
357 * CDAT - Coherent Device Attribute Table
358 * Version 1
360 * Conforms to the "Coherent Device Attribute Table (CDAT) Specification
361 " (Revision 1.01, October 2020.)
363 ******************************************************************************/
365 struct acpi_table_cdat {
366 u32 length; /* Length of table in bytes, including this header */
367 u8 revision; /* ACPI Specification minor version number */
368 u8 checksum; /* To make sum of entire table == 0 */
369 u8 reserved[6];
370 u32 sequence; /* Used to detect runtime CDAT table changes */
373 /* CDAT common subtable header */
375 struct acpi_cdat_header {
376 u8 type;
377 u8 reserved;
378 u16 length;
381 /* Values for Type field above */
383 enum acpi_cdat_type {
384 ACPI_CDAT_TYPE_DSMAS = 0,
385 ACPI_CDAT_TYPE_DSLBIS = 1,
386 ACPI_CDAT_TYPE_DSMSCIS = 2,
387 ACPI_CDAT_TYPE_DSIS = 3,
388 ACPI_CDAT_TYPE_DSEMTS = 4,
389 ACPI_CDAT_TYPE_SSLBIS = 5,
390 ACPI_CDAT_TYPE_RESERVED = 6 /* 6 through 0xFF are reserved */
393 /* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */
395 struct acpi_cdat_dsmas {
396 u8 dsmad_handle;
397 u8 flags;
398 u16 reserved;
399 u64 dpa_base_address;
400 u64 dpa_length;
403 /* Flags for subtable above */
405 #define ACPI_CDAT_DSMAS_NON_VOLATILE (1 << 2)
406 #define ACPI_CDAT_DSMAS_SHAREABLE (1 << 3)
407 #define ACPI_CDAT_DSMAS_READ_ONLY (1 << 6)
409 /* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */
411 struct acpi_cdat_dslbis {
412 u8 handle;
413 u8 flags; /* If Handle matches a DSMAS handle, the definition of this field matches
414 * Flags field in HMAT System Locality Latency */
415 u8 data_type;
416 u8 reserved;
417 u64 entry_base_unit;
418 u16 entry[3];
419 u16 reserved2;
422 /* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */
424 struct acpi_cdat_dsmscis {
425 u8 dsmas_handle;
426 u8 reserved[3];
427 u64 side_cache_size;
428 u32 cache_attributes;
431 /* Subtable 3: Device Scoped Initiator Structure (DSIS) */
433 struct acpi_cdat_dsis {
434 u8 flags;
435 u8 handle;
436 u16 reserved;
439 /* Flags for above subtable */
441 #define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0)
443 /* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */
445 struct acpi_cdat_dsemts {
446 u8 dsmas_handle;
447 u8 memory_type;
448 u16 reserved;
449 u64 dpa_offset;
450 u64 range_length;
453 /* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */
455 struct acpi_cdat_sslbis {
456 u8 data_type;
457 u8 reserved[3];
458 u64 entry_base_unit;
461 /* Sub-subtable for above, sslbe_entries field */
463 struct acpi_cdat_sslbe {
464 u16 portx_id;
465 u16 porty_id;
466 u16 latency_or_bandwidth;
467 u16 reserved;
470 #define ACPI_CDAT_SSLBIS_US_PORT 0x0100
471 #define ACPI_CDAT_SSLBIS_ANY_PORT 0xffff
473 /*******************************************************************************
475 * CEDT - CXL Early Discovery Table
476 * Version 1
478 * Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020)
480 ******************************************************************************/
482 struct acpi_table_cedt {
483 struct acpi_table_header header; /* Common ACPI table header */
486 /* CEDT subtable header (Performance Record Structure) */
488 struct acpi_cedt_header {
489 u8 type;
490 u8 reserved;
491 u16 length;
494 /* Values for Type field above */
496 enum acpi_cedt_type {
497 ACPI_CEDT_TYPE_CHBS = 0,
498 ACPI_CEDT_TYPE_CFMWS = 1,
499 ACPI_CEDT_TYPE_CXIMS = 2,
500 ACPI_CEDT_TYPE_RDPAS = 3,
501 ACPI_CEDT_TYPE_RESERVED = 4,
504 /* Values for version field above */
506 #define ACPI_CEDT_CHBS_VERSION_CXL11 (0)
507 #define ACPI_CEDT_CHBS_VERSION_CXL20 (1)
509 /* Values for length field above */
511 #define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000)
512 #define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000)
515 * CEDT subtables
518 /* 0: CXL Host Bridge Structure */
520 struct acpi_cedt_chbs {
521 struct acpi_cedt_header header;
522 u32 uid;
523 u32 cxl_version;
524 u32 reserved;
525 u64 base;
526 u64 length;
529 /* 1: CXL Fixed Memory Window Structure */
531 struct acpi_cedt_cfmws {
532 struct acpi_cedt_header header;
533 u32 reserved1;
534 u64 base_hpa;
535 u64 window_size;
536 u8 interleave_ways;
537 u8 interleave_arithmetic;
538 u16 reserved2;
539 u32 granularity;
540 u16 restrictions;
541 u16 qtg_id;
542 u32 interleave_targets[];
545 struct acpi_cedt_cfmws_target_element {
546 u32 interleave_target;
549 /* Values for Interleave Arithmetic field above */
551 #define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0)
552 #define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1)
554 /* Values for Restrictions field above */
556 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1)
557 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1<<1)
558 #define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2)
559 #define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3)
560 #define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4)
562 /* 2: CXL XOR Interleave Math Structure */
564 struct acpi_cedt_cxims {
565 struct acpi_cedt_header header;
566 u16 reserved1;
567 u8 hbig;
568 u8 nr_xormaps;
569 u64 xormap_list[];
572 struct acpi_cedt_cxims_target_element {
573 u64 xormap;
576 /* 3: CXL RCEC Downstream Port Association Structure */
578 struct acpi_cedt_rdpas {
579 struct acpi_cedt_header header;
580 u16 segment;
581 u16 bdf;
582 u8 protocol;
583 u64 address;
586 /* Masks for bdf field above */
587 #define ACPI_CEDT_RDPAS_BUS_MASK 0xff00
588 #define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8
589 #define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007
591 #define ACPI_CEDT_RDPAS_PROTOCOL_IO (0)
592 #define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1)
594 /*******************************************************************************
596 * CPEP - Corrected Platform Error Polling table (ACPI 4.0)
597 * Version 1
599 ******************************************************************************/
601 struct acpi_table_cpep {
602 struct acpi_table_header header; /* Common ACPI table header */
603 u64 reserved;
606 /* Subtable */
608 struct acpi_cpep_polling {
609 struct acpi_subtable_header header;
610 u8 id; /* Processor ID */
611 u8 eid; /* Processor EID */
612 u32 interval; /* Polling interval (msec) */
615 /*******************************************************************************
617 * CSRT - Core System Resource Table
618 * Version 0
620 * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011
622 ******************************************************************************/
624 struct acpi_table_csrt {
625 struct acpi_table_header header; /* Common ACPI table header */
628 /* Resource Group subtable */
630 struct acpi_csrt_group {
631 u32 length;
632 u32 vendor_id;
633 u32 subvendor_id;
634 u16 device_id;
635 u16 subdevice_id;
636 u16 revision;
637 u16 reserved;
638 u32 shared_info_length;
640 /* Shared data immediately follows (Length = shared_info_length) */
643 /* Shared Info subtable */
645 struct acpi_csrt_shared_info {
646 u16 major_version;
647 u16 minor_version;
648 u32 mmio_base_low;
649 u32 mmio_base_high;
650 u32 gsi_interrupt;
651 u8 interrupt_polarity;
652 u8 interrupt_mode;
653 u8 num_channels;
654 u8 dma_address_width;
655 u16 base_request_line;
656 u16 num_handshake_signals;
657 u32 max_block_size;
659 /* Resource descriptors immediately follow (Length = Group length - shared_info_length) */
662 /* Resource Descriptor subtable */
664 struct acpi_csrt_descriptor {
665 u32 length;
666 u16 type;
667 u16 subtype;
668 u32 uid;
670 /* Resource-specific information immediately follows */
673 /* Resource Types */
675 #define ACPI_CSRT_TYPE_INTERRUPT 0x0001
676 #define ACPI_CSRT_TYPE_TIMER 0x0002
677 #define ACPI_CSRT_TYPE_DMA 0x0003
679 /* Resource Subtypes */
681 #define ACPI_CSRT_XRUPT_LINE 0x0000
682 #define ACPI_CSRT_XRUPT_CONTROLLER 0x0001
683 #define ACPI_CSRT_TIMER 0x0000
684 #define ACPI_CSRT_DMA_CHANNEL 0x0000
685 #define ACPI_CSRT_DMA_CONTROLLER 0x0001
687 /*******************************************************************************
689 * DBG2 - Debug Port Table 2
690 * Version 0 (Both main table and subtables)
692 * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020
694 ******************************************************************************/
696 struct acpi_table_dbg2 {
697 struct acpi_table_header header; /* Common ACPI table header */
698 u32 info_offset;
699 u32 info_count;
702 struct acpi_dbg2_header {
703 u32 info_offset;
704 u32 info_count;
707 /* Debug Device Information Subtable */
709 struct acpi_dbg2_device {
710 u8 revision;
711 u16 length;
712 u8 register_count; /* Number of base_address registers */
713 u16 namepath_length;
714 u16 namepath_offset;
715 u16 oem_data_length;
716 u16 oem_data_offset;
717 u16 port_type;
718 u16 port_subtype;
719 u16 reserved;
720 u16 base_address_offset;
721 u16 address_size_offset;
723 * Data that follows:
724 * base_address (required) - Each in 12-byte Generic Address Structure format.
725 * address_size (required) - Array of u32 sizes corresponding to each base_address register.
726 * Namepath (required) - Null terminated string. Single dot if not supported.
727 * oem_data (optional) - Length is oem_data_length.
731 /* Types for port_type field above */
733 #define ACPI_DBG2_SERIAL_PORT 0x8000
734 #define ACPI_DBG2_1394_PORT 0x8001
735 #define ACPI_DBG2_USB_PORT 0x8002
736 #define ACPI_DBG2_NET_PORT 0x8003
738 /* Subtypes for port_subtype field above */
740 #define ACPI_DBG2_16550_COMPATIBLE 0x0000
741 #define ACPI_DBG2_16550_SUBSET 0x0001
742 #define ACPI_DBG2_MAX311XE_SPI 0x0002
743 #define ACPI_DBG2_ARM_PL011 0x0003
744 #define ACPI_DBG2_MSM8X60 0x0004
745 #define ACPI_DBG2_16550_NVIDIA 0x0005
746 #define ACPI_DBG2_TI_OMAP 0x0006
747 #define ACPI_DBG2_APM88XXXX 0x0008
748 #define ACPI_DBG2_MSM8974 0x0009
749 #define ACPI_DBG2_SAM5250 0x000A
750 #define ACPI_DBG2_INTEL_USIF 0x000B
751 #define ACPI_DBG2_IMX6 0x000C
752 #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
753 #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
754 #define ACPI_DBG2_ARM_DCC 0x000F
755 #define ACPI_DBG2_BCM2835 0x0010
756 #define ACPI_DBG2_SDM845_1_8432MHZ 0x0011
757 #define ACPI_DBG2_16550_WITH_GAS 0x0012
758 #define ACPI_DBG2_SDM845_7_372MHZ 0x0013
759 #define ACPI_DBG2_INTEL_LPSS 0x0014
760 #define ACPI_DBG2_RISCV_SBI_CON 0x0015
762 #define ACPI_DBG2_1394_STANDARD 0x0000
764 #define ACPI_DBG2_USB_XHCI 0x0000
765 #define ACPI_DBG2_USB_EHCI 0x0001
767 /*******************************************************************************
769 * DBGP - Debug Port table
770 * Version 1
772 * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000
774 ******************************************************************************/
776 struct acpi_table_dbgp {
777 struct acpi_table_header header; /* Common ACPI table header */
778 u8 type; /* 0=full 16550, 1=subset of 16550 */
779 u8 reserved[3];
780 struct acpi_generic_address debug_port;
783 /*******************************************************************************
785 * DMAR - DMA Remapping table
786 * Version 1
788 * Conforms to "Intel Virtualization Technology for Directed I/O",
789 * Version 2.3, October 2014
791 ******************************************************************************/
793 struct acpi_table_dmar {
794 struct acpi_table_header header; /* Common ACPI table header */
795 u8 width; /* Host Address Width */
796 u8 flags;
797 u8 reserved[10];
800 /* Masks for Flags field above */
802 #define ACPI_DMAR_INTR_REMAP (1)
803 #define ACPI_DMAR_X2APIC_OPT_OUT (1<<1)
804 #define ACPI_DMAR_X2APIC_MODE (1<<2)
806 /* DMAR subtable header */
808 struct acpi_dmar_header {
809 u16 type;
810 u16 length;
813 /* Values for subtable type in struct acpi_dmar_header */
815 enum acpi_dmar_type {
816 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,
817 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,
818 ACPI_DMAR_TYPE_ROOT_ATS = 2,
819 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,
820 ACPI_DMAR_TYPE_NAMESPACE = 4,
821 ACPI_DMAR_TYPE_SATC = 5,
822 ACPI_DMAR_TYPE_RESERVED = 6 /* 6 and greater are reserved */
825 /* DMAR Device Scope structure */
827 struct acpi_dmar_device_scope {
828 u8 entry_type;
829 u8 length;
830 u16 reserved;
831 u8 enumeration_id;
832 u8 bus;
835 /* Values for entry_type in struct acpi_dmar_device_scope - device types */
837 enum acpi_dmar_scope_type {
838 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0,
839 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1,
840 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2,
841 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3,
842 ACPI_DMAR_SCOPE_TYPE_HPET = 4,
843 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5,
844 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */
847 struct acpi_dmar_pci_path {
848 u8 device;
849 u8 function;
853 * DMAR Subtables, correspond to Type in struct acpi_dmar_header
856 /* 0: Hardware Unit Definition */
858 struct acpi_dmar_hardware_unit {
859 struct acpi_dmar_header header;
860 u8 flags;
861 u8 size; /* Size of the register set */
862 u16 segment;
863 u64 address; /* Register Base Address */
866 /* Masks for Flags field above */
868 #define ACPI_DMAR_INCLUDE_ALL (1)
870 /* 1: Reserved Memory Definition */
872 struct acpi_dmar_reserved_memory {
873 struct acpi_dmar_header header;
874 u16 reserved;
875 u16 segment;
876 u64 base_address; /* 4K aligned base address */
877 u64 end_address; /* 4K aligned limit address */
880 /* Masks for Flags field above */
882 #define ACPI_DMAR_ALLOW_ALL (1)
884 /* 2: Root Port ATS Capability Reporting Structure */
886 struct acpi_dmar_atsr {
887 struct acpi_dmar_header header;
888 u8 flags;
889 u8 reserved;
890 u16 segment;
893 /* Masks for Flags field above */
895 #define ACPI_DMAR_ALL_PORTS (1)
897 /* 3: Remapping Hardware Static Affinity Structure */
899 struct acpi_dmar_rhsa {
900 struct acpi_dmar_header header;
901 u32 reserved;
902 u64 base_address;
903 u32 proximity_domain;
906 /* 4: ACPI Namespace Device Declaration Structure */
908 struct acpi_dmar_andd {
909 struct acpi_dmar_header header;
910 u8 reserved[3];
911 u8 device_number;
912 union {
913 char __pad;
914 ACPI_FLEX_ARRAY(char, device_name);
918 /* 5: SOC Integrated Address Translation Cache Reporting Structure */
920 struct acpi_dmar_satc {
921 struct acpi_dmar_header header;
922 u8 flags;
923 u8 reserved;
924 u16 segment;
926 /*******************************************************************************
928 * DRTM - Dynamic Root of Trust for Measurement table
929 * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0
930 * Table version 1
932 ******************************************************************************/
934 struct acpi_table_drtm {
935 struct acpi_table_header header; /* Common ACPI table header */
936 u64 entry_base_address;
937 u64 entry_length;
938 u32 entry_address32;
939 u64 entry_address64;
940 u64 exit_address;
941 u64 log_area_address;
942 u32 log_area_length;
943 u64 arch_dependent_address;
944 u32 flags;
947 /* Flag Definitions for above */
949 #define ACPI_DRTM_ACCESS_ALLOWED (1)
950 #define ACPI_DRTM_ENABLE_GAP_CODE (1<<1)
951 #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2)
952 #define ACPI_DRTM_AUTHORITY_ORDER (1<<3)
954 /* 1) Validated Tables List (64-bit addresses) */
956 struct acpi_drtm_vtable_list {
957 u32 validated_table_count;
958 u64 validated_tables[];
961 /* 2) Resources List (of Resource Descriptors) */
963 /* Resource Descriptor */
965 struct acpi_drtm_resource {
966 u8 size[7];
967 u8 type;
968 u64 address;
971 struct acpi_drtm_resource_list {
972 u32 resource_count;
973 struct acpi_drtm_resource resources[];
976 /* 3) Platform-specific Identifiers List */
978 struct acpi_drtm_dps_id {
979 u32 dps_id_length;
980 u8 dps_id[16];
983 /*******************************************************************************
985 * ECDT - Embedded Controller Boot Resources Table
986 * Version 1
988 ******************************************************************************/
990 struct acpi_table_ecdt {
991 struct acpi_table_header header; /* Common ACPI table header */
992 struct acpi_generic_address control; /* Address of EC command/status register */
993 struct acpi_generic_address data; /* Address of EC data register */
994 u32 uid; /* Unique ID - must be same as the EC _UID method */
995 u8 gpe; /* The GPE for the EC */
996 u8 id[]; /* Full namepath of the EC in the ACPI namespace */
999 /*******************************************************************************
1001 * EINJ - Error Injection Table (ACPI 4.0)
1002 * Version 1
1004 ******************************************************************************/
1006 struct acpi_table_einj {
1007 struct acpi_table_header header; /* Common ACPI table header */
1008 u32 header_length;
1009 u8 flags;
1010 u8 reserved[3];
1011 u32 entries;
1014 /* EINJ Injection Instruction Entries (actions) */
1016 struct acpi_einj_entry {
1017 struct acpi_whea_header whea_header; /* Common header for WHEA tables */
1020 /* Masks for Flags field above */
1022 #define ACPI_EINJ_PRESERVE (1)
1024 /* Values for Action field above */
1026 enum acpi_einj_actions {
1027 ACPI_EINJ_BEGIN_OPERATION = 0,
1028 ACPI_EINJ_GET_TRIGGER_TABLE = 1,
1029 ACPI_EINJ_SET_ERROR_TYPE = 2,
1030 ACPI_EINJ_GET_ERROR_TYPE = 3,
1031 ACPI_EINJ_END_OPERATION = 4,
1032 ACPI_EINJ_EXECUTE_OPERATION = 5,
1033 ACPI_EINJ_CHECK_BUSY_STATUS = 6,
1034 ACPI_EINJ_GET_COMMAND_STATUS = 7,
1035 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8,
1036 ACPI_EINJ_GET_EXECUTE_TIMINGS = 9,
1037 ACPI_EINJ_ACTION_RESERVED = 10, /* 10 and greater are reserved */
1038 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */
1041 /* Values for Instruction field above */
1043 enum acpi_einj_instructions {
1044 ACPI_EINJ_READ_REGISTER = 0,
1045 ACPI_EINJ_READ_REGISTER_VALUE = 1,
1046 ACPI_EINJ_WRITE_REGISTER = 2,
1047 ACPI_EINJ_WRITE_REGISTER_VALUE = 3,
1048 ACPI_EINJ_NOOP = 4,
1049 ACPI_EINJ_FLUSH_CACHELINE = 5,
1050 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */
1053 struct acpi_einj_error_type_with_addr {
1054 u32 error_type;
1055 u32 vendor_struct_offset;
1056 u32 flags;
1057 u32 apic_id;
1058 u64 address;
1059 u64 range;
1060 u32 pcie_id;
1063 struct acpi_einj_vendor {
1064 u32 length;
1065 u32 pcie_id;
1066 u16 vendor_id;
1067 u16 device_id;
1068 u8 revision_id;
1069 u8 reserved[3];
1072 /* EINJ Trigger Error Action Table */
1074 struct acpi_einj_trigger {
1075 u32 header_size;
1076 u32 revision;
1077 u32 table_size;
1078 u32 entry_count;
1081 /* Command status return values */
1083 enum acpi_einj_command_status {
1084 ACPI_EINJ_SUCCESS = 0,
1085 ACPI_EINJ_FAILURE = 1,
1086 ACPI_EINJ_INVALID_ACCESS = 2,
1087 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */
1090 /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */
1092 #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1)
1093 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1)
1094 #define ACPI_EINJ_PROCESSOR_FATAL (1<<2)
1095 #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3)
1096 #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4)
1097 #define ACPI_EINJ_MEMORY_FATAL (1<<5)
1098 #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6)
1099 #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7)
1100 #define ACPI_EINJ_PCIX_FATAL (1<<8)
1101 #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9)
1102 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10)
1103 #define ACPI_EINJ_PLATFORM_FATAL (1<<11)
1104 #define ACPI_EINJ_CXL_CACHE_CORRECTABLE (1<<12)
1105 #define ACPI_EINJ_CXL_CACHE_UNCORRECTABLE (1<<13)
1106 #define ACPI_EINJ_CXL_CACHE_FATAL (1<<14)
1107 #define ACPI_EINJ_CXL_MEM_CORRECTABLE (1<<15)
1108 #define ACPI_EINJ_CXL_MEM_UNCORRECTABLE (1<<16)
1109 #define ACPI_EINJ_CXL_MEM_FATAL (1<<17)
1110 #define ACPI_EINJ_VENDOR_DEFINED (1<<31)
1112 /*******************************************************************************
1114 * ERST - Error Record Serialization Table (ACPI 4.0)
1115 * Version 1
1117 ******************************************************************************/
1119 struct acpi_table_erst {
1120 struct acpi_table_header header; /* Common ACPI table header */
1121 u32 header_length;
1122 u32 reserved;
1123 u32 entries;
1126 /* ERST Serialization Entries (actions) */
1128 struct acpi_erst_entry {
1129 struct acpi_whea_header whea_header; /* Common header for WHEA tables */
1132 /* Masks for Flags field above */
1134 #define ACPI_ERST_PRESERVE (1)
1136 /* Values for Action field above */
1138 enum acpi_erst_actions {
1139 ACPI_ERST_BEGIN_WRITE = 0,
1140 ACPI_ERST_BEGIN_READ = 1,
1141 ACPI_ERST_BEGIN_CLEAR = 2,
1142 ACPI_ERST_END = 3,
1143 ACPI_ERST_SET_RECORD_OFFSET = 4,
1144 ACPI_ERST_EXECUTE_OPERATION = 5,
1145 ACPI_ERST_CHECK_BUSY_STATUS = 6,
1146 ACPI_ERST_GET_COMMAND_STATUS = 7,
1147 ACPI_ERST_GET_RECORD_ID = 8,
1148 ACPI_ERST_SET_RECORD_ID = 9,
1149 ACPI_ERST_GET_RECORD_COUNT = 10,
1150 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11,
1151 ACPI_ERST_NOT_USED = 12,
1152 ACPI_ERST_GET_ERROR_RANGE = 13,
1153 ACPI_ERST_GET_ERROR_LENGTH = 14,
1154 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15,
1155 ACPI_ERST_EXECUTE_TIMINGS = 16,
1156 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */
1159 /* Values for Instruction field above */
1161 enum acpi_erst_instructions {
1162 ACPI_ERST_READ_REGISTER = 0,
1163 ACPI_ERST_READ_REGISTER_VALUE = 1,
1164 ACPI_ERST_WRITE_REGISTER = 2,
1165 ACPI_ERST_WRITE_REGISTER_VALUE = 3,
1166 ACPI_ERST_NOOP = 4,
1167 ACPI_ERST_LOAD_VAR1 = 5,
1168 ACPI_ERST_LOAD_VAR2 = 6,
1169 ACPI_ERST_STORE_VAR1 = 7,
1170 ACPI_ERST_ADD = 8,
1171 ACPI_ERST_SUBTRACT = 9,
1172 ACPI_ERST_ADD_VALUE = 10,
1173 ACPI_ERST_SUBTRACT_VALUE = 11,
1174 ACPI_ERST_STALL = 12,
1175 ACPI_ERST_STALL_WHILE_TRUE = 13,
1176 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14,
1177 ACPI_ERST_GOTO = 15,
1178 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16,
1179 ACPI_ERST_SET_DST_ADDRESS_BASE = 17,
1180 ACPI_ERST_MOVE_DATA = 18,
1181 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */
1184 /* Command status return values */
1186 enum acpi_erst_command_status {
1187 ACPI_ERST_SUCCESS = 0,
1188 ACPI_ERST_NO_SPACE = 1,
1189 ACPI_ERST_NOT_AVAILABLE = 2,
1190 ACPI_ERST_FAILURE = 3,
1191 ACPI_ERST_RECORD_EMPTY = 4,
1192 ACPI_ERST_NOT_FOUND = 5,
1193 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */
1196 /* Error Record Serialization Information */
1198 struct acpi_erst_info {
1199 u16 signature; /* Should be "ER" */
1200 u8 data[48];
1203 /*******************************************************************************
1205 * FPDT - Firmware Performance Data Table (ACPI 5.0)
1206 * Version 1
1208 ******************************************************************************/
1210 struct acpi_table_fpdt {
1211 struct acpi_table_header header; /* Common ACPI table header */
1214 /* FPDT subtable header (Performance Record Structure) */
1216 struct acpi_fpdt_header {
1217 u16 type;
1218 u8 length;
1219 u8 revision;
1222 /* Values for Type field above */
1224 enum acpi_fpdt_type {
1225 ACPI_FPDT_TYPE_BOOT = 0,
1226 ACPI_FPDT_TYPE_S3PERF = 1
1230 * FPDT subtables
1233 /* 0: Firmware Basic Boot Performance Record */
1235 struct acpi_fpdt_boot_pointer {
1236 struct acpi_fpdt_header header;
1237 u8 reserved[4];
1238 u64 address;
1241 /* 1: S3 Performance Table Pointer Record */
1243 struct acpi_fpdt_s3pt_pointer {
1244 struct acpi_fpdt_header header;
1245 u8 reserved[4];
1246 u64 address;
1250 * S3PT - S3 Performance Table. This table is pointed to by the
1251 * S3 Pointer Record above.
1253 struct acpi_table_s3pt {
1254 u8 signature[4]; /* "S3PT" */
1255 u32 length;
1259 * S3PT Subtables (Not part of the actual FPDT)
1262 /* Values for Type field in S3PT header */
1264 enum acpi_s3pt_type {
1265 ACPI_S3PT_TYPE_RESUME = 0,
1266 ACPI_S3PT_TYPE_SUSPEND = 1,
1267 ACPI_FPDT_BOOT_PERFORMANCE = 2
1270 struct acpi_s3pt_resume {
1271 struct acpi_fpdt_header header;
1272 u32 resume_count;
1273 u64 full_resume;
1274 u64 average_resume;
1277 struct acpi_s3pt_suspend {
1278 struct acpi_fpdt_header header;
1279 u64 suspend_start;
1280 u64 suspend_end;
1284 * FPDT Boot Performance Record (Not part of the actual FPDT)
1286 struct acpi_fpdt_boot {
1287 struct acpi_fpdt_header header;
1288 u8 reserved[4];
1289 u64 reset_end;
1290 u64 load_start;
1291 u64 startup_start;
1292 u64 exit_services_entry;
1293 u64 exit_services_exit;
1296 /*******************************************************************************
1298 * GTDT - Generic Timer Description Table (ACPI 5.1)
1299 * Version 2
1301 ******************************************************************************/
1303 struct acpi_table_gtdt {
1304 struct acpi_table_header header; /* Common ACPI table header */
1305 u64 counter_block_addresss;
1306 u32 reserved;
1307 u32 secure_el1_interrupt;
1308 u32 secure_el1_flags;
1309 u32 non_secure_el1_interrupt;
1310 u32 non_secure_el1_flags;
1311 u32 virtual_timer_interrupt;
1312 u32 virtual_timer_flags;
1313 u32 non_secure_el2_interrupt;
1314 u32 non_secure_el2_flags;
1315 u64 counter_read_block_address;
1316 u32 platform_timer_count;
1317 u32 platform_timer_offset;
1320 /* Flag Definitions: Timer Block Physical Timers and Virtual timers */
1322 #define ACPI_GTDT_INTERRUPT_MODE (1)
1323 #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1)
1324 #define ACPI_GTDT_ALWAYS_ON (1<<2)
1326 struct acpi_gtdt_el2 {
1327 u32 virtual_el2_timer_gsiv;
1328 u32 virtual_el2_timer_flags;
1331 /* Common GTDT subtable header */
1333 struct acpi_gtdt_header {
1334 u8 type;
1335 u16 length;
1338 /* Values for GTDT subtable type above */
1340 enum acpi_gtdt_type {
1341 ACPI_GTDT_TYPE_TIMER_BLOCK = 0,
1342 ACPI_GTDT_TYPE_WATCHDOG = 1,
1343 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
1346 /* GTDT Subtables, correspond to Type in struct acpi_gtdt_header */
1348 /* 0: Generic Timer Block */
1350 struct acpi_gtdt_timer_block {
1351 struct acpi_gtdt_header header;
1352 u8 reserved;
1353 u64 block_address;
1354 u32 timer_count;
1355 u32 timer_offset;
1358 /* Timer Sub-Structure, one per timer */
1360 struct acpi_gtdt_timer_entry {
1361 u8 frame_number;
1362 u8 reserved[3];
1363 u64 base_address;
1364 u64 el0_base_address;
1365 u32 timer_interrupt;
1366 u32 timer_flags;
1367 u32 virtual_timer_interrupt;
1368 u32 virtual_timer_flags;
1369 u32 common_flags;
1372 /* Flag Definitions: timer_flags and virtual_timer_flags above */
1374 #define ACPI_GTDT_GT_IRQ_MODE (1)
1375 #define ACPI_GTDT_GT_IRQ_POLARITY (1<<1)
1377 /* Flag Definitions: common_flags above */
1379 #define ACPI_GTDT_GT_IS_SECURE_TIMER (1)
1380 #define ACPI_GTDT_GT_ALWAYS_ON (1<<1)
1382 /* 1: SBSA Generic Watchdog Structure */
1384 struct acpi_gtdt_watchdog {
1385 struct acpi_gtdt_header header;
1386 u8 reserved;
1387 u64 refresh_frame_address;
1388 u64 control_frame_address;
1389 u32 timer_interrupt;
1390 u32 timer_flags;
1393 /* Flag Definitions: timer_flags above */
1395 #define ACPI_GTDT_WATCHDOG_IRQ_MODE (1)
1396 #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1)
1397 #define ACPI_GTDT_WATCHDOG_SECURE (1<<2)
1399 /*******************************************************************************
1401 * HEST - Hardware Error Source Table (ACPI 4.0)
1402 * Version 1
1404 ******************************************************************************/
1406 struct acpi_table_hest {
1407 struct acpi_table_header header; /* Common ACPI table header */
1408 u32 error_source_count;
1411 /* HEST subtable header */
1413 struct acpi_hest_header {
1414 u16 type;
1415 u16 source_id;
1418 /* Values for Type field above for subtables */
1420 enum acpi_hest_types {
1421 ACPI_HEST_TYPE_IA32_CHECK = 0,
1422 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1,
1423 ACPI_HEST_TYPE_IA32_NMI = 2,
1424 ACPI_HEST_TYPE_NOT_USED3 = 3,
1425 ACPI_HEST_TYPE_NOT_USED4 = 4,
1426 ACPI_HEST_TYPE_NOT_USED5 = 5,
1427 ACPI_HEST_TYPE_AER_ROOT_PORT = 6,
1428 ACPI_HEST_TYPE_AER_ENDPOINT = 7,
1429 ACPI_HEST_TYPE_AER_BRIDGE = 8,
1430 ACPI_HEST_TYPE_GENERIC_ERROR = 9,
1431 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10,
1432 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11,
1433 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */
1437 * HEST substructures contained in subtables
1441 * IA32 Error Bank(s) - Follows the struct acpi_hest_ia_machine_check and
1442 * struct acpi_hest_ia_corrected structures.
1444 struct acpi_hest_ia_error_bank {
1445 u8 bank_number;
1446 u8 clear_status_on_init;
1447 u8 status_format;
1448 u8 reserved;
1449 u32 control_register;
1450 u64 control_data;
1451 u32 status_register;
1452 u32 address_register;
1453 u32 misc_register;
1456 /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */
1458 struct acpi_hest_aer_common {
1459 u16 reserved1;
1460 u8 flags;
1461 u8 enabled;
1462 u32 records_to_preallocate;
1463 u32 max_sections_per_record;
1464 u32 bus; /* Bus and Segment numbers */
1465 u16 device;
1466 u16 function;
1467 u16 device_control;
1468 u16 reserved2;
1469 u32 uncorrectable_mask;
1470 u32 uncorrectable_severity;
1471 u32 correctable_mask;
1472 u32 advanced_capabilities;
1475 /* Masks for HEST Flags fields */
1477 #define ACPI_HEST_FIRMWARE_FIRST (1)
1478 #define ACPI_HEST_GLOBAL (1<<1)
1479 #define ACPI_HEST_GHES_ASSIST (1<<2)
1482 * Macros to access the bus/segment numbers in Bus field above:
1483 * Bus number is encoded in bits 7:0
1484 * Segment number is encoded in bits 23:8
1486 #define ACPI_HEST_BUS(bus) ((bus) & 0xFF)
1487 #define ACPI_HEST_SEGMENT(bus) (((bus) >> 8) & 0xFFFF)
1489 /* Hardware Error Notification */
1491 struct acpi_hest_notify {
1492 u8 type;
1493 u8 length;
1494 u16 config_write_enable;
1495 u32 poll_interval;
1496 u32 vector;
1497 u32 polling_threshold_value;
1498 u32 polling_threshold_window;
1499 u32 error_threshold_value;
1500 u32 error_threshold_window;
1503 /* Values for Notify Type field above */
1505 enum acpi_hest_notify_types {
1506 ACPI_HEST_NOTIFY_POLLED = 0,
1507 ACPI_HEST_NOTIFY_EXTERNAL = 1,
1508 ACPI_HEST_NOTIFY_LOCAL = 2,
1509 ACPI_HEST_NOTIFY_SCI = 3,
1510 ACPI_HEST_NOTIFY_NMI = 4,
1511 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */
1512 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */
1513 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */
1514 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */
1515 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */
1516 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */
1517 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */
1518 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */
1521 /* Values for config_write_enable bitfield above */
1523 #define ACPI_HEST_TYPE (1)
1524 #define ACPI_HEST_POLL_INTERVAL (1<<1)
1525 #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2)
1526 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3)
1527 #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4)
1528 #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5)
1531 * HEST subtables
1534 /* 0: IA32 Machine Check Exception */
1536 struct acpi_hest_ia_machine_check {
1537 struct acpi_hest_header header;
1538 u16 reserved1;
1539 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */
1540 u8 enabled;
1541 u32 records_to_preallocate;
1542 u32 max_sections_per_record;
1543 u64 global_capability_data;
1544 u64 global_control_data;
1545 u8 num_hardware_banks;
1546 u8 reserved3[7];
1549 /* 1: IA32 Corrected Machine Check */
1551 struct acpi_hest_ia_corrected {
1552 struct acpi_hest_header header;
1553 u16 reserved1;
1554 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */
1555 u8 enabled;
1556 u32 records_to_preallocate;
1557 u32 max_sections_per_record;
1558 struct acpi_hest_notify notify;
1559 u8 num_hardware_banks;
1560 u8 reserved2[3];
1563 /* 2: IA32 Non-Maskable Interrupt */
1565 struct acpi_hest_ia_nmi {
1566 struct acpi_hest_header header;
1567 u32 reserved;
1568 u32 records_to_preallocate;
1569 u32 max_sections_per_record;
1570 u32 max_raw_data_length;
1573 /* 3,4,5: Not used */
1575 /* 6: PCI Express Root Port AER */
1577 struct acpi_hest_aer_root {
1578 struct acpi_hest_header header;
1579 struct acpi_hest_aer_common aer;
1580 u32 root_error_command;
1583 /* 7: PCI Express AER (AER Endpoint) */
1585 struct acpi_hest_aer {
1586 struct acpi_hest_header header;
1587 struct acpi_hest_aer_common aer;
1590 /* 8: PCI Express/PCI-X Bridge AER */
1592 struct acpi_hest_aer_bridge {
1593 struct acpi_hest_header header;
1594 struct acpi_hest_aer_common aer;
1595 u32 uncorrectable_mask2;
1596 u32 uncorrectable_severity2;
1597 u32 advanced_capabilities2;
1600 /* 9: Generic Hardware Error Source */
1602 struct acpi_hest_generic {
1603 struct acpi_hest_header header;
1604 u16 related_source_id;
1605 u8 reserved;
1606 u8 enabled;
1607 u32 records_to_preallocate;
1608 u32 max_sections_per_record;
1609 u32 max_raw_data_length;
1610 struct acpi_generic_address error_status_address;
1611 struct acpi_hest_notify notify;
1612 u32 error_block_length;
1615 /* 10: Generic Hardware Error Source, version 2 */
1617 struct acpi_hest_generic_v2 {
1618 struct acpi_hest_header header;
1619 u16 related_source_id;
1620 u8 reserved;
1621 u8 enabled;
1622 u32 records_to_preallocate;
1623 u32 max_sections_per_record;
1624 u32 max_raw_data_length;
1625 struct acpi_generic_address error_status_address;
1626 struct acpi_hest_notify notify;
1627 u32 error_block_length;
1628 struct acpi_generic_address read_ack_register;
1629 u64 read_ack_preserve;
1630 u64 read_ack_write;
1633 /* Generic Error Status block */
1635 struct acpi_hest_generic_status {
1636 u32 block_status;
1637 u32 raw_data_offset;
1638 u32 raw_data_length;
1639 u32 data_length;
1640 u32 error_severity;
1643 /* Values for block_status flags above */
1645 #define ACPI_HEST_UNCORRECTABLE (1)
1646 #define ACPI_HEST_CORRECTABLE (1<<1)
1647 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2)
1648 #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3)
1649 #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */
1651 /* Generic Error Data entry */
1653 struct acpi_hest_generic_data {
1654 u8 section_type[16];
1655 u32 error_severity;
1656 u16 revision;
1657 u8 validation_bits;
1658 u8 flags;
1659 u32 error_data_length;
1660 u8 fru_id[16];
1661 u8 fru_text[20];
1664 /* Extension for revision 0x0300 */
1666 struct acpi_hest_generic_data_v300 {
1667 u8 section_type[16];
1668 u32 error_severity;
1669 u16 revision;
1670 u8 validation_bits;
1671 u8 flags;
1672 u32 error_data_length;
1673 u8 fru_id[16];
1674 u8 fru_text[20];
1675 u64 time_stamp;
1678 /* Values for error_severity above */
1680 #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0
1681 #define ACPI_HEST_GEN_ERROR_FATAL 1
1682 #define ACPI_HEST_GEN_ERROR_CORRECTED 2
1683 #define ACPI_HEST_GEN_ERROR_NONE 3
1685 /* Flags for validation_bits above */
1687 #define ACPI_HEST_GEN_VALID_FRU_ID (1)
1688 #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1)
1689 #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2)
1691 /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */
1693 struct acpi_hest_ia_deferred_check {
1694 struct acpi_hest_header header;
1695 u16 reserved1;
1696 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */
1697 u8 enabled;
1698 u32 records_to_preallocate;
1699 u32 max_sections_per_record;
1700 struct acpi_hest_notify notify;
1701 u8 num_hardware_banks;
1702 u8 reserved2[3];
1705 /*******************************************************************************
1707 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.2)
1708 * Version 1
1710 ******************************************************************************/
1712 struct acpi_table_hmat {
1713 struct acpi_table_header header; /* Common ACPI table header */
1714 u32 reserved;
1717 /* Values for HMAT structure types */
1719 enum acpi_hmat_type {
1720 ACPI_HMAT_TYPE_PROXIMITY = 0, /* Memory proximity domain attributes */
1721 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */
1722 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */
1723 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */
1726 struct acpi_hmat_structure {
1727 u16 type;
1728 u16 reserved;
1729 u32 length;
1733 * HMAT Structures, correspond to Type in struct acpi_hmat_structure
1736 /* 0: Memory proximity domain attributes */
1738 struct acpi_hmat_proximity_domain {
1739 struct acpi_hmat_structure header;
1740 u16 flags;
1741 u16 reserved1;
1742 u32 processor_PD; /* Processor proximity domain */
1743 u32 memory_PD; /* Memory proximity domain */
1744 u32 reserved2;
1745 u64 reserved3;
1746 u64 reserved4;
1749 /* Masks for Flags field above */
1751 #define ACPI_HMAT_PROCESSOR_PD_VALID (1) /* 1: processor_PD field is valid */
1752 #define ACPI_HMAT_MEMORY_PD_VALID (1<<1) /* 1: memory_PD field is valid */
1753 #define ACPI_HMAT_RESERVATION_HINT (1<<2) /* 1: Reservation hint */
1755 /* 1: System locality latency and bandwidth information */
1757 struct acpi_hmat_locality {
1758 struct acpi_hmat_structure header;
1759 u8 flags;
1760 u8 data_type;
1761 u8 min_transfer_size;
1762 u8 reserved1;
1763 u32 number_of_initiator_Pds;
1764 u32 number_of_target_Pds;
1765 u32 reserved2;
1766 u64 entry_base_unit;
1769 /* Masks for Flags field above */
1771 #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) /* Bits 0-3 */
1773 /* Values for Memory Hierarchy flags */
1775 #define ACPI_HMAT_MEMORY 0
1776 #define ACPI_HMAT_LAST_LEVEL_CACHE 1
1777 #define ACPI_HMAT_1ST_LEVEL_CACHE 2
1778 #define ACPI_HMAT_2ND_LEVEL_CACHE 3
1779 #define ACPI_HMAT_3RD_LEVEL_CACHE 4
1780 #define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10 /* Bit 4: ACPI 6.4 */
1781 #define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20 /* Bit 5: ACPI 6.4 */
1784 /* Values for data_type field above */
1786 #define ACPI_HMAT_ACCESS_LATENCY 0
1787 #define ACPI_HMAT_READ_LATENCY 1
1788 #define ACPI_HMAT_WRITE_LATENCY 2
1789 #define ACPI_HMAT_ACCESS_BANDWIDTH 3
1790 #define ACPI_HMAT_READ_BANDWIDTH 4
1791 #define ACPI_HMAT_WRITE_BANDWIDTH 5
1793 /* 2: Memory side cache information */
1795 struct acpi_hmat_cache {
1796 struct acpi_hmat_structure header;
1797 u32 memory_PD;
1798 u32 reserved1;
1799 u64 cache_size;
1800 u32 cache_attributes;
1801 u16 address_mode;
1802 u16 number_of_SMBIOShandles;
1805 /* Masks for cache_attributes field above */
1807 #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F)
1808 #define ACPI_HMAT_CACHE_LEVEL (0x000000F0)
1809 #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00)
1810 #define ACPI_HMAT_WRITE_POLICY (0x0000F000)
1811 #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000)
1813 #define ACPI_HMAT_CACHE_MODE_UNKNOWN (0)
1814 #define ACPI_HMAT_CACHE_MODE_EXTENDED_LINEAR (1)
1816 /* Values for cache associativity flag */
1818 #define ACPI_HMAT_CA_NONE (0)
1819 #define ACPI_HMAT_CA_DIRECT_MAPPED (1)
1820 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2)
1822 /* Values for write policy flag */
1824 #define ACPI_HMAT_CP_NONE (0)
1825 #define ACPI_HMAT_CP_WB (1)
1826 #define ACPI_HMAT_CP_WT (2)
1828 /*******************************************************************************
1830 * HPET - High Precision Event Timer table
1831 * Version 1
1833 * Conforms to "IA-PC HPET (High Precision Event Timers) Specification",
1834 * Version 1.0a, October 2004
1836 ******************************************************************************/
1838 struct acpi_table_hpet {
1839 struct acpi_table_header header; /* Common ACPI table header */
1840 u32 id; /* Hardware ID of event timer block */
1841 struct acpi_generic_address address; /* Address of event timer block */
1842 u8 sequence; /* HPET sequence number */
1843 u16 minimum_tick; /* Main counter min tick, periodic mode */
1844 u8 flags;
1847 /* Masks for Flags field above */
1849 #define ACPI_HPET_PAGE_PROTECT_MASK (3)
1851 /* Values for Page Protect flags */
1853 enum acpi_hpet_page_protect {
1854 ACPI_HPET_NO_PAGE_PROTECT = 0,
1855 ACPI_HPET_PAGE_PROTECT4 = 1,
1856 ACPI_HPET_PAGE_PROTECT64 = 2
1859 /*******************************************************************************
1861 * IBFT - Boot Firmware Table
1862 * Version 1
1864 * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b
1865 * Specification", Version 1.01, March 1, 2007
1867 * Note: It appears that this table is not intended to appear in the RSDT/XSDT.
1868 * Therefore, it is not currently supported by the disassembler.
1870 ******************************************************************************/
1872 struct acpi_table_ibft {
1873 struct acpi_table_header header; /* Common ACPI table header */
1874 u8 reserved[12];
1877 /* IBFT common subtable header */
1879 struct acpi_ibft_header {
1880 u8 type;
1881 u8 version;
1882 u16 length;
1883 u8 index;
1884 u8 flags;
1887 /* Values for Type field above */
1889 enum acpi_ibft_type {
1890 ACPI_IBFT_TYPE_NOT_USED = 0,
1891 ACPI_IBFT_TYPE_CONTROL = 1,
1892 ACPI_IBFT_TYPE_INITIATOR = 2,
1893 ACPI_IBFT_TYPE_NIC = 3,
1894 ACPI_IBFT_TYPE_TARGET = 4,
1895 ACPI_IBFT_TYPE_EXTENSIONS = 5,
1896 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
1899 /* IBFT subtables */
1901 struct acpi_ibft_control {
1902 struct acpi_ibft_header header;
1903 u16 extensions;
1904 u16 initiator_offset;
1905 u16 nic0_offset;
1906 u16 target0_offset;
1907 u16 nic1_offset;
1908 u16 target1_offset;
1911 struct acpi_ibft_initiator {
1912 struct acpi_ibft_header header;
1913 u8 sns_server[16];
1914 u8 slp_server[16];
1915 u8 primary_server[16];
1916 u8 secondary_server[16];
1917 u16 name_length;
1918 u16 name_offset;
1921 struct acpi_ibft_nic {
1922 struct acpi_ibft_header header;
1923 u8 ip_address[16];
1924 u8 subnet_mask_prefix;
1925 u8 origin;
1926 u8 gateway[16];
1927 u8 primary_dns[16];
1928 u8 secondary_dns[16];
1929 u8 dhcp[16];
1930 u16 vlan;
1931 u8 mac_address[6];
1932 u16 pci_address;
1933 u16 name_length;
1934 u16 name_offset;
1937 struct acpi_ibft_target {
1938 struct acpi_ibft_header header;
1939 u8 target_ip_address[16];
1940 u16 target_ip_socket;
1941 u8 target_boot_lun[8];
1942 u8 chap_type;
1943 u8 nic_association;
1944 u16 target_name_length;
1945 u16 target_name_offset;
1946 u16 chap_name_length;
1947 u16 chap_name_offset;
1948 u16 chap_secret_length;
1949 u16 chap_secret_offset;
1950 u16 reverse_chap_name_length;
1951 u16 reverse_chap_name_offset;
1952 u16 reverse_chap_secret_length;
1953 u16 reverse_chap_secret_offset;
1956 /* Reset to default packing */
1958 #pragma pack()
1960 #endif /* __ACTBL1_H__ */