1 /* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
3 * Copyright (c) 2023 Amlogic, Inc. All rights reserved.
4 * Author: Chuan Liu <chuan.liu@amlogic.com>
7 #ifndef __AMLOGIC_C3_SCMI_CLKC_H
8 #define __AMLOGIC_C3_SCMI_CLKC_H
10 #define CLKID_DDR_PLL_OSC 0
11 #define CLKID_DDR_PHY 1
12 #define CLKID_TOP_PLL_OSC 2
13 #define CLKID_USB_PLL_OSC 3
14 #define CLKID_MIPIISP_VOUT 4
15 #define CLKID_MCLK_PLL_OSC 5
16 #define CLKID_USB_CTRL 6
17 #define CLKID_ETH_PLL_OSC 7
19 #define CLKID_SYS_CLK 9
20 #define CLKID_AXI_CLK 10
21 #define CLKID_CPU_CLK 11
22 #define CLKID_FIXED_PLL_OSC 12
23 #define CLKID_GP1_PLL_OSC 13
24 #define CLKID_SYS_PLL_DIV16 14
25 #define CLKID_CPU_CLK_DIV16 15
27 #endif /* __AMLOGIC_C3_SCMI_CLKC_H */