include/dt-bindings/reset/stm32mp13-resets.h

   1 /* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */
   2 /*
   3  * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
   4  * Author: Gabriel Fernandez <gabriel.fernandez@foss.st.com> for STMicroelectronics.
   5  */
   6
   7 #ifndef _DT_BINDINGS_STM32MP13_RESET_H_
   8 #define _DT_BINDINGS_STM32MP13_RESET_H_
   9
  10 #define TIM2_R          13568
  11 #define TIM3_R          13569
  12 #define TIM4_R          13570
  13 #define TIM5_R          13571
  14 #define TIM6_R          13572
  15 #define TIM7_R          13573
  16 #define LPTIM1_R        13577
  17 #define SPI2_R          13579
  18 #define SPI3_R          13580
  19 #define USART3_R        13583
  20 #define UART4_R         13584
  21 #define UART5_R         13585
  22 #define UART7_R         13586
  23 #define UART8_R         13587
  24 #define I2C1_R          13589
  25 #define I2C2_R          13590
  26 #define SPDIF_R         13594
  27 #define TIM1_R          13632
  28 #define TIM8_R          13633
  29 #define SPI1_R          13640
  30 #define USART6_R        13645
  31 #define SAI1_R          13648
  32 #define SAI2_R          13649
  33 #define DFSDM_R         13652
  34 #define FDCAN_R         13656
  35 #define LPTIM2_R        13696
  36 #define LPTIM3_R        13697
  37 #define LPTIM4_R        13698
  38 #define LPTIM5_R        13699
  39 #define SYSCFG_R        13707
  40 #define VREF_R          13709
  41 #define DTS_R           13712
  42 #define PMBCTRL_R       13713
  43 #define LTDC_R          13760
  44 #define DCMIPP_R        13761
  45 #define DDRPERFM_R      13768
  46 #define USBPHY_R        13776
  47 #define STGEN_R         13844
  48 #define USART1_R        13888
  49 #define USART2_R        13889
  50 #define SPI4_R          13890
  51 #define SPI5_R          13891
  52 #define I2C3_R          13892
  53 #define I2C4_R          13893
  54 #define I2C5_R          13894
  55 #define TIM12_R         13895
  56 #define TIM13_R         13896
  57 #define TIM14_R         13897
  58 #define TIM15_R         13898
  59 #define TIM16_R         13899
  60 #define TIM17_R         13900
  61 #define DMA1_R          13952
  62 #define DMA2_R          13953
  63 #define DMAMUX1_R       13954
  64 #define DMA3_R          13955
  65 #define DMAMUX2_R       13956
  66 #define ADC1_R          13957
  67 #define ADC2_R          13958
  68 #define USBO_R          13960
  69 #define GPIOA_R         14080
  70 #define GPIOB_R         14081
  71 #define GPIOC_R         14082
  72 #define GPIOD_R         14083
  73 #define GPIOE_R         14084
  74 #define GPIOF_R         14085
  75 #define GPIOG_R         14086
  76 #define GPIOH_R         14087
  77 #define GPIOI_R         14088
  78 #define TSC_R           14095
  79 #define PKA_R           14146
  80 #define SAES_R          14147
  81 #define CRYP1_R         14148
  82 #define HASH1_R         14149
  83 #define RNG1_R          14150
  84 #define AXIMC_R         14160
  85 #define MDMA_R          14208
  86 #define MCE_R           14209
  87 #define ETH1MAC_R       14218
  88 #define FMC_R           14220
  89 #define QSPI_R          14222
  90 #define SDMMC1_R        14224
  91 #define SDMMC2_R        14225
  92 #define CRC1_R          14228
  93 #define USBH_R          14232
  94 #define ETH2MAC_R       14238
  95
  96 /* SCMI reset domain identifiers */
  97 #define RST_SCMI_LTDC           0
  98 #define RST_SCMI_MDMA           1
  99
 100 #endif /* _DT_BINDINGS_STM32MP13_RESET_H_ */