1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018, Red Hat, Inc.
12 #include <sys/ioctl.h>
14 #include "test_util.h"
21 #define SMRAM_SIZE 65536
22 #define SMRAM_MEMSLOT ((1 << 16) | 1)
23 #define SMRAM_PAGES (SMRAM_SIZE / PAGE_SIZE)
24 #define SMRAM_GPA 0x1000000
25 #define SMRAM_STAGE 0xfe
28 #define XSTR(s) STR(s)
34 * This is compiled as normal 64-bit code, however, SMI handler is executed
35 * in real-address mode. To stay simple we're limiting ourselves to a mode
36 * independent subset of asm here.
37 * SMI handler always report back fixed stage SMRAM_STAGE.
39 uint8_t smi_handler
[] = {
40 0xb0, SMRAM_STAGE
, /* mov $SMRAM_STAGE, %al */
41 0xe4, SYNC_PORT
, /* in $SYNC_PORT, %al */
45 static inline void sync_with_host(uint64_t phase
)
47 asm volatile("in $" XSTR(SYNC_PORT
)", %%al \n"
51 static void self_smi(void)
53 x2apic_write_reg(APIC_ICR
,
54 APIC_DEST_SELF
| APIC_INT_ASSERT
| APIC_DM_SMI
);
57 static void l2_guest_code(void)
66 static void guest_code(void *arg
)
68 #define L2_GUEST_STACK_SIZE 64
69 unsigned long l2_guest_stack
[L2_GUEST_STACK_SIZE
];
70 uint64_t apicbase
= rdmsr(MSR_IA32_APICBASE
);
71 struct svm_test_data
*svm
= arg
;
72 struct vmx_pages
*vmx_pages
= arg
;
76 wrmsr(MSR_IA32_APICBASE
, apicbase
| X2APIC_ENABLE
);
85 if (this_cpu_has(X86_FEATURE_SVM
)) {
86 generic_svm_setup(svm
, l2_guest_code
,
87 &l2_guest_stack
[L2_GUEST_STACK_SIZE
]);
89 GUEST_ASSERT(prepare_for_vmx_operation(vmx_pages
));
90 GUEST_ASSERT(load_vmcs(vmx_pages
));
91 prepare_vmcs(vmx_pages
, l2_guest_code
,
92 &l2_guest_stack
[L2_GUEST_STACK_SIZE
]);
101 if (this_cpu_has(X86_FEATURE_SVM
)) {
102 run_guest(svm
->vmcb
, svm
->vmcb_gpa
);
103 run_guest(svm
->vmcb
, svm
->vmcb_gpa
);
109 /* Stages 8-11 are eaten by SMM (SMRAM_STAGE reported instead) */
113 sync_with_host(DONE
);
116 void inject_smi(struct kvm_vcpu
*vcpu
)
118 struct kvm_vcpu_events events
;
120 vcpu_events_get(vcpu
, &events
);
122 events
.smi
.pending
= 1;
123 events
.flags
|= KVM_VCPUEVENT_VALID_SMM
;
125 vcpu_events_set(vcpu
, &events
);
128 int main(int argc
, char *argv
[])
130 vm_vaddr_t nested_gva
= 0;
132 struct kvm_vcpu
*vcpu
;
133 struct kvm_regs regs
;
135 struct kvm_x86_state
*state
;
136 int stage
, stage_reported
;
138 TEST_REQUIRE(kvm_has_cap(KVM_CAP_X86_SMM
));
141 vm
= vm_create_with_one_vcpu(&vcpu
, guest_code
);
143 vm_userspace_mem_region_add(vm
, VM_MEM_SRC_ANONYMOUS
, SMRAM_GPA
,
144 SMRAM_MEMSLOT
, SMRAM_PAGES
, 0);
145 TEST_ASSERT(vm_phy_pages_alloc(vm
, SMRAM_PAGES
, SMRAM_GPA
, SMRAM_MEMSLOT
)
146 == SMRAM_GPA
, "could not allocate guest physical addresses?");
148 memset(addr_gpa2hva(vm
, SMRAM_GPA
), 0x0, SMRAM_SIZE
);
149 memcpy(addr_gpa2hva(vm
, SMRAM_GPA
) + 0x8000, smi_handler
,
150 sizeof(smi_handler
));
152 vcpu_set_msr(vcpu
, MSR_IA32_SMBASE
, SMRAM_GPA
);
154 if (kvm_has_cap(KVM_CAP_NESTED_STATE
)) {
155 if (kvm_cpu_has(X86_FEATURE_SVM
))
156 vcpu_alloc_svm(vm
, &nested_gva
);
157 else if (kvm_cpu_has(X86_FEATURE_VMX
))
158 vcpu_alloc_vmx(vm
, &nested_gva
);
162 pr_info("will skip SMM test with VMX enabled\n");
164 vcpu_args_set(vcpu
, 1, nested_gva
);
166 for (stage
= 1;; stage
++) {
168 TEST_ASSERT_KVM_EXIT_REASON(vcpu
, KVM_EXIT_IO
);
170 memset(®s
, 0, sizeof(regs
));
171 vcpu_regs_get(vcpu
, ®s
);
173 stage_reported
= regs
.rax
& 0xff;
175 if (stage_reported
== DONE
)
178 TEST_ASSERT(stage_reported
== stage
||
179 stage_reported
== SMRAM_STAGE
,
180 "Unexpected stage: #%x, got %x",
181 stage
, stage_reported
);
184 * Enter SMM during L2 execution and check that we correctly
185 * return from it. Do not perform save/restore while in SMM yet.
193 * Perform save/restore while the guest is in SMM triggered
194 * during L2 execution.
199 state
= vcpu_save_state(vcpu
);
202 vcpu
= vm_recreate_with_one_vcpu(vm
);
203 vcpu_load_state(vcpu
, state
);
204 kvm_x86_state_cleanup(state
);