1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Baikal-T1 SoC AHCI SATA controller
10 - Serge Semin <fancer.lancer@gmail.com>
13 AHCI SATA controller embedded into the Baikal-T1 SoC is based on the
14 DWC AHCI SATA v4.10a IP-core.
17 - $ref: snps,dwc-ahci-common.yaml#
21 const: baikal,bt1-ahci
25 - description: Peripheral APB bus clock
26 - description: Application AXI BIU clock
27 - description: SATA Ports reference clock
37 - description: Application AXI BIU domain reset
38 - description: SATA Ports clock domain reset
50 $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
58 $ref: /schemas/types.yaml#/definitions/uint32
60 Due to having AXI3 bus interface utilized the maximum Tx DMA
61 transaction size can't exceed 16 beats (AxLEN[3:0]).
62 enum: [ 1, 2, 4, 8, 16 ]
65 $ref: /schemas/types.yaml#/definitions/uint32
67 Due to having AXI3 bus interface utilized the maximum Rx DMA
68 transaction size can't exceed 16 beats (AxLEN[3:0]).
69 enum: [ 1, 2, 4, 8, 16 ]
71 unevaluatedProperties: false
81 unevaluatedProperties: false
86 compatible = "baikal,bt1-ahci";
87 reg = <0x1f050000 0x2000>;
91 interrupts = <0 64 4>;
93 clocks = <&ccu_sys 1>, <&ccu_axi 2>, <&sata_ref_clk>;
94 clock-names = "pclk", "aclk", "ref";
96 resets = <&ccu_axi 2>, <&ccu_sys 0>;
97 reset-names = "arst", "ref";
99 ports-implemented = <0x3>;
104 snps,tx-ts-max = <4>;
105 snps,rx-ts-max = <4>;
111 snps,tx-ts-max = <4>;
112 snps,rx-ts-max = <4>;