1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Low Power SPI (LPSPI) for i.MX
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com>
15 - $ref: /schemas/spi/spi-controller.yaml#
28 - const: fsl,imx7ulp-spi
37 - description: SoC SPI per clock
38 - description: SoC SPI ipg clock
47 - description: TX DMA Channel
48 - description: RX DMA Channel
55 fsl,spi-only-use-cs1-sel:
57 spi common code does not support use of CS signals discontinuously.
58 i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
59 this property to re-config the chipselect value in the LPSPI driver.
64 number of chip selects.
79 unevaluatedProperties: false
83 #include <dt-bindings/clock/imx7ulp-clock.h>
84 #include <dt-bindings/interrupt-controller/arm-gic.h>
87 compatible = "fsl,imx7ulp-spi";
88 reg = <0x40290000 0x10000>;
89 interrupt-parent = <&intc>;
90 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
91 clocks = <&clks IMX7ULP_CLK_LPSPI2>,
92 <&clks IMX7ULP_CLK_DUMMY>;
93 clock-names = "per", "ipg";
95 fsl,spi-only-use-cs1-sel;