1 // SPDX-License-Identifier: GPL-2.0
3 * linux/arch/alpha/lib/memcpy.c
5 * Copyright (C) 1995 Linus Torvalds
9 * This is a reasonably optimized memcpy() routine.
13 * Note that the C code is written to be optimized into good assembly. However,
14 * at this point gcc is unable to sanely compile "if (n >= 0)", resulting in a
15 * explicit compare against 0 (instead of just using the proper "blt reg, xx" or
16 * "bge reg, xx"). I hope alpha-gcc will be fixed to notice this eventually..
19 #include <linux/types.h>
20 #include <linux/export.h>
21 #include <linux/string.h>
24 * This should be done in one go with ldq_u*2/mask/stq_u. Do it
25 * with a macro so that we can fix it up later..
27 #define ALIGN_DEST_TO8_UP(d,s,n) \
31 *(char *) d = *(char *) s; \
34 #define ALIGN_DEST_TO8_DN(d,s,n) \
39 *(char *) d = *(char *) s; \
43 * This should similarly be done with ldq_u*2/mask/stq. The destination
44 * is aligned, but we don't fill in a full quad-word
46 #define DO_REST_UP(d,s,n) \
49 *(char *) d = *(char *) s; \
52 #define DO_REST_DN(d,s,n) \
56 *(char *) d = *(char *) s; \
60 * This should be done with ldq/mask/stq. The source and destination are
61 * aligned, but we don't fill in a full quad-word
63 #define DO_REST_ALIGNED_UP(d,s,n) DO_REST_UP(d,s,n)
64 #define DO_REST_ALIGNED_DN(d,s,n) DO_REST_DN(d,s,n)
67 * This does unaligned memory copies. We want to avoid storing to
68 * an unaligned address, as that would do a read-modify-write cycle.
69 * We also want to avoid double-reading the unaligned reads.
71 * Note the ordering to try to avoid load (and address generation) latencies.
73 static inline void __memcpy_unaligned_up (unsigned long d
, unsigned long s
,
76 ALIGN_DEST_TO8_UP(d
,s
,n
);
77 n
-= 8; /* to avoid compare against 8 in the loop */
79 unsigned long low_word
, high_word
;
80 __asm__("ldq_u %0,%1":"=r" (low_word
):"m" (*(unsigned long *) s
));
83 __asm__("ldq_u %0,%1":"=r" (high_word
):"m" (*(unsigned long *)(s
+8)));
85 __asm__("extql %1,%2,%0"
87 :"r" (low_word
), "r" (s
));
88 __asm__("extqh %1,%2,%0"
90 :"r" (high_word
), "r" (s
));
92 *(unsigned long *) d
= low_word
| tmp
;
101 static inline void __memcpy_unaligned_dn (unsigned long d
, unsigned long s
,
104 /* I don't understand AXP assembler well enough for this. -Tim */
108 * (char *) --d
= * (char *) --s
;
112 * Hmm.. Strange. The __asm__ here is there to make gcc use an integer register
113 * for the load-store. I don't know why, but it would seem that using a floating
114 * point register for the move seems to slow things down (very small difference,
117 * Note the ordering to try to avoid load (and address generation) latencies.
119 static inline void __memcpy_aligned_up (unsigned long d
, unsigned long s
,
122 ALIGN_DEST_TO8_UP(d
,s
,n
);
126 __asm__("ldq %0,%1":"=r" (tmp
):"m" (*(unsigned long *) s
));
129 *(unsigned long *) d
= tmp
;
133 DO_REST_ALIGNED_UP(d
,s
,n
);
135 static inline void __memcpy_aligned_dn (unsigned long d
, unsigned long s
,
140 ALIGN_DEST_TO8_DN(d
,s
,n
);
145 __asm__("ldq %0,%1":"=r" (tmp
):"m" (*(unsigned long *) s
));
148 *(unsigned long *) d
= tmp
;
151 DO_REST_ALIGNED_DN(d
,s
,n
);
156 void * memcpy(void * dest
, const void *src
, size_t n
)
158 if (!(((unsigned long) dest
^ (unsigned long) src
) & 7)) {
159 __memcpy_aligned_up ((unsigned long) dest
, (unsigned long) src
,
163 __memcpy_unaligned_up ((unsigned long) dest
, (unsigned long) src
, n
);
166 EXPORT_SYMBOL(memcpy
);