arch/arm/mach-imx/mach-imx7d.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2015 Freescale Semiconductor, Inc.
   4  */
   5 #include <linux/irqchip.h>
   6 #include <linux/mfd/syscon.h>
   7 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
   8 #include <linux/platform_device.h>
   9 #include <linux/phy.h>
  10 #include <linux/regmap.h>
  11
  12 #include <asm/mach/arch.h>
  13 #include <asm/mach/map.h>
  14
  15 #include "common.h"
  16
  17 static int bcm54220_phy_fixup(struct phy_device *dev)
  18 {
  19         /* enable RXC skew select RGMII copper mode */
  20         phy_write(dev, 0x1e, 0x21);
  21         phy_write(dev, 0x1f, 0x7ea8);
  22         phy_write(dev, 0x1e, 0x2f);
  23         phy_write(dev, 0x1f, 0x71b7);
  24
  25         return 0;
  26 }
  27
  28 #define PHY_ID_BCM54220 0x600d8589
  29
  30 static void __init imx7d_enet_phy_init(void)
  31 {
  32         if (IS_BUILTIN(CONFIG_PHYLIB)) {
  33                 phy_register_fixup_for_uid(PHY_ID_BCM54220, 0xffffffff,
  34                                            bcm54220_phy_fixup);
  35         }
  36 }
  37
  38 static void __init imx7d_enet_clk_sel(void)
  39 {
  40         struct regmap *gpr;
  41
  42         gpr = syscon_regmap_lookup_by_compatible("fsl,imx7d-iomuxc-gpr");
  43         if (!IS_ERR(gpr)) {
  44                 regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_TX_CLK_SEL_MASK, 0);
  45                 regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_CLK_DIR_MASK, 0);
  46         } else {
  47                 pr_err("failed to find fsl,imx7d-iomux-gpr regmap\n");
  48         }
  49 }
  50
  51 static void __init imx7d_enet_init(void)
  52 {
  53         imx7d_enet_phy_init();
  54         imx7d_enet_clk_sel();
  55 }
  56
  57 static void __init imx7d_init_machine(void)
  58 {
  59         imx_anatop_init();
  60         imx7d_enet_init();
  61 }
  62
  63 static void __init imx7d_init_late(void)
  64 {
  65         if (IS_ENABLED(CONFIG_ARM_IMX_CPUFREQ_DT))
  66                 platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0);
  67 }
  68
  69 static void __init imx7d_init_irq(void)
  70 {
  71         imx_init_revision_from_anatop();
  72         imx7_src_init();
  73         irqchip_init();
  74 }
  75
  76 static const char *const imx7d_dt_compat[] __initconst = {
  77         "fsl,imx7d",
  78         "fsl,imx7s",
  79         NULL,
  80 };
  81
  82 DT_MACHINE_START(IMX7D, "Freescale i.MX7 Dual (Device Tree)")
  83         .smp            = smp_ops(imx7_smp_ops),
  84         .init_irq       = imx7d_init_irq,
  85         .init_machine   = imx7d_init_machine,
  86         .init_late      = imx7d_init_late,
  87         .dt_compat      = imx7d_dt_compat,
  88 MACHINE_END