drm/rockchip: Don't change hdmi reference clock rate
[drm/drm-misc.git] / arch / arm / mach-omap2 / cm1_44xx.h
blob13710cefaf4112e47c8fa086a1b170ac44c00052
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * OMAP44xx CM1 instance offset macros
5 * Copyright (C) 2009-2011 Texas Instruments, Inc.
6 * Copyright (C) 2009-2010 Nokia Corporation
8 * Paul Walmsley (paul@pwsan.com)
9 * Rajendra Nayak (rnayak@ti.com)
10 * Benoit Cousson (b-cousson@ti.com)
12 * This file is automatically generated from the OMAP hardware databases.
13 * We respectfully ask that any modifications to this file be coordinated
14 * with the public linux-omap@vger.kernel.org mailing list and the
15 * authors above to ensure that the autogeneration scripts are kept
16 * up-to-date with the file contents.
18 * XXX This file needs to be updated to align on one of "OMAP4", "OMAP44XX",
19 * or "OMAP4430".
22 #ifndef __ARCH_ARM_MACH_OMAP2_CM1_44XX_H
23 #define __ARCH_ARM_MACH_OMAP2_CM1_44XX_H
25 /* CM1 base address */
26 #define OMAP4430_CM1_BASE 0x4a004000
28 #define OMAP44XX_CM1_REGADDR(inst, reg) \
29 OMAP2_L4_IO_ADDRESS(OMAP4430_CM1_BASE + (inst) + (reg))
31 /* CM1 instances */
32 #define OMAP4430_CM1_OCP_SOCKET_INST 0x0000
33 #define OMAP4430_CM1_CKGEN_INST 0x0100
34 #define OMAP4430_CM1_MPU_INST 0x0300
35 #define OMAP4430_CM1_TESLA_INST 0x0400
36 #define OMAP4430_CM1_ABE_INST 0x0500
38 /* CM1 clockdomain register offsets (from instance start) */
39 #define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000
40 #define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000
41 #define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000
43 #endif