arch/arm/mach-omap2/cm2_44xx.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * OMAP44xx CM2 instance offset macros
   4  *
   5  * Copyright (C) 2009-2011 Texas Instruments, Inc.
   6  * Copyright (C) 2009-2010 Nokia Corporation
   7  *
   8  * Paul Walmsley (paul@pwsan.com)
   9  * Rajendra Nayak (rnayak@ti.com)
  10  * Benoit Cousson (b-cousson@ti.com)
  11  *
  12  * This file is automatically generated from the OMAP hardware databases.
  13  * We respectfully ask that any modifications to this file be coordinated
  14  * with the public linux-omap@vger.kernel.org mailing list and the
  15  * authors above to ensure that the autogeneration scripts are kept
  16  * up-to-date with the file contents.
  17  *
  18  * XXX This file needs to be updated to align on one of "OMAP4", "OMAP44XX",
  19  *     or "OMAP4430".
  20  */
  21
  22 #ifndef __ARCH_ARM_MACH_OMAP2_CM2_44XX_H
  23 #define __ARCH_ARM_MACH_OMAP2_CM2_44XX_H
  24
  25 /* CM2 base address */
  26 #define OMAP4430_CM2_BASE               0x4a008000
  27
  28 #define OMAP44XX_CM2_REGADDR(inst, reg)                         \
  29         OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE + (inst) + (reg))
  30
  31 /* CM2 instances */
  32 #define OMAP4430_CM2_OCP_SOCKET_INST    0x0000
  33 #define OMAP4430_CM2_CKGEN_INST         0x0100
  34 #define OMAP4430_CM2_ALWAYS_ON_INST     0x0600
  35 #define OMAP4430_CM2_CORE_INST          0x0700
  36 #define OMAP4430_CM2_IVAHD_INST         0x0f00
  37 #define OMAP4430_CM2_CAM_INST           0x1000
  38 #define OMAP4430_CM2_DSS_INST           0x1100
  39 #define OMAP4430_CM2_GFX_INST           0x1200
  40 #define OMAP4430_CM2_L3INIT_INST        0x1300
  41 #define OMAP4430_CM2_L4PER_INST         0x1400
  42 #define OMAP4430_CM2_CEFUSE_INST        0x1600
  43
  44 /* CM2 clockdomain register offsets (from instance start) */
  45 #define OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS     0x0000
  46 #define OMAP4430_CM2_CORE_L3_1_CDOFFS           0x0000
  47 #define OMAP4430_CM2_CORE_L3_2_CDOFFS           0x0100
  48 #define OMAP4430_CM2_CORE_DUCATI_CDOFFS         0x0200
  49 #define OMAP4430_CM2_CORE_SDMA_CDOFFS           0x0300
  50 #define OMAP4430_CM2_CORE_MEMIF_CDOFFS          0x0400
  51 #define OMAP4430_CM2_CORE_D2D_CDOFFS            0x0500
  52 #define OMAP4430_CM2_CORE_L4CFG_CDOFFS          0x0600
  53 #define OMAP4430_CM2_CORE_L3INSTR_CDOFFS        0x0700
  54 #define OMAP4430_CM2_IVAHD_IVAHD_CDOFFS         0x0000
  55 #define OMAP4430_CM2_CAM_CAM_CDOFFS             0x0000
  56 #define OMAP4430_CM2_DSS_DSS_CDOFFS             0x0000
  57 #define OMAP4430_CM2_GFX_GFX_CDOFFS             0x0000
  58 #define OMAP4430_CM2_L3INIT_L3INIT_CDOFFS       0x0000
  59 #define OMAP4430_CM2_L4PER_L4PER_CDOFFS         0x0000
  60 #define OMAP4430_CM2_L4PER_L4SEC_CDOFFS         0x0180
  61 #define OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS       0x0000
  62
  63 #endif