1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP2+ common Power & Reset Management (PRM) IP block functions
5 * Copyright (C) 2011 Texas Instruments, Inc.
6 * Tero Kristo <t-kristo@ti.com>
8 * For historical purposes, the API used to configure the PRM
9 * interrupt handler refers to it as the "PRCM interrupt." The
10 * underlying registers are located in the PRM on OMAP3/4.
12 * XXX This code should eventually be moved to a PRM driver.
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/init.h>
19 #include <linux/irq.h>
20 #include <linux/interrupt.h>
21 #include <linux/slab.h>
23 #include <linux/of_address.h>
24 #include <linux/clk-provider.h>
25 #include <linux/clk/ti.h>
28 #include "prm2xxx_3xxx.h"
42 * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
43 * XXX this is technically not needed, since
44 * omap_prcm_register_chain_handler() could allocate this based on the
45 * actual amount of memory needed for the SoC
47 #define OMAP_PRCM_MAX_NR_PENDING_REG 2
50 * prcm_irq_chips: an array of all of the "generic IRQ chips" in use
51 * by the PRCM interrupt handler code. There will be one 'chip' per
52 * PRM_{IRQSTATUS,IRQENABLE}_MPU register pair. (So OMAP3 will have
53 * one "chip" and OMAP4 will have two.)
55 static struct irq_chip_generic
**prcm_irq_chips
;
58 * prcm_irq_setup: the PRCM IRQ parameters for the hardware the code
59 * is currently running on. Defined and passed by initialization code
60 * that calls omap_prcm_register_chain_handler().
62 static struct omap_prcm_irq_setup
*prcm_irq_setup
;
64 /* prm_base: base virtual address of the PRM IP block */
65 struct omap_domain_base prm_base
;
70 * Platforms that implement different reboot modes can store the requested
73 enum reboot_mode prm_reboot_mode
;
76 * prm_ll_data: function pointers to SoC-specific implementations of
77 * common PRM functions
79 static struct prm_ll_data null_prm_ll_data
;
80 static struct prm_ll_data
*prm_ll_data
= &null_prm_ll_data
;
82 /* Private functions */
85 * Move priority events from events to priority_events array
87 static void omap_prcm_events_filter_priority(unsigned long *events
,
88 unsigned long *priority_events
)
92 for (i
= 0; i
< prcm_irq_setup
->nr_regs
; i
++) {
94 events
[i
] & prcm_irq_setup
->priority_mask
[i
];
95 events
[i
] ^= priority_events
[i
];
100 * PRCM Interrupt Handler
102 * This is a common handler for the OMAP PRCM interrupts. Pending
103 * interrupts are detected by a call to prcm_pending_events and
104 * dispatched accordingly. Clearing of the wakeup events should be
105 * done by the SoC specific individual handlers.
107 static void omap_prcm_irq_handler(struct irq_desc
*desc
)
109 unsigned long pending
[OMAP_PRCM_MAX_NR_PENDING_REG
];
110 unsigned long priority_pending
[OMAP_PRCM_MAX_NR_PENDING_REG
];
111 struct irq_chip
*chip
= irq_desc_get_chip(desc
);
112 unsigned int virtirq
;
113 int nr_irq
= prcm_irq_setup
->nr_regs
* 32;
116 * If we are suspended, mask all interrupts from PRCM level,
117 * this does not ack them, and they will be pending until we
118 * re-enable the interrupts, at which point the
119 * omap_prcm_irq_handler will be executed again. The
120 * _save_and_clear_irqen() function must ensure that the PRM
121 * write to disable all IRQs has reached the PRM before
122 * returning, or spurious PRCM interrupts may occur during
125 if (prcm_irq_setup
->suspended
) {
126 prcm_irq_setup
->save_and_clear_irqen(prcm_irq_setup
->saved_mask
);
127 prcm_irq_setup
->suspend_save_flag
= true;
131 * Loop until all pending irqs are handled, since
132 * generic_handle_irq() can cause new irqs to come
134 while (!prcm_irq_setup
->suspended
) {
135 prcm_irq_setup
->read_pending_irqs(pending
);
137 /* No bit set, then all IRQs are handled */
138 if (find_first_bit(pending
, nr_irq
) >= nr_irq
)
141 omap_prcm_events_filter_priority(pending
, priority_pending
);
144 * Loop on all currently pending irqs so that new irqs
145 * cannot starve previously pending irqs
148 /* Serve priority events first */
149 for_each_set_bit(virtirq
, priority_pending
, nr_irq
)
150 generic_handle_irq(prcm_irq_setup
->base_irq
+ virtirq
);
152 /* Serve normal events next */
153 for_each_set_bit(virtirq
, pending
, nr_irq
)
154 generic_handle_irq(prcm_irq_setup
->base_irq
+ virtirq
);
157 chip
->irq_ack(&desc
->irq_data
);
159 chip
->irq_eoi(&desc
->irq_data
);
160 chip
->irq_unmask(&desc
->irq_data
);
162 prcm_irq_setup
->ocp_barrier(); /* avoid spurious IRQs */
165 /* Public functions */
168 * omap_prcm_event_to_irq - given a PRCM event name, returns the
169 * corresponding IRQ on which the handler should be registered
170 * @name: name of the PRCM interrupt bit to look up - see struct omap_prcm_irq
172 * Returns the Linux internal IRQ ID corresponding to @name upon success,
173 * or -ENOENT upon failure.
175 int omap_prcm_event_to_irq(const char *name
)
179 if (!prcm_irq_setup
|| !name
)
182 for (i
= 0; i
< prcm_irq_setup
->nr_irqs
; i
++)
183 if (!strcmp(prcm_irq_setup
->irqs
[i
].name
, name
))
184 return prcm_irq_setup
->base_irq
+
185 prcm_irq_setup
->irqs
[i
].offset
;
191 * omap_prcm_irq_cleanup - reverses memory allocated and other steps
192 * done by omap_prcm_register_chain_handler()
196 static void omap_prcm_irq_cleanup(void)
201 if (!prcm_irq_setup
) {
202 pr_err("PRCM: IRQ handler not initialized; cannot cleanup\n");
206 if (prcm_irq_chips
) {
207 for (i
= 0; i
< prcm_irq_setup
->nr_regs
; i
++) {
208 if (prcm_irq_chips
[i
])
209 irq_remove_generic_chip(prcm_irq_chips
[i
],
211 prcm_irq_chips
[i
] = NULL
;
213 kfree(prcm_irq_chips
);
214 prcm_irq_chips
= NULL
;
217 kfree(prcm_irq_setup
->saved_mask
);
218 prcm_irq_setup
->saved_mask
= NULL
;
220 kfree(prcm_irq_setup
->priority_mask
);
221 prcm_irq_setup
->priority_mask
= NULL
;
223 irq
= prcm_irq_setup
->irq
;
224 irq_set_chained_handler(irq
, NULL
);
226 if (prcm_irq_setup
->base_irq
> 0)
227 irq_free_descs(prcm_irq_setup
->base_irq
,
228 prcm_irq_setup
->nr_regs
* 32);
229 prcm_irq_setup
->base_irq
= 0;
232 void omap_prcm_irq_prepare(void)
234 prcm_irq_setup
->suspended
= true;
237 void omap_prcm_irq_complete(void)
239 prcm_irq_setup
->suspended
= false;
241 /* If we have not saved the masks, do not attempt to restore */
242 if (!prcm_irq_setup
->suspend_save_flag
)
245 prcm_irq_setup
->suspend_save_flag
= false;
248 * Re-enable all masked PRCM irq sources, this causes the PRCM
249 * interrupt to fire immediately if the events were masked
250 * previously in the chain handler
252 prcm_irq_setup
->restore_irqen(prcm_irq_setup
->saved_mask
);
256 * omap_prcm_register_chain_handler - initializes the prcm chained interrupt
257 * handler based on provided parameters
258 * @irq_setup: hardware data about the underlying PRM/PRCM
260 * Set up the PRCM chained interrupt handler on the PRCM IRQ. Sets up
261 * one generic IRQ chip per PRM interrupt status/enable register pair.
262 * Returns 0 upon success, -EINVAL if called twice or if invalid
263 * arguments are passed, or -ENOMEM on any other error.
265 int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup
*irq_setup
)
268 u32 mask
[OMAP_PRCM_MAX_NR_PENDING_REG
];
270 struct irq_chip_generic
*gc
;
271 struct irq_chip_type
*ct
;
276 nr_regs
= irq_setup
->nr_regs
;
278 if (prcm_irq_setup
) {
279 pr_err("PRCM: already initialized; won't reinitialize\n");
283 if (nr_regs
> OMAP_PRCM_MAX_NR_PENDING_REG
) {
284 pr_err("PRCM: nr_regs too large\n");
288 prcm_irq_setup
= irq_setup
;
290 prcm_irq_chips
= kcalloc(nr_regs
, sizeof(void *), GFP_KERNEL
);
291 prcm_irq_setup
->saved_mask
= kcalloc(nr_regs
, sizeof(u32
),
293 prcm_irq_setup
->priority_mask
= kcalloc(nr_regs
, sizeof(u32
),
296 if (!prcm_irq_chips
|| !prcm_irq_setup
->saved_mask
||
297 !prcm_irq_setup
->priority_mask
)
300 memset(mask
, 0, sizeof(mask
));
302 for (i
= 0; i
< irq_setup
->nr_irqs
; i
++) {
303 offset
= irq_setup
->irqs
[i
].offset
;
304 mask
[offset
>> 5] |= 1 << (offset
& 0x1f);
305 if (irq_setup
->irqs
[i
].priority
)
306 irq_setup
->priority_mask
[offset
>> 5] |=
307 1 << (offset
& 0x1f);
310 irq
= irq_setup
->irq
;
311 irq_set_chained_handler(irq
, omap_prcm_irq_handler
);
313 irq_setup
->base_irq
= irq_alloc_descs(-1, 0, irq_setup
->nr_regs
* 32,
316 if (irq_setup
->base_irq
< 0) {
317 pr_err("PRCM: failed to allocate irq descs: %d\n",
318 irq_setup
->base_irq
);
322 for (i
= 0; i
< irq_setup
->nr_regs
; i
++) {
323 gc
= irq_alloc_generic_chip("PRCM", 1,
324 irq_setup
->base_irq
+ i
* 32, prm_base
.va
,
328 pr_err("PRCM: failed to allocate generic chip\n");
332 ct
->chip
.irq_ack
= irq_gc_ack_set_bit
;
333 ct
->chip
.irq_mask
= irq_gc_mask_clr_bit
;
334 ct
->chip
.irq_unmask
= irq_gc_mask_set_bit
;
336 ct
->regs
.ack
= irq_setup
->ack
+ i
* 4;
337 ct
->regs
.mask
= irq_setup
->mask
+ i
* 4;
339 irq_setup_generic_chip(gc
, mask
[i
], 0, IRQ_NOREQUEST
, 0);
340 prcm_irq_chips
[i
] = gc
;
343 irq
= omap_prcm_event_to_irq("io");
344 omap_pcs_legacy_init(irq
, irq_setup
->reconfigure_io_chain
);
349 omap_prcm_irq_cleanup();
354 * prm_was_any_context_lost_old - was device context lost? (old API)
355 * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
356 * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
357 * @idx: CONTEXT register offset
359 * Return 1 if any bits were set in the *_CONTEXT_* register
360 * identified by (@part, @inst, @idx), which means that some context
361 * was lost for that module; otherwise, return 0. XXX Deprecated;
362 * callers need to use a less-SoC-dependent way to identify hardware
365 bool prm_was_any_context_lost_old(u8 part
, s16 inst
, u16 idx
)
369 if (prm_ll_data
->was_any_context_lost_old
)
370 ret
= prm_ll_data
->was_any_context_lost_old(part
, inst
, idx
);
372 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
379 * prm_clear_context_loss_flags_old - clear context loss flags (old API)
380 * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
381 * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
382 * @idx: CONTEXT register offset
384 * Clear hardware context loss bits for the module identified by
385 * (@part, @inst, @idx). No return value. XXX Deprecated; callers
386 * need to use a less-SoC-dependent way to identify hardware IP
389 void prm_clear_context_loss_flags_old(u8 part
, s16 inst
, u16 idx
)
391 if (prm_ll_data
->clear_context_loss_flags_old
)
392 prm_ll_data
->clear_context_loss_flags_old(part
, inst
, idx
);
394 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
399 * omap_prm_assert_hardreset - assert hardreset for an IP block
400 * @shift: register bit shift corresponding to the reset line
401 * @part: PRM partition
402 * @prm_mod: PRM submodule base or instance offset
403 * @offset: register offset
405 * Asserts a hardware reset line for an IP block.
407 int omap_prm_assert_hardreset(u8 shift
, u8 part
, s16 prm_mod
, u16 offset
)
409 if (!prm_ll_data
->assert_hardreset
) {
410 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
415 return prm_ll_data
->assert_hardreset(shift
, part
, prm_mod
, offset
);
419 * omap_prm_deassert_hardreset - deassert hardreset for an IP block
420 * @shift: register bit shift corresponding to the reset line
421 * @st_shift: reset status bit shift corresponding to the reset line
422 * @part: PRM partition
423 * @prm_mod: PRM submodule base or instance offset
424 * @offset: register offset
425 * @st_offset: status register offset
427 * Deasserts a hardware reset line for an IP block.
429 int omap_prm_deassert_hardreset(u8 shift
, u8 st_shift
, u8 part
, s16 prm_mod
,
430 u16 offset
, u16 st_offset
)
432 if (!prm_ll_data
->deassert_hardreset
) {
433 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
438 return prm_ll_data
->deassert_hardreset(shift
, st_shift
, part
, prm_mod
,
443 * omap_prm_is_hardreset_asserted - check the hardreset status for an IP block
444 * @shift: register bit shift corresponding to the reset line
445 * @part: PRM partition
446 * @prm_mod: PRM submodule base or instance offset
447 * @offset: register offset
449 * Checks if a hardware reset line for an IP block is enabled or not.
451 int omap_prm_is_hardreset_asserted(u8 shift
, u8 part
, s16 prm_mod
, u16 offset
)
453 if (!prm_ll_data
->is_hardreset_asserted
) {
454 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
459 return prm_ll_data
->is_hardreset_asserted(shift
, part
, prm_mod
, offset
);
463 * omap_prm_reset_system - trigger global SW reset
465 * Triggers SoC specific global warm reset to reboot the device.
467 void omap_prm_reset_system(void)
469 if (!prm_ll_data
->reset_system
) {
470 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
475 prm_ll_data
->reset_system();
484 * omap_prm_clear_mod_irqs - clear wake-up events from PRCM interrupt
485 * @module: PRM module to clear wakeups from
486 * @regs: register to clear
487 * @wkst_mask: wkst bits to clear
489 * Clears any wakeup events for the module and register set defined.
490 * Uses SoC specific implementation to do the actual wakeup status
493 int omap_prm_clear_mod_irqs(s16 module
, u8 regs
, u32 wkst_mask
)
495 if (!prm_ll_data
->clear_mod_irqs
) {
496 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
501 return prm_ll_data
->clear_mod_irqs(module
, regs
, wkst_mask
);
505 * omap_prm_vp_check_txdone - check voltage processor TX done status
506 * @vp_id: unique VP instance ID
508 * Checks if voltage processor transmission has been completed.
509 * Returns non-zero if a transmission has completed, 0 otherwise.
511 u32
omap_prm_vp_check_txdone(u8 vp_id
)
513 if (!prm_ll_data
->vp_check_txdone
) {
514 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
519 return prm_ll_data
->vp_check_txdone(vp_id
);
523 * omap_prm_vp_clear_txdone - clears voltage processor TX done status
524 * @vp_id: unique VP instance ID
526 * Clears the status bit for completed voltage processor transmission
527 * returned by prm_vp_check_txdone.
529 void omap_prm_vp_clear_txdone(u8 vp_id
)
531 if (!prm_ll_data
->vp_clear_txdone
) {
532 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
537 prm_ll_data
->vp_clear_txdone(vp_id
);
541 * prm_register - register per-SoC low-level data with the PRM
542 * @pld: low-level per-SoC OMAP PRM data & function pointers to register
544 * Register per-SoC low-level OMAP PRM data and function pointers with
545 * the OMAP PRM common interface. The caller must keep the data
546 * pointed to by @pld valid until it calls prm_unregister() and
547 * it returns successfully. Returns 0 upon success, -EINVAL if @pld
548 * is NULL, or -EEXIST if prm_register() has already been called
549 * without an intervening prm_unregister().
551 int prm_register(struct prm_ll_data
*pld
)
556 if (prm_ll_data
!= &null_prm_ll_data
)
565 * prm_unregister - unregister per-SoC low-level data & function pointers
566 * @pld: low-level per-SoC OMAP PRM data & function pointers to unregister
568 * Unregister per-SoC low-level OMAP PRM data and function pointers
569 * that were previously registered with prm_register(). The
570 * caller may not destroy any of the data pointed to by @pld until
571 * this function returns successfully. Returns 0 upon success, or
572 * -EINVAL if @pld is NULL or if @pld does not match the struct
573 * prm_ll_data * previously registered by prm_register().
575 int prm_unregister(struct prm_ll_data
*pld
)
577 if (!pld
|| prm_ll_data
!= pld
)
580 prm_ll_data
= &null_prm_ll_data
;
585 #ifdef CONFIG_ARCH_OMAP2
586 static struct omap_prcm_init_data omap2_prm_data __initdata
= {
587 .index
= TI_CLKM_PRM
,
588 .init
= omap2xxx_prm_init
,
592 #ifdef CONFIG_ARCH_OMAP3
593 static struct omap_prcm_init_data omap3_prm_data __initdata
= {
594 .index
= TI_CLKM_PRM
,
595 .init
= omap3xxx_prm_init
,
598 * IVA2 offset is a negative value, must offset the prm_base
599 * address by this to get it to positive
601 .offset
= -OMAP3430_IVA2_MOD
,
605 #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_TI81XX)
606 static struct omap_prcm_init_data am3_prm_data __initdata
= {
607 .index
= TI_CLKM_PRM
,
608 .init
= am33xx_prm_init
,
612 #ifdef CONFIG_SOC_TI81XX
613 static struct omap_prcm_init_data dm814_pllss_data __initdata
= {
614 .index
= TI_CLKM_PLLSS
,
615 .init
= am33xx_prm_init
,
619 #ifdef CONFIG_ARCH_OMAP4
620 static struct omap_prcm_init_data omap4_prm_data __initdata
= {
621 .index
= TI_CLKM_PRM
,
622 .init
= omap44xx_prm_init
,
623 .device_inst_offset
= OMAP4430_PRM_DEVICE_INST
,
624 .flags
= PRM_HAS_IO_WAKEUP
| PRM_HAS_VOLTAGE
,
628 #ifdef CONFIG_SOC_OMAP5
629 static struct omap_prcm_init_data omap5_prm_data __initdata
= {
630 .index
= TI_CLKM_PRM
,
631 .init
= omap44xx_prm_init
,
632 .device_inst_offset
= OMAP54XX_PRM_DEVICE_INST
,
633 .flags
= PRM_HAS_IO_WAKEUP
| PRM_HAS_VOLTAGE
,
637 #ifdef CONFIG_SOC_DRA7XX
638 static struct omap_prcm_init_data dra7_prm_data __initdata
= {
639 .index
= TI_CLKM_PRM
,
640 .init
= omap44xx_prm_init
,
641 .device_inst_offset
= DRA7XX_PRM_DEVICE_INST
,
642 .flags
= PRM_HAS_IO_WAKEUP
,
646 #ifdef CONFIG_SOC_AM43XX
647 static struct omap_prcm_init_data am4_prm_data __initdata
= {
648 .index
= TI_CLKM_PRM
,
649 .init
= omap44xx_prm_init
,
650 .device_inst_offset
= AM43XX_PRM_DEVICE_INST
,
651 .flags
= PRM_HAS_IO_WAKEUP
,
655 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
656 static struct omap_prcm_init_data scrm_data __initdata
= {
657 .index
= TI_CLKM_SCRM
,
661 static const struct of_device_id omap_prcm_dt_match_table
[] __initconst
= {
662 #ifdef CONFIG_SOC_AM33XX
663 { .compatible
= "ti,am3-prcm", .data
= &am3_prm_data
},
665 #ifdef CONFIG_SOC_AM43XX
666 { .compatible
= "ti,am4-prcm", .data
= &am4_prm_data
},
668 #ifdef CONFIG_SOC_TI81XX
669 { .compatible
= "ti,dm814-prcm", .data
= &am3_prm_data
},
670 { .compatible
= "ti,dm814-pllss", .data
= &dm814_pllss_data
},
671 { .compatible
= "ti,dm816-prcm", .data
= &am3_prm_data
},
673 #ifdef CONFIG_ARCH_OMAP2
674 { .compatible
= "ti,omap2-prcm", .data
= &omap2_prm_data
},
676 #ifdef CONFIG_ARCH_OMAP3
677 { .compatible
= "ti,omap3-prm", .data
= &omap3_prm_data
},
679 #ifdef CONFIG_ARCH_OMAP4
680 { .compatible
= "ti,omap4-prm", .data
= &omap4_prm_data
},
681 { .compatible
= "ti,omap4-scrm", .data
= &scrm_data
},
683 #ifdef CONFIG_SOC_OMAP5
684 { .compatible
= "ti,omap5-prm", .data
= &omap5_prm_data
},
685 { .compatible
= "ti,omap5-scrm", .data
= &scrm_data
},
687 #ifdef CONFIG_SOC_DRA7XX
688 { .compatible
= "ti,dra7-prm", .data
= &dra7_prm_data
},
694 * omap2_prm_base_init - initialize iomappings for the PRM driver
696 * Detects and initializes the iomappings for the PRM driver, based
697 * on the DT data. Returns 0 in success, negative error value
700 static int __init
omap2_prm_base_init(void)
702 struct device_node
*np
;
703 const struct of_device_id
*match
;
704 struct omap_prcm_init_data
*data
;
708 for_each_matching_node_and_match(np
, omap_prcm_dt_match_table
, &match
) {
709 data
= (struct omap_prcm_init_data
*)match
->data
;
711 ret
= of_address_to_resource(np
, 0, &res
);
717 data
->mem
= ioremap(res
.start
, resource_size(&res
));
719 if (data
->index
== TI_CLKM_PRM
) {
720 prm_base
.va
= data
->mem
+ data
->offset
;
721 prm_base
.pa
= res
.start
+ data
->offset
;
733 int __init
omap2_prcm_base_init(void)
737 ret
= omap2_prm_base_init();
741 return omap2_cm_base_init();
745 * omap_prcm_init - low level init for the PRCM drivers
747 * Initializes the low level clock infrastructure for PRCM drivers.
748 * Returns 0 in success, negative error value in failure.
750 int __init
omap_prcm_init(void)
752 struct device_node
*np
;
753 const struct of_device_id
*match
;
754 const struct omap_prcm_init_data
*data
;
757 for_each_matching_node_and_match(np
, omap_prcm_dt_match_table
, &match
) {
760 ret
= omap2_clk_provider_init(np
, data
->index
, NULL
, data
->mem
);
772 static int __init
prm_late_init(void)
774 if (prm_ll_data
->late_init
)
775 return prm_ll_data
->late_init();
778 subsys_initcall(prm_late_init
);