drm/rockchip: Don't change hdmi reference clock rate
[drm/drm-misc.git] / arch / arm / mach-s3c / pm-core-s3c64xx.h
blob24933c4ea1a2db72fcd504c86eabebcb5406f699
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * S3C64XX - PM core support for arch/arm/plat-s3c/pm.c
9 */
11 #ifndef __MACH_S3C64XX_PM_CORE_H
12 #define __MACH_S3C64XX_PM_CORE_H __FILE__
14 #include <linux/serial_s3c.h>
15 #include <linux/delay.h>
17 #include "regs-gpio.h"
18 #include "regs-clock.h"
19 #include "map.h"
21 static inline void s3c_pm_debug_init_uart(void)
25 static inline void s3c_pm_arch_prepare_irqs(void)
27 /* VIC should have already been taken care of */
29 /* clear any pending EINT0 interrupts */
30 __raw_writel(__raw_readl(S3C64XX_EINT0PEND), S3C64XX_EINT0PEND);
33 static inline void s3c_pm_arch_stop_clocks(void)
37 static inline void s3c_pm_arch_show_resume_irqs(void)
41 /* make these defines, we currently do not have any need to change
42 * the IRQ wake controls depending on the CPU we are running on */
43 #ifdef CONFIG_PM_SLEEP
44 #define s3c_irqwake_eintallow ((1 << 28) - 1)
45 #define s3c_irqwake_intallow (~0)
46 #else
47 #define s3c_irqwake_eintallow 0
48 #define s3c_irqwake_intallow 0
49 #endif
51 static inline void s3c_pm_restored_gpios(void)
53 /* ensure sleep mode has been cleared from the system */
55 __raw_writel(0, S3C64XX_SLPEN);
58 static inline void samsung_pm_saved_gpios(void)
60 /* turn on the sleep mode and keep it there, as it seems that during
61 * suspend the xCON registers get re-set and thus you can end up with
62 * problems between going to sleep and resuming.
65 __raw_writel(S3C64XX_SLPEN_USE_xSLP, S3C64XX_SLPEN);
67 #endif /* __MACH_S3C64XX_PM_CORE_H */