arch/arm/mm/fault-armv.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *  linux/arch/arm/mm/fault-armv.c
   4  *
   5  *  Copyright (C) 1995  Linus Torvalds
   6  *  Modifications for ARM processor (c) 1995-2002 Russell King
   7  */
   8 #include <linux/sched.h>
   9 #include <linux/kernel.h>
  10 #include <linux/mm.h>
  11 #include <linux/bitops.h>
  12 #include <linux/vmalloc.h>
  13 #include <linux/init.h>
  14 #include <linux/pagemap.h>
  15 #include <linux/gfp.h>
  16
  17 #include <asm/bugs.h>
  18 #include <asm/cacheflush.h>
  19 #include <asm/cachetype.h>
  20 #include <asm/tlbflush.h>
  21
  22 #include "mm.h"
  23
  24 static pteval_t shared_pte_mask = L_PTE_MT_BUFFERABLE;
  25
  26 #if __LINUX_ARM_ARCH__ < 6
  27 /*
  28  * We take the easy way out of this problem - we make the
  29  * PTE uncacheable.  However, we leave the write buffer on.
  30  *
  31  * Note that the pte lock held when calling update_mmu_cache must also
  32  * guard the pte (somewhere else in the same mm) that we modify here.
  33  * Therefore those configurations which might call adjust_pte (those
  34  * without CONFIG_CPU_CACHE_VIPT) cannot support split page_table_lock.
  35  */
  36 static int do_adjust_pte(struct vm_area_struct *vma, unsigned long address,
  37         unsigned long pfn, pte_t *ptep)
  38 {
  39         pte_t entry = *ptep;
  40         int ret;
  41
  42         /*
  43          * If this page is present, it's actually being shared.
  44          */
  45         ret = pte_present(entry);
  46
  47         /*
  48          * If this page isn't present, or is already setup to
  49          * fault (ie, is old), we can safely ignore any issues.
  50          */
  51         if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) {
  52                 flush_cache_page(vma, address, pfn);
  53                 outer_flush_range((pfn << PAGE_SHIFT),
  54                                   (pfn << PAGE_SHIFT) + PAGE_SIZE);
  55                 pte_val(entry) &= ~L_PTE_MT_MASK;
  56                 pte_val(entry) |= shared_pte_mask;
  57                 set_pte_at(vma->vm_mm, address, ptep, entry);
  58                 flush_tlb_page(vma, address);
  59         }
  60
  61         return ret;
  62 }
  63
  64 static int adjust_pte(struct vm_area_struct *vma, unsigned long address,
  65                       unsigned long pfn, struct vm_fault *vmf)
  66 {
  67         spinlock_t *ptl;
  68         pgd_t *pgd;
  69         p4d_t *p4d;
  70         pud_t *pud;
  71         pmd_t *pmd;
  72         pte_t *pte;
  73         pmd_t pmdval;
  74         int ret;
  75
  76         pgd = pgd_offset(vma->vm_mm, address);
  77         if (pgd_none_or_clear_bad(pgd))
  78                 return 0;
  79
  80         p4d = p4d_offset(pgd, address);
  81         if (p4d_none_or_clear_bad(p4d))
  82                 return 0;
  83
  84         pud = pud_offset(p4d, address);
  85         if (pud_none_or_clear_bad(pud))
  86                 return 0;
  87
  88         pmd = pmd_offset(pud, address);
  89         if (pmd_none_or_clear_bad(pmd))
  90                 return 0;
  91
  92 again:
  93         /*
  94          * This is called while another page table is mapped, so we
  95          * must use the nested version.  This also means we need to
  96          * open-code the spin-locking.
  97          */
  98         pte = pte_offset_map_rw_nolock(vma->vm_mm, pmd, address, &pmdval, &ptl);
  99         if (!pte)
 100                 return 0;
 101
 102         /*
 103          * If we are using split PTE locks, then we need to take the page
 104          * lock here.  Otherwise we are using shared mm->page_table_lock
 105          * which is already locked, thus cannot take it.
 106          */
 107         if (ptl != vmf->ptl) {
 108                 spin_lock_nested(ptl, SINGLE_DEPTH_NESTING);
 109                 if (unlikely(!pmd_same(pmdval, pmdp_get_lockless(pmd)))) {
 110                         pte_unmap_unlock(pte, ptl);
 111                         goto again;
 112                 }
 113         }
 114
 115         ret = do_adjust_pte(vma, address, pfn, pte);
 116
 117         if (ptl != vmf->ptl)
 118                 spin_unlock(ptl);
 119         pte_unmap(pte);
 120
 121         return ret;
 122 }
 123
 124 static void
 125 make_coherent(struct address_space *mapping, struct vm_area_struct *vma,
 126               unsigned long addr, pte_t *ptep, unsigned long pfn,
 127               struct vm_fault *vmf)
 128 {
 129         struct mm_struct *mm = vma->vm_mm;
 130         struct vm_area_struct *mpnt;
 131         unsigned long offset;
 132         pgoff_t pgoff;
 133         int aliases = 0;
 134
 135         pgoff = vma->vm_pgoff + ((addr - vma->vm_start) >> PAGE_SHIFT);
 136
 137         /*
 138          * If we have any shared mappings that are in the same mm
 139          * space, then we need to handle them specially to maintain
 140          * cache coherency.
 141          */
 142         flush_dcache_mmap_lock(mapping);
 143         vma_interval_tree_foreach(mpnt, &mapping->i_mmap, pgoff, pgoff) {
 144                 /*
 145                  * If this VMA is not in our MM, we can ignore it.
 146                  * Note that we intentionally mask out the VMA
 147                  * that we are fixing up.
 148                  */
 149                 if (mpnt->vm_mm != mm || mpnt == vma)
 150                         continue;
 151                 if (!(mpnt->vm_flags & VM_MAYSHARE))
 152                         continue;
 153                 offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
 154                 aliases += adjust_pte(mpnt, mpnt->vm_start + offset, pfn, vmf);
 155         }
 156         flush_dcache_mmap_unlock(mapping);
 157         if (aliases)
 158                 do_adjust_pte(vma, addr, pfn, ptep);
 159 }
 160
 161 /*
 162  * Take care of architecture specific things when placing a new PTE into
 163  * a page table, or changing an existing PTE.  Basically, there are two
 164  * things that we need to take care of:
 165  *
 166  *  1. If PG_dcache_clean is not set for the page, we need to ensure
 167  *     that any cache entries for the kernels virtual memory
 168  *     range are written back to the page.
 169  *  2. If we have multiple shared mappings of the same space in
 170  *     an object, we need to deal with the cache aliasing issues.
 171  *
 172  * Note that the pte lock will be held.
 173  */
 174 void update_mmu_cache_range(struct vm_fault *vmf, struct vm_area_struct *vma,
 175                 unsigned long addr, pte_t *ptep, unsigned int nr)
 176 {
 177         unsigned long pfn = pte_pfn(*ptep);
 178         struct address_space *mapping;
 179         struct folio *folio;
 180
 181         if (!pfn_valid(pfn))
 182                 return;
 183
 184         /*
 185          * The zero page is never written to, so never has any dirty
 186          * cache lines, and therefore never needs to be flushed.
 187          */
 188         if (is_zero_pfn(pfn))
 189                 return;
 190
 191         folio = page_folio(pfn_to_page(pfn));
 192         mapping = folio_flush_mapping(folio);
 193         if (!test_and_set_bit(PG_dcache_clean, &folio->flags))
 194                 __flush_dcache_folio(mapping, folio);
 195         if (mapping) {
 196                 if (cache_is_vivt())
 197                         make_coherent(mapping, vma, addr, ptep, pfn, vmf);
 198                 else if (vma->vm_flags & VM_EXEC)
 199                         __flush_icache_all();
 200         }
 201 }
 202 #endif  /* __LINUX_ARM_ARCH__ < 6 */
 203
 204 /*
 205  * Check whether the write buffer has physical address aliasing
 206  * issues.  If it has, we need to avoid them for the case where
 207  * we have several shared mappings of the same object in user
 208  * space.
 209  */
 210 static int __init check_writebuffer(unsigned long *p1, unsigned long *p2)
 211 {
 212         register unsigned long zero = 0, one = 1, val;
 213
 214         local_irq_disable();
 215         mb();
 216         *p1 = one;
 217         mb();
 218         *p2 = zero;
 219         mb();
 220         val = *p1;
 221         mb();
 222         local_irq_enable();
 223         return val != zero;
 224 }
 225
 226 void __init check_writebuffer_bugs(void)
 227 {
 228         struct page *page;
 229         const char *reason;
 230         unsigned long v = 1;
 231
 232         pr_info("CPU: Testing write buffer coherency: ");
 233
 234         page = alloc_page(GFP_KERNEL);
 235         if (page) {
 236                 unsigned long *p1, *p2;
 237                 pgprot_t prot = __pgprot_modify(PAGE_KERNEL,
 238                                         L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE);
 239
 240                 p1 = vmap(&page, 1, VM_IOREMAP, prot);
 241                 p2 = vmap(&page, 1, VM_IOREMAP, prot);
 242
 243                 if (p1 && p2) {
 244                         v = check_writebuffer(p1, p2);
 245                         reason = "enabling work-around";
 246                 } else {
 247                         reason = "unable to map memory\n";
 248                 }
 249
 250                 vunmap(p1);
 251                 vunmap(p2);
 252                 put_page(page);
 253         } else {
 254                 reason = "unable to grab page\n";
 255         }
 256
 257         if (v) {
 258                 pr_cont("failed, %s\n", reason);
 259                 shared_pte_mask = L_PTE_MT_UNCACHED;
 260         } else {
 261                 pr_cont("ok\n");
 262         }
 263 }