drm/rockchip: Don't change hdmi reference clock rate
[drm/drm-misc.git] / arch / arm / mm / pmsa-v8.c
blob28cdc5468406c447872da251f57f78a224643e34
1 /*
2 * Based on linux/arch/arm/pmsa-v7.c
4 * ARM PMSAv8 supporting functions.
5 */
7 #include <linux/memblock.h>
8 #include <linux/range.h>
10 #include <asm/cp15.h>
11 #include <asm/cputype.h>
12 #include <asm/mpu.h>
14 #include <asm/page.h>
15 #include <asm/sections.h>
17 #include "mm.h"
19 #ifndef CONFIG_CPU_V7M
21 #define PRSEL __ACCESS_CP15(c6, 0, c2, 1)
22 #define PRBAR __ACCESS_CP15(c6, 0, c3, 0)
23 #define PRLAR __ACCESS_CP15(c6, 0, c3, 1)
25 static inline u32 prlar_read(void)
27 return read_sysreg(PRLAR);
30 static inline u32 prbar_read(void)
32 return read_sysreg(PRBAR);
35 static inline void prsel_write(u32 v)
37 write_sysreg(v, PRSEL);
40 static inline void prbar_write(u32 v)
42 write_sysreg(v, PRBAR);
45 static inline void prlar_write(u32 v)
47 write_sysreg(v, PRLAR);
49 #else
51 static inline u32 prlar_read(void)
53 return readl_relaxed(BASEADDR_V7M_SCB + PMSAv8_RLAR);
56 static inline u32 prbar_read(void)
58 return readl_relaxed(BASEADDR_V7M_SCB + PMSAv8_RBAR);
61 static inline void prsel_write(u32 v)
63 writel_relaxed(v, BASEADDR_V7M_SCB + PMSAv8_RNR);
66 static inline void prbar_write(u32 v)
68 writel_relaxed(v, BASEADDR_V7M_SCB + PMSAv8_RBAR);
71 static inline void prlar_write(u32 v)
73 writel_relaxed(v, BASEADDR_V7M_SCB + PMSAv8_RLAR);
76 #endif
78 static struct range __initdata io[MPU_MAX_REGIONS];
79 static struct range __initdata mem[MPU_MAX_REGIONS];
81 static unsigned int __initdata mpu_max_regions;
83 static __init bool is_region_fixed(int number)
85 switch (number) {
86 case PMSAv8_XIP_REGION:
87 case PMSAv8_KERNEL_REGION:
88 return true;
89 default:
90 return false;
94 void __init pmsav8_adjust_lowmem_bounds(void)
96 phys_addr_t mem_end;
97 phys_addr_t reg_start, reg_end;
98 bool first = true;
99 u64 i;
101 for_each_mem_range(i, &reg_start, &reg_end) {
102 if (first) {
103 phys_addr_t phys_offset = PHYS_OFFSET;
106 * Initially only use memory continuous from
107 * PHYS_OFFSET */
108 if (reg_start != phys_offset)
109 panic("First memory bank must be contiguous from PHYS_OFFSET");
110 mem_end = reg_end;
111 first = false;
112 } else {
114 * memblock auto merges contiguous blocks, remove
115 * all blocks afterwards in one go (we can't remove
116 * blocks separately while iterating)
118 pr_notice("Ignoring RAM after %pa, memory at %pa ignored\n",
119 &mem_end, &reg_start);
120 memblock_remove(reg_start, 0 - reg_start);
121 break;
126 static int __init __mpu_max_regions(void)
128 static int max_regions;
129 u32 mpuir;
131 if (max_regions)
132 return max_regions;
134 mpuir = read_cpuid_mputype();
136 max_regions = (mpuir & MPUIR_DREGION_SZMASK) >> MPUIR_DREGION;
138 return max_regions;
141 static int __init __pmsav8_setup_region(unsigned int number, u32 bar, u32 lar)
143 if (number > mpu_max_regions
144 || number >= MPU_MAX_REGIONS)
145 return -ENOENT;
147 dsb();
148 prsel_write(number);
149 isb();
150 prbar_write(bar);
151 prlar_write(lar);
153 mpu_rgn_info.rgns[number].prbar = bar;
154 mpu_rgn_info.rgns[number].prlar = lar;
156 mpu_rgn_info.used++;
158 return 0;
161 static int __init pmsav8_setup_ram(unsigned int number, phys_addr_t start,phys_addr_t end)
163 u32 bar, lar;
165 if (is_region_fixed(number))
166 return -EINVAL;
168 bar = start;
169 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);
171 bar |= PMSAv8_AP_PL1RW_PL0RW | PMSAv8_RGN_SHARED;
172 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_NORMAL) | PMSAv8_LAR_EN;
174 return __pmsav8_setup_region(number, bar, lar);
177 static int __init pmsav8_setup_io(unsigned int number, phys_addr_t start,phys_addr_t end)
179 u32 bar, lar;
181 if (is_region_fixed(number))
182 return -EINVAL;
184 bar = start;
185 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);
187 bar |= PMSAv8_AP_PL1RW_PL0RW | PMSAv8_RGN_SHARED | PMSAv8_BAR_XN;
188 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_DEVICE_nGnRnE) | PMSAv8_LAR_EN;
190 return __pmsav8_setup_region(number, bar, lar);
193 static int __init pmsav8_setup_fixed(unsigned int number, phys_addr_t start,phys_addr_t end)
195 u32 bar, lar;
197 if (!is_region_fixed(number))
198 return -EINVAL;
200 bar = start;
201 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);
203 bar |= PMSAv8_AP_PL1RW_PL0NA | PMSAv8_RGN_SHARED;
204 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_NORMAL) | PMSAv8_LAR_EN;
206 prsel_write(number);
207 isb();
209 if (prbar_read() != bar || prlar_read() != lar)
210 return -EINVAL;
212 /* Reserved region was set up early, we just need a record for secondaries */
213 mpu_rgn_info.rgns[number].prbar = bar;
214 mpu_rgn_info.rgns[number].prlar = lar;
216 mpu_rgn_info.used++;
218 return 0;
221 #ifndef CONFIG_CPU_V7M
222 static int __init pmsav8_setup_vector(unsigned int number, phys_addr_t start,phys_addr_t end)
224 u32 bar, lar;
226 if (number == PMSAv8_KERNEL_REGION)
227 return -EINVAL;
229 bar = start;
230 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);
232 bar |= PMSAv8_AP_PL1RW_PL0NA | PMSAv8_RGN_SHARED;
233 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_NORMAL) | PMSAv8_LAR_EN;
235 return __pmsav8_setup_region(number, bar, lar);
237 #endif
239 void __init pmsav8_setup(void)
241 int i, err = 0;
242 int region = PMSAv8_KERNEL_REGION;
244 /* How many regions are supported ? */
245 mpu_max_regions = __mpu_max_regions();
247 /* RAM: single chunk of memory */
248 add_range(mem, ARRAY_SIZE(mem), 0, memblock.memory.regions[0].base,
249 memblock.memory.regions[0].base + memblock.memory.regions[0].size);
251 /* IO: cover full 4G range */
252 add_range(io, ARRAY_SIZE(io), 0, 0, 0xffffffff);
254 /* RAM and IO: exclude kernel */
255 subtract_range(mem, ARRAY_SIZE(mem), __pa(KERNEL_START), __pa(KERNEL_END));
256 subtract_range(io, ARRAY_SIZE(io), __pa(KERNEL_START), __pa(KERNEL_END));
258 #ifdef CONFIG_XIP_KERNEL
259 /* RAM and IO: exclude xip */
260 subtract_range(mem, ARRAY_SIZE(mem), CONFIG_XIP_PHYS_ADDR, __pa(_exiprom));
261 subtract_range(io, ARRAY_SIZE(io), CONFIG_XIP_PHYS_ADDR, __pa(_exiprom));
262 #endif
264 #ifndef CONFIG_CPU_V7M
265 /* RAM and IO: exclude vectors */
266 subtract_range(mem, ARRAY_SIZE(mem), vectors_base, vectors_base + 2 * PAGE_SIZE);
267 subtract_range(io, ARRAY_SIZE(io), vectors_base, vectors_base + 2 * PAGE_SIZE);
268 #endif
269 /* IO: exclude RAM */
270 for (i = 0; i < ARRAY_SIZE(mem); i++)
271 subtract_range(io, ARRAY_SIZE(io), mem[i].start, mem[i].end);
273 /* Now program MPU */
275 #ifdef CONFIG_XIP_KERNEL
276 /* ROM */
277 err |= pmsav8_setup_fixed(PMSAv8_XIP_REGION, CONFIG_XIP_PHYS_ADDR, __pa(_exiprom));
278 #endif
279 /* Kernel */
280 err |= pmsav8_setup_fixed(region++, __pa(KERNEL_START), __pa(KERNEL_END));
283 /* IO */
284 for (i = 0; i < ARRAY_SIZE(io); i++) {
285 if (!io[i].end)
286 continue;
288 err |= pmsav8_setup_io(region++, io[i].start, io[i].end);
291 /* RAM */
292 for (i = 0; i < ARRAY_SIZE(mem); i++) {
293 if (!mem[i].end)
294 continue;
296 err |= pmsav8_setup_ram(region++, mem[i].start, mem[i].end);
299 /* Vectors */
300 #ifndef CONFIG_CPU_V7M
301 err |= pmsav8_setup_vector(region++, vectors_base, vectors_base + 2 * PAGE_SIZE);
302 #endif
303 if (err)
304 pr_warn("MPU region initialization failure! %d", err);
305 else
306 pr_info("Using ARM PMSAv8 Compliant MPU. Used %d of %d regions\n",
307 mpu_rgn_info.used, mpu_max_regions);