1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/tlbv4.S
5 * Copyright (C) 1997-2002 Russell King
7 * ARM architecture version 4 TLB handling functions.
8 * These assume a split I/D TLBs, and no write buffer.
12 #include <linux/linkage.h>
13 #include <linux/init.h>
14 #include <linux/cfi_types.h>
15 #include <asm/assembler.h>
16 #include <asm/asm-offsets.h>
17 #include <asm/tlbflush.h>
18 #include "proc-macros.S"
22 * v4_flush_user_tlb_range(start, end, mm)
24 * Invalidate a range of TLB entries in the specified user address space.
26 * - start - range start address
27 * - end - range end address
28 * - mm - mm_struct describing address space
31 SYM_TYPED_FUNC_START(v4_flush_user_tlb_range)
33 act_mm r3 @ get current->active_mm
34 eors r3, ip, r3 @ == mm ?
35 retne lr @ no, we dont do anything
36 .v4_flush_kern_tlb_range:
39 1: mcr p15, 0, r0, c8, c7, 1 @ invalidate TLB entry
44 SYM_FUNC_END(v4_flush_user_tlb_range)
47 * v4_flush_kern_tlb_range(start, end)
49 * Invalidate a range of TLB entries in the specified kernel
52 * - start - virtual address (may not be aligned)
53 * - end - virtual address (may not be aligned)
55 #ifdef CONFIG_CFI_CLANG
56 SYM_TYPED_FUNC_START(v4_flush_kern_tlb_range)
57 b .v4_flush_kern_tlb_range
58 SYM_FUNC_END(v4_flush_kern_tlb_range)
60 .globl v4_flush_kern_tlb_range
61 .equ v4_flush_kern_tlb_range, .v4_flush_kern_tlb_range