1 // SPDX-License-Identifier: GPL-2.0-only
3 * Based on arch/arm/kernel/sys_arm.c
5 * Copyright (C) People who wrote linux/arch/i386/kernel/sys_i386.c
6 * Copyright (C) 1995, 1996 Russell King.
7 * Copyright (C) 2012 ARM Ltd.
10 #include <linux/compat.h>
11 #include <linux/cpufeature.h>
12 #include <linux/sched.h>
13 #include <linux/sched/signal.h>
14 #include <linux/slab.h>
15 #include <linux/syscalls.h>
16 #include <linux/uaccess.h>
18 #include <asm/cacheflush.h>
19 #include <asm/system_misc.h>
20 #include <asm/tlbflush.h>
21 #include <asm/unistd.h>
24 __do_compat_cache_op(unsigned long start
, unsigned long end
)
29 unsigned long chunk
= min(PAGE_SIZE
, end
- start
);
31 if (fatal_signal_pending(current
))
34 if (cpus_have_final_cap(ARM64_WORKAROUND_1542419
)) {
36 * The workaround requires an inner-shareable tlbi.
37 * We pick the reserved-ASID to minimise the impact.
39 __tlbi(aside1is
, __TLBI_VADDR(0, 0));
43 ret
= caches_clean_inval_user_pou(start
, start
+ chunk
);
49 } while (start
< end
);
55 do_compat_cache_op(unsigned long start
, unsigned long end
, int flags
)
57 if (end
< start
|| flags
)
60 if (!access_ok((const void __user
*)start
, end
- start
))
63 return __do_compat_cache_op(start
, end
);
66 * Handle all unrecognised system calls.
68 long compat_arm_syscall(struct pt_regs
*regs
, int scno
)
74 * Flush a region from virtual address 'r0' to virtual address 'r1'
75 * _exclusive_. There is no alignment requirement on either address;
76 * user space does not need to know the hardware cache layout.
78 * r2 contains flags. It should ALWAYS be passed as ZERO until it
79 * is defined to be something else. For now we ignore it, but may
80 * the fires of hell burn in your belly if you break this rule. ;)
82 * (at a later date, we may want to allow this call to not flush
83 * various aspects of the cache. Passing '0' will guarantee that
84 * everything necessary gets flushed to maintain consistency in
85 * the specified region).
87 case __ARM_NR_compat_cacheflush
:
88 return do_compat_cache_op(regs
->regs
[0], regs
->regs
[1], regs
->regs
[2]);
90 case __ARM_NR_compat_set_tls
:
91 current
->thread
.uw
.tp_value
= regs
->regs
[0];
94 * Protect against register corruption from context switch.
95 * See comment in tls_thread_flush.
98 write_sysreg(regs
->regs
[0], tpidrro_el0
);
103 * Calls 0xf0xxx..0xf07ff are defined to return -ENOSYS
104 * if not implemented, rather than raising SIGILL. This
105 * way the calling program can gracefully determine whether
106 * a feature is supported.
108 if (scno
< __ARM_NR_COMPAT_END
)
113 addr
= instruction_pointer(regs
) - (compat_thumb_mode(regs
) ? 2 : 4);
115 arm64_notify_die("Oops - bad compat syscall(2)", regs
,
116 SIGILL
, ILL_ILLTRP
, addr
, 0);