1 # SPDX-License-Identifier: GPL-2.0
6 select ACPI_GENERIC_GSI if ACPI
7 select ACPI_MCFG if ACPI
8 select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU
9 select ACPI_PPTT if ACPI
10 select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI
11 select ARCH_BINFMT_ELF_STATE
12 select ARCH_DISABLE_KASAN_INLINE
13 select ARCH_ENABLE_MEMORY_HOTPLUG
14 select ARCH_ENABLE_MEMORY_HOTREMOVE
15 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
16 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
17 select ARCH_HAS_CPU_FINALIZE_INIT
18 select ARCH_HAS_CURRENT_STACK_POINTER
19 select ARCH_HAS_DEBUG_VM_PGTABLE
20 select ARCH_HAS_FAST_MULTIPLIER
21 select ARCH_HAS_FORTIFY_SOURCE
23 select ARCH_HAS_KERNEL_FPU_SUPPORT if CPU_HAS_FPU
24 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
25 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
26 select ARCH_HAS_PREEMPT_LAZY
27 select ARCH_HAS_PTE_DEVMAP
28 select ARCH_HAS_PTE_SPECIAL
29 select ARCH_HAS_SET_MEMORY
30 select ARCH_HAS_SET_DIRECT_MAP
31 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
32 select ARCH_INLINE_READ_LOCK if !PREEMPTION
33 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
34 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
35 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
36 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
37 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
38 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
39 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
40 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
41 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
42 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
43 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
44 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
45 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
46 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
47 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
48 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
49 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
50 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
51 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
52 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
53 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
54 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
55 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
56 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
57 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
58 select ARCH_KEEP_MEMBLOCK
59 select ARCH_MIGHT_HAVE_PC_PARPORT
60 select ARCH_MIGHT_HAVE_PC_SERIO
61 select ARCH_SPARSEMEM_ENABLE
63 select ARCH_SUPPORTS_ACPI
64 select ARCH_SUPPORTS_ATOMIC_RMW
65 select ARCH_SUPPORTS_HUGETLBFS
66 select ARCH_SUPPORTS_INT128 if CC_HAS_INT128
67 select ARCH_SUPPORTS_LTO_CLANG
68 select ARCH_SUPPORTS_LTO_CLANG_THIN
69 select ARCH_SUPPORTS_NUMA_BALANCING
70 select ARCH_SUPPORTS_RT
71 select ARCH_USE_BUILTIN_BSWAP
72 select ARCH_USE_CMPXCHG_LOCKREF
73 select ARCH_USE_QUEUED_RWLOCKS
74 select ARCH_USE_QUEUED_SPINLOCKS
75 select ARCH_WANT_DEFAULT_BPF_JIT
76 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
77 select ARCH_WANT_LD_ORPHAN_WARN
78 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP
79 select ARCH_WANTS_NO_INSTR
80 select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
81 select BUILDTIME_TABLE_SORT
85 select GENERIC_CLOCKEVENTS
86 select GENERIC_CMOS_UPDATE
87 select GENERIC_CPU_AUTOPROBE
88 select GENERIC_CPU_DEVICES
89 select GENERIC_CPU_VULNERABILITIES
91 select GENERIC_GETTIMEOFDAY
92 select GENERIC_IOREMAP if !ARCH_IOREMAP
93 select GENERIC_IRQ_MATRIX_ALLOCATOR
94 select GENERIC_IRQ_MULTI_HANDLER
95 select GENERIC_IRQ_PROBE
96 select GENERIC_IRQ_SHOW
97 select GENERIC_LIB_ASHLDI3
98 select GENERIC_LIB_ASHRDI3
99 select GENERIC_LIB_CMPDI2
100 select GENERIC_LIB_LSHRDI3
101 select GENERIC_LIB_UCMPDI2
102 select GENERIC_LIB_DEVMEM_IS_ALLOWED
103 select GENERIC_PCI_IOMAP
104 select GENERIC_SCHED_CLOCK
105 select GENERIC_SMP_IDLE_THREAD
106 select GENERIC_TIME_VSYSCALL
107 select GENERIC_VDSO_TIME_NS
110 select HAVE_ARCH_AUDITSYSCALL
111 select HAVE_ARCH_JUMP_LABEL
112 select HAVE_ARCH_JUMP_LABEL_RELATIVE
113 select HAVE_ARCH_KASAN
114 select HAVE_ARCH_KFENCE
115 select HAVE_ARCH_KGDB if PERF_EVENTS
116 select HAVE_ARCH_MMAP_RND_BITS if MMU
117 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET
118 select HAVE_ARCH_SECCOMP
119 select HAVE_ARCH_SECCOMP_FILTER
120 select HAVE_ARCH_TRACEHOOK
121 select HAVE_ARCH_TRANSPARENT_HUGEPAGE
122 select HAVE_ARCH_USERFAULTFD_MINOR if USERFAULTFD
123 select HAVE_ASM_MODVERSIONS
124 select HAVE_CONTEXT_TRACKING_USER
125 select HAVE_C_RECORDMCOUNT
126 select HAVE_DEBUG_KMEMLEAK
127 select HAVE_DEBUG_STACKOVERFLOW
128 select HAVE_DMA_CONTIGUOUS
129 select HAVE_DYNAMIC_FTRACE
130 select HAVE_DYNAMIC_FTRACE_WITH_ARGS
131 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS
132 select HAVE_DYNAMIC_FTRACE_WITH_REGS
134 select HAVE_EFFICIENT_UNALIGNED_ACCESS if !ARCH_STRICT_ALIGN
135 select HAVE_EXIT_THREAD
137 select HAVE_FTRACE_MCOUNT_RECORD
138 select HAVE_FUNCTION_ARG_ACCESS_API
139 select HAVE_FUNCTION_ERROR_INJECTION
140 select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER
141 select HAVE_FUNCTION_GRAPH_TRACER
142 select HAVE_FUNCTION_TRACER
143 select HAVE_GCC_PLUGINS
144 select HAVE_GENERIC_VDSO
145 select HAVE_HW_BREAKPOINT if PERF_EVENTS
146 select HAVE_IOREMAP_PROT
147 select HAVE_IRQ_EXIT_ON_IRQ_STACK
148 select HAVE_IRQ_TIME_ACCOUNTING
150 select HAVE_KPROBES_ON_FTRACE
151 select HAVE_KRETPROBES
152 select HAVE_LIVEPATCH
153 select HAVE_MOD_ARCH_SPECIFIC
155 select HAVE_OBJTOOL if AS_HAS_EXPLICIT_RELOCS && AS_HAS_THIN_ADD_SUB
157 select HAVE_PERF_EVENTS
158 select HAVE_PERF_REGS
159 select HAVE_PERF_USER_STACK_DUMP
160 select HAVE_POSIX_CPU_TIMERS_TASK_WORK
161 select HAVE_PREEMPT_DYNAMIC_KEY
162 select HAVE_REGS_AND_STACK_ACCESS_API
163 select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC
167 select HAVE_SAMPLE_FTRACE_DIRECT
168 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI
169 select HAVE_SETUP_PER_CPU_AREA if NUMA
170 select HAVE_STACK_VALIDATION if HAVE_OBJTOOL
171 select HAVE_STACKPROTECTOR
172 select HAVE_SYSCALL_TRACEPOINTS
174 select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP
175 select IRQ_FORCED_THREADING
176 select IRQ_LOONGARCH_CPU
177 select LOCK_MM_AND_FIND_VMA
178 select MMU_GATHER_MERGE_VMAS if MMU
179 select MODULES_USE_ELF_RELA if MODULES
180 select NEED_PER_CPU_EMBED_FIRST_CHUNK
181 select NEED_PER_CPU_PAGE_FIRST_CHUNK
183 select OF_EARLY_FLATTREE
185 select PCI_DOMAINS_GENERIC
186 select PCI_ECAM if ACPI
188 select PCI_MSI_ARCH_FALLBACKS
190 select PERF_USE_VMALLOC
193 select SYSCTL_ARCH_UNALIGN_ALLOW
194 select SYSCTL_ARCH_UNALIGN_NO_WARN
195 select SYSCTL_EXCEPTION_TRACE
197 select TRACE_IRQFLAGS_SUPPORT
198 select USE_PERCPU_NUMA_NODE_ID
199 select USER_STACKTRACE_SUPPORT
200 select VDSO_GETRANDOM
213 config GENERIC_BUG_RELATIVE_POINTERS
215 depends on GENERIC_BUG
217 config GENERIC_CALIBRATE_DELAY
223 config GENERIC_HWEIGHT
226 config L1_CACHE_SHIFT
230 config LOCKDEP_SUPPORT
234 config STACKTRACE_SUPPORT
238 # MACH_LOONGSON32 and MACH_LOONGSON64 are deliberately carried over from the
239 # MIPS Loongson code, to preserve Loongson-specific code paths in drivers that
240 # are shared between architectures, and specifically expecting the symbols.
241 config MACH_LOONGSON32
244 config MACH_LOONGSON64
247 config FIX_EARLYCON_MEM
250 config PGTABLE_2LEVEL
253 config PGTABLE_3LEVEL
256 config PGTABLE_4LEVEL
259 config PGTABLE_LEVELS
261 default 2 if PGTABLE_2LEVEL
262 default 3 if PGTABLE_3LEVEL
263 default 4 if PGTABLE_4LEVEL
265 config SCHED_OMIT_FRAME_POINTER
269 config AS_HAS_EXPLICIT_RELOCS
270 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x))
272 config AS_HAS_FCSR_CLASS
273 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0)
275 config AS_HAS_THIN_ADD_SUB
276 def_bool $(cc-option,-Wa$(comma)-mthin-add-sub) || AS_IS_LLVM
278 config AS_HAS_LSX_EXTENSION
279 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)
281 config AS_HAS_LASX_EXTENSION
282 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0)
284 config AS_HAS_LBT_EXTENSION
285 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0)
287 config AS_HAS_LVZ_EXTENSION
288 def_bool $(as-instr,hvcl 0)
290 menu "Kernel type and options"
292 source "kernel/Kconfig.hz"
295 prompt "Page Table Layout"
296 default 16KB_2LEVEL if 32BIT
297 default 16KB_3LEVEL if 64BIT
299 Allows choosing the page table layout, which is a combination
300 of page size and page table levels. The size of virtual memory
301 address space are determined by the page table layout.
304 bool "4KB with 3 levels"
305 select HAVE_PAGE_SIZE_4KB
306 select PGTABLE_3LEVEL
308 This option selects 4KB page size with 3 level page tables, which
309 support a maximum of 39 bits of application virtual memory.
312 bool "4KB with 4 levels"
313 select HAVE_PAGE_SIZE_4KB
314 select PGTABLE_4LEVEL
316 This option selects 4KB page size with 4 level page tables, which
317 support a maximum of 48 bits of application virtual memory.
320 bool "16KB with 2 levels"
321 select HAVE_PAGE_SIZE_16KB
322 select PGTABLE_2LEVEL
324 This option selects 16KB page size with 2 level page tables, which
325 support a maximum of 36 bits of application virtual memory.
328 bool "16KB with 3 levels"
329 select HAVE_PAGE_SIZE_16KB
330 select PGTABLE_3LEVEL
332 This option selects 16KB page size with 3 level page tables, which
333 support a maximum of 47 bits of application virtual memory.
336 bool "64KB with 2 levels"
337 select HAVE_PAGE_SIZE_64KB
338 select PGTABLE_2LEVEL
340 This option selects 64KB page size with 2 level page tables, which
341 support a maximum of 42 bits of application virtual memory.
344 bool "64KB with 3 levels"
345 select HAVE_PAGE_SIZE_64KB
346 select PGTABLE_3LEVEL
348 This option selects 64KB page size with 3 level page tables, which
349 support a maximum of 55 bits of application virtual memory.
354 string "Built-in kernel command line"
356 For most platforms, the arguments for the kernel's command line
357 are provided at run-time, during boot. However, there are cases
358 where either no arguments are being provided or the provided
359 arguments are insufficient or even invalid.
361 When that occurs, it is possible to define a built-in command
362 line here and choose how the kernel should use it later on.
365 prompt "Kernel command line type"
366 default CMDLINE_BOOTLOADER
368 Choose how the kernel will handle the provided built-in command
371 config CMDLINE_BOOTLOADER
372 bool "Use bootloader kernel arguments if available"
374 Prefer the command-line passed by the boot loader if available.
375 Use the built-in command line as fallback in case we get nothing
376 during boot. This is the default behaviour.
378 config CMDLINE_EXTEND
379 bool "Use built-in to extend bootloader kernel arguments"
381 The command-line arguments provided during boot will be
382 appended to the built-in command line. This is useful in
383 cases where the provided arguments are insufficient and
384 you don't want to or cannot modify them.
387 bool "Always use the built-in kernel command string"
389 Always use the built-in command line, even if we get one during
390 boot. This is useful in case you need to override the provided
391 command line on systems where you don't have or want control
397 bool "Enable built-in dtb in kernel"
400 Some existing systems do not provide a canonical device tree to
401 the kernel at boot time. Let's provide a device tree table in the
402 kernel, keyed by the dts filename, containing the relevant DTBs.
404 Built-in DTBs are generic enough and can be used as references.
406 config BUILTIN_DTB_NAME
407 string "Source file for built-in dtb"
408 depends on BUILTIN_DTB
410 Base name (without suffix, relative to arch/loongarch/boot/dts/)
411 for the DTS file that will be used to produce the DTB linked into
415 bool "Enable DMI scanning"
416 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
419 This enables SMBIOS/DMI feature for systems, and scanning of
420 DMI to identify machine quirks.
423 bool "EFI runtime service support"
425 select EFI_RUNTIME_WRAPPERS
427 This enables the kernel to use EFI runtime services that are
428 available (such as the EFI variable services).
431 bool "EFI boot stub support"
434 select EFI_GENERIC_STUB
436 This kernel feature allows the kernel to be loaded directly by
437 EFI firmware without the use of a bootloader.
440 bool "SMT scheduler support"
444 Improves scheduler's performance when there are multiple
445 threads in one physical core.
448 bool "Multi-Processing support"
450 This enables support for systems with more than one CPU. If you have
451 a system with only one CPU, say N. If you have a system with more
454 If you say N here, the kernel will run on uni- and multiprocessor
455 machines, but will use only one CPU of a multiprocessor machine. If
456 you say Y here, the kernel will run on many, but not all,
457 uniprocessor machines. On a uniprocessor machine, the kernel
458 will run faster if you say N here.
460 See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>.
462 If you don't know what to do here, say N.
465 bool "Support for hot-pluggable CPUs"
467 select GENERIC_IRQ_MIGRATION
469 Say Y here to allow turning CPUs off and on. CPUs can be
470 controlled through /sys/devices/system/cpu.
471 (Note: power management support will enable this option
472 automatically on SMP systems. )
473 Say N if you want to disable CPU hotplug.
476 int "Maximum number of CPUs (2-256)"
481 This allows you to specify the maximum number of CPUs which this
488 Say Y to compile the kernel with NUMA (Non-Uniform Memory Access)
489 support. This option improves performance on systems with more
490 than one NUMA node; on single node systems it is generally better
491 to leave it disabled.
498 config ARCH_FORCE_MAX_ORDER
499 int "Maximum zone order"
500 default "13" if PAGE_SIZE_64KB
501 default "11" if PAGE_SIZE_16KB
504 The kernel memory allocator divides physically contiguous memory
505 blocks into "zones", where each zone is a power of two number of
506 pages. This option selects the largest power of two that the kernel
507 keeps in the memory allocator. If you need to allocate very large
508 blocks of physically contiguous memory, then you may need to
511 The page size is not necessarily 4KB. Keep this in mind
512 when choosing a value for this option.
515 bool "Enable LoongArch DMW-based ioremap()"
517 We use generic TLB-based ioremap() by default since it has page
518 protection support. However, you can enable LoongArch DMW-based
519 ioremap() for better performance.
521 config ARCH_WRITECOMBINE
522 bool "Enable WriteCombine (WUC) for ioremap()"
524 LoongArch maintains cache coherency in hardware, but when paired
525 with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which
526 is similar to WriteCombine) is out of the scope of cache coherency
527 machanism for PCIe devices (this is a PCIe protocol violation, which
528 may be fixed in newer chipsets).
530 This means WUC can only used for write-only memory regions now, so
531 this option is disabled by default, making WUC silently fallback to
532 SUC for ioremap(). You can enable this option if the kernel is ensured
533 to run on hardware without this bug.
535 You can override this setting via writecombine=on/off boot parameter.
537 config ARCH_STRICT_ALIGN
538 bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT
541 Not all LoongArch cores support h/w unaligned access, we can use
542 -mstrict-align build parameter to prevent unaligned accesses.
544 CPUs with h/w unaligned access support:
545 Loongson-2K2000/2K3000/3A5000/3C5000/3D5000.
547 CPUs without h/w unaligned access support:
548 Loongson-2K500/2K1000.
550 This option is enabled by default to make the kernel be able to run
551 on all LoongArch systems. But you can disable it manually if you want
552 to run kernel only on systems with h/w unaligned access support in
553 order to optimise for performance.
560 bool "Support for the Loongson SIMD Extension"
561 depends on AS_HAS_LSX_EXTENSION
563 Loongson SIMD Extension (LSX) introduces 128 bit wide vector registers
564 and a set of SIMD instructions to operate on them. When this option
565 is enabled the kernel will support allocating & switching LSX
566 vector register contexts. If you know that your kernel will only be
567 running on CPUs which do not support LSX or that your userland will
568 not be making use of it then you may wish to say N here to reduce
569 the size & complexity of your kernel.
574 bool "Support for the Loongson Advanced SIMD Extension"
575 depends on CPU_HAS_LSX
576 depends on AS_HAS_LASX_EXTENSION
578 Loongson Advanced SIMD Extension (LASX) introduces 256 bit wide vector
579 registers and a set of SIMD instructions to operate on them. When this
580 option is enabled the kernel will support allocating & switching LASX
581 vector register contexts. If you know that your kernel will only be
582 running on CPUs which do not support LASX or that your userland will
583 not be making use of it then you may wish to say N here to reduce
584 the size & complexity of your kernel.
589 bool "Support for the Loongson Binary Translation Extension"
590 depends on AS_HAS_LBT_EXTENSION
592 Loongson Binary Translation (LBT) introduces 4 scratch registers (SCR0
593 to SCR3), x86/ARM eflags (eflags) and x87 fpu stack pointer (ftop).
594 Enabling this option allows the kernel to allocate and switch registers
597 If you want to use this feature, such as the Loongson Architecture
598 Translator (LAT), say Y.
600 config CPU_HAS_PREFETCH
604 config ARCH_SUPPORTS_KEXEC
607 config ARCH_SUPPORTS_CRASH_DUMP
610 config ARCH_DEFAULT_CRASH_DUMP
613 config ARCH_SELECTS_CRASH_DUMP
615 depends on CRASH_DUMP
618 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
619 def_bool CRASH_RESERVE
622 bool "Relocatable kernel"
625 This builds the kernel as a Position Independent Executable (PIE),
626 which retains all relocation metadata required, so as to relocate
627 the kernel binary at runtime to a different virtual address from
630 config RANDOMIZE_BASE
631 bool "Randomize the address of the kernel (KASLR)"
632 depends on RELOCATABLE
634 Randomizes the physical and virtual address at which the
635 kernel image is loaded, as a security feature that
636 deters exploit attempts relying on knowledge of the location
639 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
643 config RANDOMIZE_BASE_MAX_OFFSET
644 hex "Maximum KASLR offset" if EXPERT
645 depends on RANDOMIZE_BASE
649 When KASLR is active, this provides the maximum offset that will
650 be applied to the kernel image. It should be set according to the
651 amount of physical RAM available in the target system.
653 This is limited by the size of the lower address memory, 256MB.
655 source "kernel/livepatch/Kconfig"
658 bool "Enable paravirtualization code"
659 depends on AS_HAS_LVZ_EXTENSION
661 This changes the kernel so it can modify itself when it is run
662 under a hypervisor, potentially improving performance significantly
663 over full virtualization. However, when run without a hypervisor
664 the kernel is theoretically slower and slightly larger.
666 config PARAVIRT_TIME_ACCOUNTING
667 bool "Paravirtual steal time accounting"
670 Select this option to enable fine granularity task steal time
671 accounting. Time spent executing other tasks in parallel with
672 the current vCPU is discounted from the vCPU power. To account for
673 that, there can be a small performance impact.
675 If in doubt, say N here.
679 config ARCH_SELECT_MEMORY_MODEL
682 config ARCH_FLATMEM_ENABLE
686 config ARCH_SPARSEMEM_ENABLE
688 select SPARSEMEM_VMEMMAP_ENABLE
690 Say Y to support efficient handling of sparse physical memory,
691 for architectures which are either NUMA (Non-Uniform Memory Access)
692 or have huge holes in the physical address space for other reasons.
693 See <file:Documentation/mm/numa.rst> for more.
695 config ARCH_MEMORY_PROBE
697 depends on MEMORY_HOTPLUG
703 config ARCH_MMAP_RND_BITS_MIN
706 config ARCH_MMAP_RND_BITS_MAX
709 config ARCH_SUPPORTS_UPROBES
712 config KASAN_SHADOW_OFFSET
717 menu "Power management options"
719 config ARCH_SUSPEND_POSSIBLE
722 config ARCH_HIBERNATION_POSSIBLE
725 source "kernel/power/Kconfig"
726 source "drivers/acpi/Kconfig"
727 source "drivers/cpufreq/Kconfig"
731 source "arch/loongarch/kvm/Kconfig"