arch/mips/include/asm/addrspace.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1996, 99 Ralf Baechle
   7  * Copyright (C) 2000, 2002  Maciej W. Rozycki
   8  * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
   9  */
  10 #ifndef _ASM_ADDRSPACE_H
  11 #define _ASM_ADDRSPACE_H
  12
  13 #include <spaces.h>
  14
  15 /*
  16  *  Configure language
  17  */
  18 #ifdef __ASSEMBLY__
  19 #define _ATYPE_
  20 #define _ATYPE32_
  21 #define _ATYPE64_
  22 #define _CONST64_(x)    x
  23 #else
  24 #define _ATYPE_         __PTRDIFF_TYPE__
  25 #define _ATYPE32_       int
  26 #define _ATYPE64_       __s64
  27 #ifdef CONFIG_64BIT
  28 #define _CONST64_(x)    x ## L
  29 #else
  30 #define _CONST64_(x)    x ## LL
  31 #endif
  32 #endif
  33
  34 /*
  35  *  32-bit MIPS address spaces
  36  */
  37 #ifdef __ASSEMBLY__
  38 #define _ACAST32_
  39 #define _ACAST64_
  40 #else
  41 #define _ACAST32_               (_ATYPE_)(_ATYPE32_)    /* widen if necessary */
  42 #define _ACAST64_               (_ATYPE64_)             /* do _not_ narrow */
  43 #endif
  44
  45 /*
  46  * Returns the kernel segment base of a given address
  47  */
  48 #define KSEGX(a)                ((_ACAST32_(a)) & _ACAST32_(0xe0000000))
  49
  50 /*
  51  * Gives the size of each kernel segment
  52  */
  53 #define CSEGX_SIZE              0x20000000
  54
  55 /*
  56  * Returns the physical address of a CKSEGx / XKPHYS address
  57  */
  58 #define CPHYSADDR(a)            ((_ACAST32_(a)) & 0x1fffffff)
  59 #define XPHYSADDR(a)            ((_ACAST64_(a)) &                       \
  60                                  _CONST64_(0x0000ffffffffffff))
  61
  62 #ifdef CONFIG_64BIT
  63
  64 /*
  65  * Memory segments (64bit kernel mode addresses)
  66  * The compatibility segments use the full 64-bit sign extended value.  Note
  67  * the R8000 doesn't have them so don't reference these in generic MIPS code.
  68  */
  69 #define XKUSEG                  _CONST64_(0x0000000000000000)
  70 #define XKSSEG                  _CONST64_(0x4000000000000000)
  71 #define XKPHYS                  _CONST64_(0x8000000000000000)
  72 #define XKSEG                   _CONST64_(0xc000000000000000)
  73 #define CKSEG0                  _CONST64_(0xffffffff80000000)
  74 #define CKSEG1                  _CONST64_(0xffffffffa0000000)
  75 #define CKSSEG                  _CONST64_(0xffffffffc0000000)
  76 #define CKSEG3                  _CONST64_(0xffffffffe0000000)
  77
  78 #define CKSEG0ADDR(a)           (CPHYSADDR(a) | CKSEG0)
  79 #define CKSEG1ADDR(a)           (CPHYSADDR(a) | CKSEG1)
  80 #define CKSEG2ADDR(a)           (CPHYSADDR(a) | CKSEG2)
  81 #define CKSEG3ADDR(a)           (CPHYSADDR(a) | CKSEG3)
  82
  83 #else
  84
  85 #define CKSEG0ADDR(a)           (CPHYSADDR(a) | KSEG0)
  86 #define CKSEG1ADDR(a)           (CPHYSADDR(a) | KSEG1)
  87 #define CKSEG2ADDR(a)           (CPHYSADDR(a) | KSEG2)
  88 #define CKSEG3ADDR(a)           (CPHYSADDR(a) | KSEG3)
  89
  90 /*
  91  * Map an address to a certain kernel segment
  92  */
  93 #define KSEG0ADDR(a)            (CPHYSADDR(a) | KSEG0)
  94 #define KSEG1ADDR(a)            (CPHYSADDR(a) | KSEG1)
  95 #define KSEG2ADDR(a)            (CPHYSADDR(a) | KSEG2)
  96 #define KSEG3ADDR(a)            (CPHYSADDR(a) | KSEG3)
  97
  98 /*
  99  * Memory segments (32bit kernel mode addresses)
 100  * These are the traditional names used in the 32-bit universe.
 101  */
 102 #define KUSEG                   0x00000000
 103 #define KSEG0                   0x80000000
 104 #define KSEG1                   0xa0000000
 105 #define KSEG2                   0xc0000000
 106 #define KSEG3                   0xe0000000
 107
 108 #define CKUSEG                  0x00000000
 109 #define CKSEG0                  0x80000000
 110 #define CKSEG1                  0xa0000000
 111 #define CKSEG2                  0xc0000000
 112 #define CKSEG3                  0xe0000000
 113
 114 #endif
 115
 116 /*
 117  * Cache modes for XKPHYS address conversion macros
 118  */
 119 #define K_CALG_COH_EXCL1_NOL2   0
 120 #define K_CALG_COH_SHRL1_NOL2   1
 121 #define K_CALG_UNCACHED         2
 122 #define K_CALG_NONCOHERENT      3
 123 #define K_CALG_COH_EXCL         4
 124 #define K_CALG_COH_SHAREABLE    5
 125 #define K_CALG_NOTUSED          6
 126 #define K_CALG_UNCACHED_ACCEL   7
 127
 128 /*
 129  * 64-bit address conversions
 130  */
 131 #define PHYS_TO_XKSEG_UNCACHED(p)       PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p))
 132 #define PHYS_TO_XKSEG_CACHED(p)         PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p))
 133 #define XKPHYS_TO_PHYS(p)               ((p) & TO_PHYS_MASK)
 134 #define PHYS_TO_XKPHYS(cm, a)           (XKPHYS | (_ACAST64_(cm) << 59) | (a))
 135
 136 /*
 137  * The ultimate limited of the 64-bit MIPS architecture:  2 bits for selecting
 138  * the region, 3 bits for the CCA mode.  This leaves 59 bits of which the
 139  * R8000 implements most with its 48-bit physical address space.
 140  */
 141 #define TO_PHYS_MASK    _CONST64_(0x07ffffffffffffff)   /* 2^^59 - 1 */
 142
 143 #define COMPAT_K1BASE32         _CONST64_(0xffffffffa0000000)
 144 #define PHYS_TO_COMPATK1(x)     ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
 145
 146 #define KDM_TO_PHYS(x)          (_ACAST64_ (x) & TO_PHYS_MASK)
 147 #define PHYS_TO_K0(x)           (_ACAST64_ (x) | CAC_BASE)
 148
 149 #endif /* _ASM_ADDRSPACE_H */