drm/rockchip: vop2: Fix the windows switch between different layers
[drm/drm-misc.git] / arch / mips / include / asm / mach-ingenic / cpu-feature-overrides.h
blob7ace50127f5aa0b7105453f17a33c06ca369536f
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 */
7 #ifndef __ASM_MACH_JZ4740_CPU_FEATURE_OVERRIDES_H
8 #define __ASM_MACH_JZ4740_CPU_FEATURE_OVERRIDES_H
10 #define cpu_has_tlb 1
11 #define cpu_has_4kex 1
12 #define cpu_has_3k_cache 0
13 #define cpu_has_4k_cache 1
14 #define cpu_has_counter 0
15 #define cpu_has_watch 1
16 #define cpu_has_divec 1
17 #define cpu_has_vce 0
18 #define cpu_has_cache_cdex_p 0
19 #define cpu_has_cache_cdex_s 0
20 #define cpu_has_prefetch 1
21 #define cpu_has_mcheck 1
22 #define cpu_has_ejtag 1
23 #define cpu_has_llsc 1
24 #define cpu_has_mips16 0
25 #define cpu_has_mips16e2 0
26 #define cpu_has_mdmx 0
27 #define cpu_has_mips3d 0
28 #define cpu_has_smartmips 0
29 #define kernel_uses_llsc 1
30 #define cpu_has_vtag_icache 1
31 #define cpu_has_dc_aliases 0
32 #define cpu_has_ic_fills_f_dc 0
33 #define cpu_has_pindexed_dcache 0
34 #define cpu_has_mips32r1 1
35 #define cpu_has_mips64r1 0
36 #define cpu_has_mips64r2 0
37 #define cpu_has_dsp 0
38 #define cpu_has_dsp2 0
39 #define cpu_has_mipsmt 0
40 #define cpu_has_userlocal 0
41 #define cpu_has_nofpuex 0
42 #define cpu_has_64bits 0
43 #define cpu_has_64bit_zero_reg 0
44 #define cpu_has_inclusive_pcaches 0
46 #define cpu_dcache_line_size() 32
47 #define cpu_icache_line_size() 32
49 #endif