drm/rockchip: vop2: Fix the windows switch between different layers
[drm/drm-misc.git] / arch / mips / include / asm / mach-lantiq / xway / xway_dma.h
blob3dee15c61c8ab19e806407e5be2adcbafb0150bf
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
4 * Copyright (C) 2011 John Crispin <john@phrozen.org>
5 */
7 #ifndef LTQ_DMA_H__
8 #define LTQ_DMA_H__
10 #define LTQ_DESC_SIZE 0x08 /* each descriptor is 64bit */
11 #define LTQ_DESC_NUM 0xC0 /* 192 descriptors / channel */
13 #define LTQ_DMA_OWN BIT(31) /* owner bit */
14 #define LTQ_DMA_C BIT(30) /* complete bit */
15 #define LTQ_DMA_SOP BIT(29) /* start of packet */
16 #define LTQ_DMA_EOP BIT(28) /* end of packet */
17 #define LTQ_DMA_TX_OFFSET(x) ((x & 0x1f) << 23) /* data bytes offset */
18 #define LTQ_DMA_RX_OFFSET(x) ((x & 0x7) << 23) /* data bytes offset */
19 #define LTQ_DMA_SIZE_MASK (0xffff) /* the size field is 16 bit */
21 struct ltq_dma_desc {
22 u32 ctl;
23 u32 addr;
26 struct ltq_dma_channel {
27 int nr; /* the channel number */
28 int irq; /* the mapped irq */
29 int desc; /* the current descriptor */
30 struct ltq_dma_desc *desc_base; /* the descriptor base */
31 int phys; /* physical addr */
32 struct device *dev;
35 enum {
36 DMA_PORT_ETOP = 0,
37 DMA_PORT_DEU,
40 extern void ltq_dma_enable_irq(struct ltq_dma_channel *ch);
41 extern void ltq_dma_disable_irq(struct ltq_dma_channel *ch);
42 extern void ltq_dma_ack_irq(struct ltq_dma_channel *ch);
43 extern void ltq_dma_open(struct ltq_dma_channel *ch);
44 extern void ltq_dma_close(struct ltq_dma_channel *ch);
45 extern void ltq_dma_alloc_tx(struct ltq_dma_channel *ch);
46 extern void ltq_dma_alloc_rx(struct ltq_dma_channel *ch);
47 extern void ltq_dma_free(struct ltq_dma_channel *ch);
48 extern void ltq_dma_init_port(int p, int tx_burst, int rx_burst);
50 #endif