drm/rockchip: vop2: Fix the windows switch between different layers
[drm/drm-misc.git] / arch / mips / include / asm / mach-ralink / mt7621 / cpu-feature-overrides.h
blob3c19a94f54320b3284dd92fb19cf4d0699eaa160
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Ralink MT7621 specific CPU feature overrides
5 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * Copyright (C) 2015 Felix Fietkau <nbd@openwrt.org>
9 * This file was derived from: include/asm-mips/cpu-features.h
10 * Copyright (C) 2003, 2004 Ralf Baechle
11 * Copyright (C) 2004 Maciej W. Rozycki
13 #ifndef _MT7621_CPU_FEATURE_OVERRIDES_H
14 #define _MT7621_CPU_FEATURE_OVERRIDES_H
16 #define cpu_has_tlb 1
17 #define cpu_has_4kex 1
18 #define cpu_has_3k_cache 0
19 #define cpu_has_4k_cache 1
20 #define cpu_has_sb1_cache 0
21 #define cpu_has_fpu 0
22 #define cpu_has_32fpr 0
23 #define cpu_has_counter 1
24 #define cpu_has_watch 1
25 #define cpu_has_divec 1
27 #define cpu_has_prefetch 1
28 #define cpu_has_ejtag 1
29 #define cpu_has_llsc 1
31 #define cpu_has_mips16 1
32 #define cpu_has_mdmx 0
33 #define cpu_has_mips3d 0
34 #define cpu_has_smartmips 0
36 #define cpu_has_mips32r1 1
37 #define cpu_has_mips32r2 1
38 #define cpu_has_mips64r1 0
39 #define cpu_has_mips64r2 0
41 #define cpu_has_dsp 1
42 #define cpu_has_dsp2 0
43 #define cpu_has_mipsmt 1
45 #define cpu_has_64bits 0
46 #define cpu_has_64bit_zero_reg 0
47 #define cpu_has_64bit_gp_regs 0
49 #define cpu_dcache_line_size() 32
50 #define cpu_icache_line_size() 32
52 #define cpu_has_dc_aliases 0
53 #define cpu_has_vtag_icache 0
55 #define cpu_has_rixi 0
56 #define cpu_has_tlbinv 0
57 #define cpu_has_userlocal 1
59 #endif /* _MT7621_CPU_FEATURE_OVERRIDES_H */