drm/rockchip: vop2: Fix the windows switch between different layers
[drm/drm-misc.git] / arch / mips / include / asm / mach-ralink / rt288x / cpu-feature-overrides.h
bloba850c1e4613448dd84e787abd4a18f01e47ebc5e
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Ralink RT288x specific CPU feature overrides
5 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
8 * This file was derived from: include/asm-mips/cpu-features.h
9 * Copyright (C) 2003, 2004 Ralf Baechle
10 * Copyright (C) 2004 Maciej W. Rozycki
12 #ifndef _RT288X_CPU_FEATURE_OVERRIDES_H
13 #define _RT288X_CPU_FEATURE_OVERRIDES_H
15 #define cpu_has_tlb 1
16 #define cpu_has_4kex 1
17 #define cpu_has_3k_cache 0
18 #define cpu_has_4k_cache 1
19 #define cpu_has_sb1_cache 0
20 #define cpu_has_fpu 0
21 #define cpu_has_32fpr 0
22 #define cpu_has_counter 1
23 #define cpu_has_watch 1
24 #define cpu_has_divec 1
26 #define cpu_has_prefetch 1
27 #define cpu_has_ejtag 1
28 #define cpu_has_llsc 1
30 #define cpu_has_mips16 1
31 #define cpu_has_mdmx 0
32 #define cpu_has_mips3d 0
33 #define cpu_has_smartmips 0
35 #define cpu_has_mips32r1 1
36 #define cpu_has_mips32r2 1
37 #define cpu_has_mips64r1 0
38 #define cpu_has_mips64r2 0
40 #define cpu_has_dsp 0
41 #define cpu_has_mipsmt 0
43 #define cpu_has_64bits 0
44 #define cpu_has_64bit_zero_reg 0
45 #define cpu_has_64bit_gp_regs 0
47 #define cpu_dcache_line_size() 16
48 #define cpu_icache_line_size() 16
50 #endif /* _RT288X_CPU_FEATURE_OVERRIDES_H */