drm/rockchip: vop2: Fix the windows switch between different layers
[drm/drm-misc.git] / arch / mips / include / asm / mach-rm / cpu-feature-overrides.h
blobe1e182300feaa67315d4fd5bd6e3444182b26b9d
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * Copyright (C) 2003, 04, 07 Ralf Baechle (ralf@linux-mips.org)
8 * SNI RM200 C apparently was only shipped with R4600 V2.0 and R5000 processors.
9 */
10 #ifndef __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H
11 #define __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H
13 #define cpu_has_tlb 1
14 #define cpu_has_4kex 1
15 #define cpu_has_4k_cache 1
16 #define cpu_has_32fpr 1
17 #define cpu_has_counter 1
18 #define cpu_has_watch 0
19 #define cpu_has_mips16 0
20 #define cpu_has_mips16e2 0
21 #define cpu_has_divec 0
22 #define cpu_has_cache_cdex_p 1
23 #define cpu_has_prefetch 0
24 #define cpu_has_mcheck 0
25 #define cpu_has_ejtag 0
26 #define cpu_has_llsc 1
27 #define cpu_has_vtag_icache 0
28 #define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
29 #define cpu_has_ic_fills_f_dc 0
30 #define cpu_has_dsp 0
31 #define cpu_has_dsp2 0
32 #define cpu_has_nofpuex 0
33 #define cpu_has_64bits 1
34 #define cpu_has_mipsmt 0
35 #define cpu_has_userlocal 0
37 #define cpu_has_mips32r1 0
38 #define cpu_has_mips32r2 0
39 #define cpu_has_mips64r1 0
40 #define cpu_has_mips64r2 0
42 #endif /* __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H */