1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2011-2016 Zhang, Keguang <keguang.zhang@gmail.com>
7 #include <linux/dma-mapping.h>
9 #include <linux/mtd/partitions.h>
10 #include <linux/sizes.h>
11 #include <linux/phy.h>
12 #include <linux/serial_8250.h>
13 #include <linux/stmmac.h>
14 #include <linux/usb/ehci_pdriver.h>
17 #include <loongson1.h>
19 /* 8250/16550 compatible UART */
20 #define LS1X_UART(_id) \
22 .mapbase = LS1X_UART ## _id ## _BASE, \
23 .irq = LS1X_UART ## _id ## _IRQ, \
25 .flags = UPF_IOREMAP | UPF_FIXED_TYPE, \
26 .type = PORT_16550A, \
29 static struct plat_serial8250_port ls1x_serial8250_pdata
[] = {
37 struct platform_device ls1x_uart_pdev
= {
39 .id
= PLAT8250_DEV_PLATFORM
,
41 .platform_data
= ls1x_serial8250_pdata
,
45 void __init
ls1x_serial_set_uartclk(struct platform_device
*pdev
)
48 struct plat_serial8250_port
*p
;
50 clk
= clk_get(&pdev
->dev
, pdev
->name
);
52 pr_err("unable to get %s clock, err=%ld",
53 pdev
->name
, PTR_ERR(clk
));
56 clk_prepare_enable(clk
);
58 for (p
= pdev
->dev
.platform_data
; p
->flags
!= 0; ++p
)
59 p
->uartclk
= clk_get_rate(clk
);
62 /* Synopsys Ethernet GMAC */
63 static struct stmmac_mdio_bus_data ls1x_mdio_bus_data
= {
67 static struct stmmac_dma_cfg ls1x_eth_dma_cfg
= {
71 int ls1x_eth_mux_init(struct platform_device
*pdev
, void *priv
)
73 struct plat_stmmacenet_data
*plat_dat
= NULL
;
76 val
= __raw_readl(LS1X_MUX_CTRL1
);
78 #if defined(CONFIG_LOONGSON1_LS1B)
79 plat_dat
= dev_get_platdata(&pdev
->dev
);
80 if (plat_dat
->bus_id
) {
81 __raw_writel(__raw_readl(LS1X_MUX_CTRL0
) | GMAC1_USE_UART1
|
82 GMAC1_USE_UART0
, LS1X_MUX_CTRL0
);
83 switch (plat_dat
->phy_interface
) {
84 case PHY_INTERFACE_MODE_RGMII
:
85 val
&= ~(GMAC1_USE_TXCLK
| GMAC1_USE_PWM23
);
87 case PHY_INTERFACE_MODE_MII
:
88 val
|= (GMAC1_USE_TXCLK
| GMAC1_USE_PWM23
);
91 pr_err("unsupported mii mode %d\n",
92 plat_dat
->phy_interface
);
97 switch (plat_dat
->phy_interface
) {
98 case PHY_INTERFACE_MODE_RGMII
:
99 val
&= ~(GMAC0_USE_TXCLK
| GMAC0_USE_PWM01
);
101 case PHY_INTERFACE_MODE_MII
:
102 val
|= (GMAC0_USE_TXCLK
| GMAC0_USE_PWM01
);
105 pr_err("unsupported mii mode %d\n",
106 plat_dat
->phy_interface
);
111 __raw_writel(val
, LS1X_MUX_CTRL1
);
112 #elif defined(CONFIG_LOONGSON1_LS1C)
113 plat_dat
= dev_get_platdata(&pdev
->dev
);
115 val
&= ~PHY_INTF_SELI
;
116 if (plat_dat
->phy_interface
== PHY_INTERFACE_MODE_RMII
)
117 val
|= 0x4 << PHY_INTF_SELI_SHIFT
;
118 __raw_writel(val
, LS1X_MUX_CTRL1
);
120 val
= __raw_readl(LS1X_MUX_CTRL0
);
121 __raw_writel(val
& (~GMAC_SHUT
), LS1X_MUX_CTRL0
);
127 static struct plat_stmmacenet_data ls1x_eth0_pdata
= {
130 #if defined(CONFIG_LOONGSON1_LS1B)
131 .phy_interface
= PHY_INTERFACE_MODE_MII
,
132 #elif defined(CONFIG_LOONGSON1_LS1C)
133 .phy_interface
= PHY_INTERFACE_MODE_RMII
,
135 .mdio_bus_data
= &ls1x_mdio_bus_data
,
136 .dma_cfg
= &ls1x_eth_dma_cfg
,
139 .rx_queues_to_use
= 1,
140 .tx_queues_to_use
= 1,
141 .init
= ls1x_eth_mux_init
,
144 static struct resource ls1x_eth0_resources
[] = {
146 .start
= LS1X_GMAC0_BASE
,
147 .end
= LS1X_GMAC0_BASE
+ SZ_64K
- 1,
148 .flags
= IORESOURCE_MEM
,
152 .start
= LS1X_GMAC0_IRQ
,
153 .flags
= IORESOURCE_IRQ
,
157 struct platform_device ls1x_eth0_pdev
= {
160 .num_resources
= ARRAY_SIZE(ls1x_eth0_resources
),
161 .resource
= ls1x_eth0_resources
,
163 .platform_data
= &ls1x_eth0_pdata
,
167 #ifdef CONFIG_LOONGSON1_LS1B
168 static struct plat_stmmacenet_data ls1x_eth1_pdata
= {
171 .phy_interface
= PHY_INTERFACE_MODE_MII
,
172 .mdio_bus_data
= &ls1x_mdio_bus_data
,
173 .dma_cfg
= &ls1x_eth_dma_cfg
,
176 .rx_queues_to_use
= 1,
177 .tx_queues_to_use
= 1,
178 .init
= ls1x_eth_mux_init
,
181 static struct resource ls1x_eth1_resources
[] = {
183 .start
= LS1X_GMAC1_BASE
,
184 .end
= LS1X_GMAC1_BASE
+ SZ_64K
- 1,
185 .flags
= IORESOURCE_MEM
,
189 .start
= LS1X_GMAC1_IRQ
,
190 .flags
= IORESOURCE_IRQ
,
194 struct platform_device ls1x_eth1_pdev
= {
197 .num_resources
= ARRAY_SIZE(ls1x_eth1_resources
),
198 .resource
= ls1x_eth1_resources
,
200 .platform_data
= &ls1x_eth1_pdata
,
203 #endif /* CONFIG_LOONGSON1_LS1B */
206 static struct resource ls1x_gpio0_resources
[] = {
208 .start
= LS1X_GPIO0_BASE
,
209 .end
= LS1X_GPIO0_BASE
+ SZ_4
- 1,
210 .flags
= IORESOURCE_MEM
,
214 struct platform_device ls1x_gpio0_pdev
= {
217 .num_resources
= ARRAY_SIZE(ls1x_gpio0_resources
),
218 .resource
= ls1x_gpio0_resources
,
221 static struct resource ls1x_gpio1_resources
[] = {
223 .start
= LS1X_GPIO1_BASE
,
224 .end
= LS1X_GPIO1_BASE
+ SZ_4
- 1,
225 .flags
= IORESOURCE_MEM
,
229 struct platform_device ls1x_gpio1_pdev
= {
232 .num_resources
= ARRAY_SIZE(ls1x_gpio1_resources
),
233 .resource
= ls1x_gpio1_resources
,
237 static u64 ls1x_ehci_dmamask
= DMA_BIT_MASK(32);
239 static struct resource ls1x_ehci_resources
[] = {
241 .start
= LS1X_EHCI_BASE
,
242 .end
= LS1X_EHCI_BASE
+ SZ_32K
- 1,
243 .flags
= IORESOURCE_MEM
,
246 .start
= LS1X_EHCI_IRQ
,
247 .flags
= IORESOURCE_IRQ
,
251 static struct usb_ehci_pdata ls1x_ehci_pdata
= {
254 struct platform_device ls1x_ehci_pdev
= {
255 .name
= "ehci-platform",
257 .num_resources
= ARRAY_SIZE(ls1x_ehci_resources
),
258 .resource
= ls1x_ehci_resources
,
260 .dma_mask
= &ls1x_ehci_dmamask
,
261 .platform_data
= &ls1x_ehci_pdata
,
265 /* Real Time Clock */
266 struct platform_device ls1x_rtc_pdev
= {
272 static struct resource ls1x_wdt_resources
[] = {
274 .start
= LS1X_WDT_BASE
,
275 .end
= LS1X_WDT_BASE
+ SZ_16
- 1,
276 .flags
= IORESOURCE_MEM
,
280 struct platform_device ls1x_wdt_pdev
= {
283 .num_resources
= ARRAY_SIZE(ls1x_wdt_resources
),
284 .resource
= ls1x_wdt_resources
,