arch/mips/sgi-ip30/ip30-setup.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * SGI IP30 miscellaneous setup bits.
   4  *
   5  * Copyright (C) 2004-2007 Stanislaw Skowronek <skylark@unaligned.org>
   6  *               2007 Joshua Kinard <kumba@gentoo.org>
   7  *               2009 Johannes Dickgreber <tanzy@gmx.de>
   8  */
   9
  10 #include <linux/init.h>
  11 #include <linux/io.h>
  12 #include <linux/kernel.h>
  13 #include <linux/types.h>
  14 #include <linux/percpu.h>
  15 #include <linux/memblock.h>
  16
  17 #include <asm/bootinfo.h>
  18 #include <asm/smp-ops.h>
  19 #include <asm/sgialib.h>
  20 #include <asm/time.h>
  21 #include <asm/sgi/heart.h>
  22
  23 #include "ip30-common.h"
  24
  25 /* Structure of accessible HEART registers located in XKPHYS space. */
  26 struct ip30_heart_regs __iomem *heart_regs = HEART_XKPHYS_BASE;
  27
  28 /*
  29  * ARCS will report up to the first 1GB of
  30  * memory if queried.  Anything beyond that
  31  * is marked as reserved.
  32  */
  33 #define IP30_MAX_PROM_MEMORY    _AC(0x40000000, UL)
  34
  35 /*
  36  * Memory in the Octane starts at 512MB
  37  */
  38 #define IP30_MEMORY_BASE        _AC(0x20000000, UL)
  39
  40 /*
  41  * If using ARCS to probe for memory, then
  42  * remaining memory will start at this offset.
  43  */
  44 #define IP30_REAL_MEMORY_START  (IP30_MEMORY_BASE + IP30_MAX_PROM_MEMORY)
  45
  46 #define MEM_SHIFT(x) ((x) >> 20)
  47
  48 static void __init ip30_mem_init(void)
  49 {
  50         unsigned long total_mem;
  51         phys_addr_t addr;
  52         phys_addr_t size;
  53         u32 memcfg;
  54         int i;
  55
  56         total_mem = 0;
  57         for (i = 0; i < HEART_MEMORY_BANKS; i++) {
  58                 memcfg = __raw_readl(&heart_regs->mem_cfg.l[i]);
  59                 if (!(memcfg & HEART_MEMCFG_VALID))
  60                         continue;
  61
  62                 addr = memcfg & HEART_MEMCFG_ADDR_MASK;
  63                 addr <<= HEART_MEMCFG_UNIT_SHIFT;
  64                 addr += IP30_MEMORY_BASE;
  65                 size = memcfg & HEART_MEMCFG_SIZE_MASK;
  66                 size >>= HEART_MEMCFG_SIZE_SHIFT;
  67                 size += 1;
  68                 size <<= HEART_MEMCFG_UNIT_SHIFT;
  69
  70                 total_mem += size;
  71
  72                 if (addr >= IP30_REAL_MEMORY_START)
  73                         memblock_phys_free(addr, size);
  74                 else if ((addr + size) > IP30_REAL_MEMORY_START)
  75                         memblock_phys_free(IP30_REAL_MEMORY_START,
  76                                            size - IP30_MAX_PROM_MEMORY);
  77         }
  78         pr_info("Detected %luMB of physical memory.\n", MEM_SHIFT(total_mem));
  79 }
  80
  81 /**
  82  * ip30_cpu_time_init - platform time initialization.
  83  */
  84 static void __init ip30_cpu_time_init(void)
  85 {
  86         int cpu = smp_processor_id();
  87         u64 heart_compare;
  88         unsigned int start, end;
  89         int time_diff;
  90
  91         heart_compare = (heart_read(&heart_regs->count) +
  92                          (HEART_CYCLES_PER_SEC / 10));
  93         start = read_c0_count();
  94         while ((heart_read(&heart_regs->count) - heart_compare) & 0x800000)
  95                 cpu_relax();
  96
  97         end = read_c0_count();
  98         time_diff = (int)end - (int)start;
  99         mips_hpt_frequency = time_diff * 10;
 100         pr_info("IP30: CPU%d: %d MHz CPU detected.\n", cpu,
 101                 (mips_hpt_frequency * 2) / 1000000);
 102 }
 103
 104 void __init ip30_per_cpu_init(void)
 105 {
 106         /* Disable all interrupts. */
 107         clear_c0_status(ST0_IM);
 108
 109         ip30_cpu_time_init();
 110 #ifdef CONFIG_SMP
 111         ip30_install_ipi();
 112 #endif
 113
 114         enable_percpu_irq(IP30_HEART_L0_IRQ, IRQ_TYPE_NONE);
 115         enable_percpu_irq(IP30_HEART_L1_IRQ, IRQ_TYPE_NONE);
 116         enable_percpu_irq(IP30_HEART_L2_IRQ, IRQ_TYPE_NONE);
 117         enable_percpu_irq(IP30_HEART_ERR_IRQ, IRQ_TYPE_NONE);
 118 }
 119
 120 /**
 121  * plat_mem_setup - despite the name, misc setup happens here.
 122  */
 123 void __init plat_mem_setup(void)
 124 {
 125         ip30_mem_init();
 126
 127         /* XXX: Hard lock on /sbin/init if this flag isn't specified. */
 128         prom_flags |= PROM_FLAG_DONT_FREE_TEMP;
 129
 130 #ifdef CONFIG_SMP
 131         register_smp_ops(&ip30_smp_ops);
 132 #else
 133         ip30_per_cpu_init();
 134 #endif
 135
 136         ioport_resource.start = 0;
 137         ioport_resource.end = ~0UL;
 138         set_io_port_base(IO_BASE);
 139 }