accel/qaic: Add AIC200 support
[drm/drm-misc.git] / arch / powerpc / mm / book3s64 / mmu_context.c
blob1715b07c630c98b5e08b580d3255eb315c8af2c1
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * MMU context allocation for 64-bit kernels.
5 * Copyright (C) 2004 Anton Blanchard, IBM Corp. <anton@samba.org>
6 */
8 #include <linux/sched.h>
9 #include <linux/kernel.h>
10 #include <linux/errno.h>
11 #include <linux/string.h>
12 #include <linux/types.h>
13 #include <linux/mm.h>
14 #include <linux/pkeys.h>
15 #include <linux/spinlock.h>
16 #include <linux/idr.h>
17 #include <linux/export.h>
18 #include <linux/gfp.h>
19 #include <linux/slab.h>
20 #include <linux/cpu.h>
22 #include <asm/mmu_context.h>
23 #include <asm/pgalloc.h>
25 #include "internal.h"
27 static DEFINE_IDA(mmu_context_ida);
29 static int alloc_context_id(int min_id, int max_id)
31 return ida_alloc_range(&mmu_context_ida, min_id, max_id, GFP_KERNEL);
34 #ifdef CONFIG_PPC_64S_HASH_MMU
35 void __init hash__reserve_context_id(int id)
37 int result = ida_alloc_range(&mmu_context_ida, id, id, GFP_KERNEL);
39 WARN(result != id, "mmu: Failed to reserve context id %d (rc %d)\n", id, result);
42 int hash__alloc_context_id(void)
44 unsigned long max;
46 if (mmu_has_feature(MMU_FTR_68_BIT_VA))
47 max = MAX_USER_CONTEXT;
48 else
49 max = MAX_USER_CONTEXT_65BIT_VA;
51 return alloc_context_id(MIN_USER_CONTEXT, max);
53 EXPORT_SYMBOL_GPL(hash__alloc_context_id);
54 #endif
56 #ifdef CONFIG_PPC_64S_HASH_MMU
57 static int realloc_context_ids(mm_context_t *ctx)
59 int i, id;
62 * id 0 (aka. ctx->id) is special, we always allocate a new one, even if
63 * there wasn't one allocated previously (which happens in the exec
64 * case where ctx is newly allocated).
66 * We have to be a bit careful here. We must keep the existing ids in
67 * the array, so that we can test if they're non-zero to decide if we
68 * need to allocate a new one. However in case of error we must free the
69 * ids we've allocated but *not* any of the existing ones (or risk a
70 * UAF). That's why we decrement i at the start of the error handling
71 * loop, to skip the id that we just tested but couldn't reallocate.
73 for (i = 0; i < ARRAY_SIZE(ctx->extended_id); i++) {
74 if (i == 0 || ctx->extended_id[i]) {
75 id = hash__alloc_context_id();
76 if (id < 0)
77 goto error;
79 ctx->extended_id[i] = id;
83 /* The caller expects us to return id */
84 return ctx->id;
86 error:
87 for (i--; i >= 0; i--) {
88 if (ctx->extended_id[i])
89 ida_free(&mmu_context_ida, ctx->extended_id[i]);
92 return id;
95 static int hash__init_new_context(struct mm_struct *mm)
97 int index;
99 mm->context.hash_context = kmalloc(sizeof(struct hash_mm_context),
100 GFP_KERNEL);
101 if (!mm->context.hash_context)
102 return -ENOMEM;
105 * The old code would re-promote on fork, we don't do that when using
106 * slices as it could cause problem promoting slices that have been
107 * forced down to 4K.
109 * For book3s we have MMU_NO_CONTEXT set to be ~0. Hence check
110 * explicitly against context.id == 0. This ensures that we properly
111 * initialize context slice details for newly allocated mm's (which will
112 * have id == 0) and don't alter context slice inherited via fork (which
113 * will have id != 0).
115 * We should not be calling init_new_context() on init_mm. Hence a
116 * check against 0 is OK.
118 if (mm->context.id == 0) {
119 memset(mm->context.hash_context, 0, sizeof(struct hash_mm_context));
120 slice_init_new_context_exec(mm);
121 } else {
122 /* This is fork. Copy hash_context details from current->mm */
123 memcpy(mm->context.hash_context, current->mm->context.hash_context, sizeof(struct hash_mm_context));
124 #ifdef CONFIG_PPC_SUBPAGE_PROT
125 /* inherit subpage prot details if we have one. */
126 if (current->mm->context.hash_context->spt) {
127 mm->context.hash_context->spt = kmalloc(sizeof(struct subpage_prot_table),
128 GFP_KERNEL);
129 if (!mm->context.hash_context->spt) {
130 kfree(mm->context.hash_context);
131 return -ENOMEM;
134 #endif
137 index = realloc_context_ids(&mm->context);
138 if (index < 0) {
139 #ifdef CONFIG_PPC_SUBPAGE_PROT
140 kfree(mm->context.hash_context->spt);
141 #endif
142 kfree(mm->context.hash_context);
143 return index;
146 pkey_mm_init(mm);
147 return index;
150 void hash__setup_new_exec(void)
152 slice_setup_new_exec();
154 slb_setup_new_exec();
156 #else
157 static inline int hash__init_new_context(struct mm_struct *mm)
159 BUILD_BUG();
160 return 0;
162 #endif
164 static int radix__init_new_context(struct mm_struct *mm)
166 unsigned long rts_field;
167 int index, max_id;
169 max_id = (1 << mmu_pid_bits) - 1;
170 index = alloc_context_id(mmu_base_pid, max_id);
171 if (index < 0)
172 return index;
175 * set the process table entry,
177 rts_field = radix__get_tree_size();
178 process_tb[index].prtb0 = cpu_to_be64(rts_field | __pa(mm->pgd) | RADIX_PGD_INDEX_SIZE);
181 * Order the above store with subsequent update of the PID
182 * register (at which point HW can start loading/caching
183 * the entry) and the corresponding load by the MMU from
184 * the L2 cache.
186 asm volatile("ptesync;isync" : : : "memory");
188 #ifdef CONFIG_PPC_64S_HASH_MMU
189 mm->context.hash_context = NULL;
190 #endif
192 return index;
195 int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
197 int index;
199 if (radix_enabled())
200 index = radix__init_new_context(mm);
201 else
202 index = hash__init_new_context(mm);
204 if (index < 0)
205 return index;
207 mm->context.id = index;
209 mm->context.pte_frag = NULL;
210 mm->context.pmd_frag = NULL;
211 #ifdef CONFIG_SPAPR_TCE_IOMMU
212 mm_iommu_init(mm);
213 #endif
214 atomic_set(&mm->context.active_cpus, 0);
215 atomic_set(&mm->context.copros, 0);
217 return 0;
220 void __destroy_context(int context_id)
222 ida_free(&mmu_context_ida, context_id);
224 EXPORT_SYMBOL_GPL(__destroy_context);
226 static void destroy_contexts(mm_context_t *ctx)
228 if (radix_enabled()) {
229 ida_free(&mmu_context_ida, ctx->id);
230 } else {
231 #ifdef CONFIG_PPC_64S_HASH_MMU
232 int index, context_id;
234 for (index = 0; index < ARRAY_SIZE(ctx->extended_id); index++) {
235 context_id = ctx->extended_id[index];
236 if (context_id)
237 ida_free(&mmu_context_ida, context_id);
239 kfree(ctx->hash_context);
240 #else
241 BUILD_BUG(); // radix_enabled() should be constant true
242 #endif
246 static void pmd_frag_destroy(void *pmd_frag)
248 int count;
249 struct ptdesc *ptdesc;
251 ptdesc = virt_to_ptdesc(pmd_frag);
252 /* drop all the pending references */
253 count = ((unsigned long)pmd_frag & ~PAGE_MASK) >> PMD_FRAG_SIZE_SHIFT;
254 /* We allow PTE_FRAG_NR fragments from a PTE page */
255 if (atomic_sub_and_test(PMD_FRAG_NR - count, &ptdesc->pt_frag_refcount)) {
256 pagetable_pmd_dtor(ptdesc);
257 pagetable_free(ptdesc);
261 static void destroy_pagetable_cache(struct mm_struct *mm)
263 void *frag;
265 frag = mm->context.pte_frag;
266 if (frag)
267 pte_frag_destroy(frag);
269 frag = mm->context.pmd_frag;
270 if (frag)
271 pmd_frag_destroy(frag);
272 return;
275 void destroy_context(struct mm_struct *mm)
277 #ifdef CONFIG_SPAPR_TCE_IOMMU
278 WARN_ON_ONCE(!list_empty(&mm->context.iommu_group_mem_list));
279 #endif
281 * For tasks which were successfully initialized we end up calling
282 * arch_exit_mmap() which clears the process table entry. And
283 * arch_exit_mmap() is called before the required fullmm TLB flush
284 * which does a RIC=2 flush. Hence for an initialized task, we do clear
285 * any cached process table entries.
287 * The condition below handles the error case during task init. We have
288 * set the process table entry early and if we fail a task
289 * initialization, we need to ensure the process table entry is zeroed.
290 * We need not worry about process table entry caches because the task
291 * never ran with the PID value.
293 if (radix_enabled())
294 process_tb[mm->context.id].prtb0 = 0;
295 else
296 subpage_prot_free(mm);
297 destroy_contexts(&mm->context);
298 mm->context.id = MMU_NO_CONTEXT;
301 void arch_exit_mmap(struct mm_struct *mm)
303 destroy_pagetable_cache(mm);
305 if (radix_enabled()) {
307 * Radix doesn't have a valid bit in the process table
308 * entries. However we know that at least P9 implementation
309 * will avoid caching an entry with an invalid RTS field,
310 * and 0 is invalid. So this will do.
312 * This runs before the "fullmm" tlb flush in exit_mmap,
313 * which does a RIC=2 tlbie to clear the process table
314 * entry. See the "fullmm" comments in tlb-radix.c.
316 * No barrier required here after the store because
317 * this process will do the invalidate, which starts with
318 * ptesync.
320 process_tb[mm->context.id].prtb0 = 0;
324 #ifdef CONFIG_PPC_RADIX_MMU
325 void radix__switch_mmu_context(struct mm_struct *prev, struct mm_struct *next)
327 mtspr(SPRN_PID, next->context.id);
328 isync();
330 #endif
333 * cleanup_cpu_mmu_context - Clean up MMU details for this CPU (newly offlined)
335 * This clears the CPU from mm_cpumask for all processes, and then flushes the
336 * local TLB to ensure TLB coherency in case the CPU is onlined again.
338 * KVM guest translations are not necessarily flushed here. If KVM started
339 * using mm_cpumask or the Linux APIs which do, this would have to be resolved.
341 #ifdef CONFIG_HOTPLUG_CPU
342 void cleanup_cpu_mmu_context(void)
344 int cpu = smp_processor_id();
346 clear_tasks_mm_cpumask(cpu);
347 tlbiel_all();
349 #endif