accel/qaic: Add AIC200 support
[drm/drm-misc.git] / arch / riscv / include / asm / cpufeature-macros.h
bloba8103edbf51f8255ae044f05cded435ec3e8926a
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright 2022-2024 Rivos, Inc
4 */
6 #ifndef _ASM_CPUFEATURE_MACROS_H
7 #define _ASM_CPUFEATURE_MACROS_H
9 #include <asm/hwcap.h>
10 #include <asm/alternative-macros.h>
12 #define STANDARD_EXT 0
14 bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned int bit);
15 #define riscv_isa_extension_available(isa_bitmap, ext) \
16 __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)
18 static __always_inline bool __riscv_has_extension_likely(const unsigned long vendor,
19 const unsigned long ext)
21 asm goto(ALTERNATIVE("j %l[l_no]", "nop", %[vendor], %[ext], 1)
23 : [vendor] "i" (vendor), [ext] "i" (ext)
25 : l_no);
27 return true;
28 l_no:
29 return false;
32 static __always_inline bool __riscv_has_extension_unlikely(const unsigned long vendor,
33 const unsigned long ext)
35 asm goto(ALTERNATIVE("nop", "j %l[l_yes]", %[vendor], %[ext], 1)
37 : [vendor] "i" (vendor), [ext] "i" (ext)
39 : l_yes);
41 return false;
42 l_yes:
43 return true;
46 static __always_inline bool riscv_has_extension_unlikely(const unsigned long ext)
48 compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX");
50 if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE))
51 return __riscv_has_extension_unlikely(STANDARD_EXT, ext);
53 return __riscv_isa_extension_available(NULL, ext);
56 static __always_inline bool riscv_has_extension_likely(const unsigned long ext)
58 compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX");
60 if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE))
61 return __riscv_has_extension_likely(STANDARD_EXT, ext);
63 return __riscv_isa_extension_available(NULL, ext);
66 #endif /* _ASM_CPUFEATURE_MACROS_H */